diff options
author | Paul Mundt <lethal@linux-sh.org> | 2010-11-01 09:49:04 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2010-11-01 09:49:04 -0400 |
commit | 37b7a97884ba64bf7d403351ac2a9476ab4f1bba (patch) | |
tree | 1c738f6b97c9f82b96c8ae836ab38f34faa4c1d7 /arch/sh/include | |
parent | e2781ac2a63011dd883e94c07eb086e6f2a5f521 (diff) |
sh: machvec IO death.
This takes a bit of a sledgehammer to the machvec I/O routines. The
iomem case requires no special casing and so can just be dropped
outright. This only leaves the ioport casing for PCI and SuperIO
mangling. With the SuperIO case going through the standard ioport
mapping, it's possible to replace everything with generic routines.
With this done the standard I/O routines are tidied up and NO_IOPORT
now gets default-enabled for the vast majority of boards.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/include')
-rw-r--r-- | arch/sh/include/asm/io.h | 345 | ||||
-rw-r--r-- | arch/sh/include/asm/io_generic.h | 25 | ||||
-rw-r--r-- | arch/sh/include/asm/machvec.h | 21 |
3 files changed, 180 insertions, 211 deletions
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h index b237d525d592..89ab2c57a4c2 100644 --- a/arch/sh/include/asm/io.h +++ b/arch/sh/include/asm/io.h | |||
@@ -1,5 +1,6 @@ | |||
1 | #ifndef __ASM_SH_IO_H | 1 | #ifndef __ASM_SH_IO_H |
2 | #define __ASM_SH_IO_H | 2 | #define __ASM_SH_IO_H |
3 | |||
3 | /* | 4 | /* |
4 | * Convention: | 5 | * Convention: |
5 | * read{b,w,l,q}/write{b,w,l,q} are for PCI, | 6 | * read{b,w,l,q}/write{b,w,l,q} are for PCI, |
@@ -15,12 +16,6 @@ | |||
15 | * SuperH specific I/O (raw I/O to on-chip CPU peripherals). In practice | 16 | * SuperH specific I/O (raw I/O to on-chip CPU peripherals). In practice |
16 | * these have the same semantics as the __raw variants, and as such, all | 17 | * these have the same semantics as the __raw variants, and as such, all |
17 | * new code should be using the __raw versions. | 18 | * new code should be using the __raw versions. |
18 | * | ||
19 | * All ISA I/O routines are wrapped through the machine vector. If a | ||
20 | * board does not provide overrides, a generic set that are copied in | ||
21 | * from the default machine vector are used instead. These are largely | ||
22 | * for old compat code for I/O offseting to SuperIOs, all of which are | ||
23 | * better handled through the machvec ioport mapping routines these days. | ||
24 | */ | 19 | */ |
25 | #include <linux/errno.h> | 20 | #include <linux/errno.h> |
26 | #include <asm/cache.h> | 21 | #include <asm/cache.h> |
@@ -31,39 +26,10 @@ | |||
31 | #include <asm-generic/iomap.h> | 26 | #include <asm-generic/iomap.h> |
32 | 27 | ||
33 | #ifdef __KERNEL__ | 28 | #ifdef __KERNEL__ |
34 | /* | 29 | #define __IO_PREFIX generic |
35 | * Depending on which platform we are running on, we need different | ||
36 | * I/O functions. | ||
37 | */ | ||
38 | #define __IO_PREFIX generic | ||
39 | #include <asm/io_generic.h> | 30 | #include <asm/io_generic.h> |
40 | #include <asm/io_trapped.h> | 31 | #include <asm/io_trapped.h> |
41 | 32 | ||
42 | #ifdef CONFIG_HAS_IOPORT | ||
43 | |||
44 | #define inb(p) sh_mv.mv_inb((p)) | ||
45 | #define inw(p) sh_mv.mv_inw((p)) | ||
46 | #define inl(p) sh_mv.mv_inl((p)) | ||
47 | #define outb(x,p) sh_mv.mv_outb((x),(p)) | ||
48 | #define outw(x,p) sh_mv.mv_outw((x),(p)) | ||
49 | #define outl(x,p) sh_mv.mv_outl((x),(p)) | ||
50 | |||
51 | #define inb_p(p) sh_mv.mv_inb_p((p)) | ||
52 | #define inw_p(p) sh_mv.mv_inw_p((p)) | ||
53 | #define inl_p(p) sh_mv.mv_inl_p((p)) | ||
54 | #define outb_p(x,p) sh_mv.mv_outb_p((x),(p)) | ||
55 | #define outw_p(x,p) sh_mv.mv_outw_p((x),(p)) | ||
56 | #define outl_p(x,p) sh_mv.mv_outl_p((x),(p)) | ||
57 | |||
58 | #define insb(p,b,c) sh_mv.mv_insb((p), (b), (c)) | ||
59 | #define insw(p,b,c) sh_mv.mv_insw((p), (b), (c)) | ||
60 | #define insl(p,b,c) sh_mv.mv_insl((p), (b), (c)) | ||
61 | #define outsb(p,b,c) sh_mv.mv_outsb((p), (b), (c)) | ||
62 | #define outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c)) | ||
63 | #define outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c)) | ||
64 | |||
65 | #endif | ||
66 | |||
67 | #define __raw_writeb(v,a) (__chk_io_ptr(a), *(volatile u8 __force *)(a) = (v)) | 33 | #define __raw_writeb(v,a) (__chk_io_ptr(a), *(volatile u8 __force *)(a) = (v)) |
68 | #define __raw_writew(v,a) (__chk_io_ptr(a), *(volatile u16 __force *)(a) = (v)) | 34 | #define __raw_writew(v,a) (__chk_io_ptr(a), *(volatile u16 __force *)(a) = (v)) |
69 | #define __raw_writel(v,a) (__chk_io_ptr(a), *(volatile u32 __force *)(a) = (v)) | 35 | #define __raw_writel(v,a) (__chk_io_ptr(a), *(volatile u32 __force *)(a) = (v)) |
@@ -74,68 +40,39 @@ | |||
74 | #define __raw_readl(a) (__chk_io_ptr(a), *(volatile u32 __force *)(a)) | 40 | #define __raw_readl(a) (__chk_io_ptr(a), *(volatile u32 __force *)(a)) |
75 | #define __raw_readq(a) (__chk_io_ptr(a), *(volatile u64 __force *)(a)) | 41 | #define __raw_readq(a) (__chk_io_ptr(a), *(volatile u64 __force *)(a)) |
76 | 42 | ||
77 | #define readb(a) ({ u8 r_ = __raw_readb(a); mb(); r_; }) | 43 | #define readb_relaxed(c) ({ u8 __v = __raw_readb(c); __v; }) |
78 | #define readw(a) ({ u16 r_ = __raw_readw(a); mb(); r_; }) | 44 | #define readw_relaxed(c) ({ u16 __v = le16_to_cpu((__force __le16) \ |
79 | #define readl(a) ({ u32 r_ = __raw_readl(a); mb(); r_; }) | 45 | __raw_readw(c)); __v; }) |
80 | #define readq(a) ({ u64 r_ = __raw_readq(a); mb(); r_; }) | 46 | #define readl_relaxed(c) ({ u32 __v = le32_to_cpu((__force __le32) \ |
81 | 47 | __raw_readl(c)); __v; }) | |
82 | #define writeb(v,a) ({ __raw_writeb((v),(a)); mb(); }) | 48 | #define readq_relaxed(c) ({ u64 __v = le64_to_cpu((__force __le64) \ |
83 | #define writew(v,a) ({ __raw_writew((v),(a)); mb(); }) | 49 | __raw_readq(c)); __v; }) |
84 | #define writel(v,a) ({ __raw_writel((v),(a)); mb(); }) | 50 | |
85 | #define writeq(v,a) ({ __raw_writeq((v),(a)); mb(); }) | 51 | #define writeb_relaxed(v,c) ((void)__raw_writeb(v,c)) |
86 | 52 | #define writew_relaxed(v,c) ((void)__raw_writew((__force u16) \ | |
87 | /* | 53 | cpu_to_le16(v),c)) |
88 | * Legacy SuperH on-chip I/O functions | 54 | #define writel_relaxed(v,c) ((void)__raw_writel((__force u32) \ |
89 | * | 55 | cpu_to_le32(v),c)) |
90 | * These are all deprecated, all new (and especially cross-platform) code | 56 | #define writeq_relaxed(v,c) ((void)__raw_writeq((__force u64) \ |
91 | * should be using the __raw_xxx() routines directly. | 57 | cpu_to_le64(v),c)) |
92 | */ | 58 | |
93 | static inline u8 __deprecated ctrl_inb(unsigned long addr) | 59 | #define readb(a) ({ u8 r_ = readb_relaxed(a); rmb(); r_; }) |
94 | { | 60 | #define readw(a) ({ u16 r_ = readw_relaxed(a); rmb(); r_; }) |
95 | return __raw_readb(addr); | 61 | #define readl(a) ({ u32 r_ = readl_relaxed(a); rmb(); r_; }) |
96 | } | 62 | #define readq(a) ({ u64 r_ = readq_relaxed(a); rmb(); r_; }) |
97 | 63 | ||
98 | static inline u16 __deprecated ctrl_inw(unsigned long addr) | 64 | #define writeb(v,a) ({ wmb(); writeb_relaxed((v),(a)); }) |
99 | { | 65 | #define writew(v,a) ({ wmb(); writew_relaxed((v),(a)); }) |
100 | return __raw_readw(addr); | 66 | #define writel(v,a) ({ wmb(); writel_relaxed((v),(a)); }) |
101 | } | 67 | #define writeq(v,a) ({ wmb(); writeq_relaxed((v),(a)); }) |
102 | 68 | ||
103 | static inline u32 __deprecated ctrl_inl(unsigned long addr) | 69 | #define readsb(p,d,l) __raw_readsb(p,d,l) |
104 | { | 70 | #define readsw(p,d,l) __raw_readsw(p,d,l) |
105 | return __raw_readl(addr); | 71 | #define readsl(p,d,l) __raw_readsl(p,d,l) |
106 | } | 72 | |
107 | 73 | #define writesb(p,d,l) __raw_writesb(p,d,l) | |
108 | static inline u64 __deprecated ctrl_inq(unsigned long addr) | 74 | #define writesw(p,d,l) __raw_writesw(p,d,l) |
109 | { | 75 | #define writesl(p,d,l) __raw_writesl(p,d,l) |
110 | return __raw_readq(addr); | ||
111 | } | ||
112 | |||
113 | static inline void __deprecated ctrl_outb(u8 v, unsigned long addr) | ||
114 | { | ||
115 | __raw_writeb(v, addr); | ||
116 | } | ||
117 | |||
118 | static inline void __deprecated ctrl_outw(u16 v, unsigned long addr) | ||
119 | { | ||
120 | __raw_writew(v, addr); | ||
121 | } | ||
122 | |||
123 | static inline void __deprecated ctrl_outl(u32 v, unsigned long addr) | ||
124 | { | ||
125 | __raw_writel(v, addr); | ||
126 | } | ||
127 | |||
128 | static inline void __deprecated ctrl_outq(u64 v, unsigned long addr) | ||
129 | { | ||
130 | __raw_writeq(v, addr); | ||
131 | } | ||
132 | |||
133 | extern unsigned long generic_io_base; | ||
134 | |||
135 | static inline void ctrl_delay(void) | ||
136 | { | ||
137 | __raw_readw(generic_io_base); | ||
138 | } | ||
139 | 76 | ||
140 | #define __BUILD_UNCACHED_IO(bwlq, type) \ | 77 | #define __BUILD_UNCACHED_IO(bwlq, type) \ |
141 | static inline type read##bwlq##_uncached(unsigned long addr) \ | 78 | static inline type read##bwlq##_uncached(unsigned long addr) \ |
@@ -159,10 +96,11 @@ __BUILD_UNCACHED_IO(w, u16) | |||
159 | __BUILD_UNCACHED_IO(l, u32) | 96 | __BUILD_UNCACHED_IO(l, u32) |
160 | __BUILD_UNCACHED_IO(q, u64) | 97 | __BUILD_UNCACHED_IO(q, u64) |
161 | 98 | ||
162 | #define __BUILD_MEMORY_STRING(bwlq, type) \ | 99 | #define __BUILD_MEMORY_STRING(pfx, bwlq, type) \ |
163 | \ | 100 | \ |
164 | static inline void __raw_writes##bwlq(volatile void __iomem *mem, \ | 101 | static inline void \ |
165 | const void *addr, unsigned int count) \ | 102 | pfx##writes##bwlq(volatile void __iomem *mem, const void *addr, \ |
103 | unsigned int count) \ | ||
166 | { \ | 104 | { \ |
167 | const volatile type *__addr = addr; \ | 105 | const volatile type *__addr = addr; \ |
168 | \ | 106 | \ |
@@ -172,8 +110,8 @@ static inline void __raw_writes##bwlq(volatile void __iomem *mem, \ | |||
172 | } \ | 110 | } \ |
173 | } \ | 111 | } \ |
174 | \ | 112 | \ |
175 | static inline void __raw_reads##bwlq(volatile void __iomem *mem, \ | 113 | static inline void pfx##reads##bwlq(volatile void __iomem *mem, \ |
176 | void *addr, unsigned int count) \ | 114 | void *addr, unsigned int count) \ |
177 | { \ | 115 | { \ |
178 | volatile type *__addr = addr; \ | 116 | volatile type *__addr = addr; \ |
179 | \ | 117 | \ |
@@ -183,85 +121,166 @@ static inline void __raw_reads##bwlq(volatile void __iomem *mem, \ | |||
183 | } \ | 121 | } \ |
184 | } | 122 | } |
185 | 123 | ||
186 | __BUILD_MEMORY_STRING(b, u8) | 124 | __BUILD_MEMORY_STRING(__raw_, b, u8) |
187 | __BUILD_MEMORY_STRING(w, u16) | 125 | __BUILD_MEMORY_STRING(__raw_, w, u16) |
188 | 126 | ||
189 | #ifdef CONFIG_SUPERH32 | 127 | #ifdef CONFIG_SUPERH32 |
190 | void __raw_writesl(void __iomem *addr, const void *data, int longlen); | 128 | void __raw_writesl(void __iomem *addr, const void *data, int longlen); |
191 | void __raw_readsl(const void __iomem *addr, void *data, int longlen); | 129 | void __raw_readsl(const void __iomem *addr, void *data, int longlen); |
192 | #else | 130 | #else |
193 | __BUILD_MEMORY_STRING(l, u32) | 131 | __BUILD_MEMORY_STRING(__raw_, l, u32) |
194 | #endif | 132 | #endif |
195 | 133 | ||
196 | __BUILD_MEMORY_STRING(q, u64) | 134 | __BUILD_MEMORY_STRING(__raw_, q, u64) |
197 | 135 | ||
198 | #define writesb __raw_writesb | 136 | #ifdef CONFIG_HAS_IOPORT |
199 | #define writesw __raw_writesw | 137 | |
200 | #define writesl __raw_writesl | 138 | /* |
201 | 139 | * Slowdown I/O port space accesses for antique hardware. | |
202 | #define readsb __raw_readsb | 140 | */ |
203 | #define readsw __raw_readsw | 141 | #undef CONF_SLOWDOWN_IO |
204 | #define readsl __raw_readsl | 142 | |
205 | 143 | /* | |
206 | #define readb_relaxed(a) readb(a) | 144 | * On SuperH I/O ports are memory mapped, so we access them using normal |
207 | #define readw_relaxed(a) readw(a) | 145 | * load/store instructions. sh_io_port_base is the virtual address to |
208 | #define readl_relaxed(a) readl(a) | 146 | * which all ports are being mapped. |
209 | #define readq_relaxed(a) readq(a) | 147 | */ |
210 | 148 | extern const unsigned long sh_io_port_base; | |
211 | #ifndef CONFIG_GENERIC_IOMAP | 149 | |
212 | /* Simple MMIO */ | 150 | static inline void __set_io_port_base(unsigned long pbase) |
213 | #define ioread8(a) __raw_readb(a) | 151 | { |
214 | #define ioread16(a) __raw_readw(a) | 152 | *(unsigned long *)&sh_io_port_base = pbase; |
215 | #define ioread16be(a) be16_to_cpu(__raw_readw((a))) | 153 | barrier(); |
216 | #define ioread32(a) __raw_readl(a) | 154 | } |
217 | #define ioread32be(a) be32_to_cpu(__raw_readl((a))) | 155 | |
218 | 156 | #ifdef CONFIG_GENERIC_IOMAP | |
219 | #define iowrite8(v,a) __raw_writeb((v),(a)) | 157 | #define __ioport_map ioport_map |
220 | #define iowrite16(v,a) __raw_writew((v),(a)) | 158 | #else |
221 | #define iowrite16be(v,a) __raw_writew(cpu_to_be16((v)),(a)) | 159 | extern void __iomem *__ioport_map(unsigned long addr, unsigned int size); |
222 | #define iowrite32(v,a) __raw_writel((v),(a)) | ||
223 | #define iowrite32be(v,a) __raw_writel(cpu_to_be32((v)),(a)) | ||
224 | |||
225 | #define ioread8_rep(a, d, c) __raw_readsb((a), (d), (c)) | ||
226 | #define ioread16_rep(a, d, c) __raw_readsw((a), (d), (c)) | ||
227 | #define ioread32_rep(a, d, c) __raw_readsl((a), (d), (c)) | ||
228 | |||
229 | #define iowrite8_rep(a, s, c) __raw_writesb((a), (s), (c)) | ||
230 | #define iowrite16_rep(a, s, c) __raw_writesw((a), (s), (c)) | ||
231 | #define iowrite32_rep(a, s, c) __raw_writesl((a), (s), (c)) | ||
232 | #endif | 160 | #endif |
233 | 161 | ||
234 | #define mmio_insb(p,d,c) __raw_readsb(p,d,c) | 162 | #ifdef CONF_SLOWDOWN_IO |
235 | #define mmio_insw(p,d,c) __raw_readsw(p,d,c) | 163 | #define SLOW_DOWN_IO __raw_readw(sh_io_port_base) |
236 | #define mmio_insl(p,d,c) __raw_readsl(p,d,c) | 164 | #else |
165 | #define SLOW_DOWN_IO | ||
166 | #endif | ||
237 | 167 | ||
238 | #define mmio_outsb(p,s,c) __raw_writesb(p,s,c) | 168 | #define __BUILD_IOPORT_SINGLE(pfx, bwlq, type, p, slow) \ |
239 | #define mmio_outsw(p,s,c) __raw_writesw(p,s,c) | 169 | \ |
240 | #define mmio_outsl(p,s,c) __raw_writesl(p,s,c) | 170 | static inline void pfx##out##bwlq##p(type val, unsigned long port) \ |
171 | { \ | ||
172 | volatile type *__addr; \ | ||
173 | \ | ||
174 | __addr = __ioport_map(port, sizeof(type)); \ | ||
175 | *__addr = val; \ | ||
176 | slow; \ | ||
177 | } \ | ||
178 | \ | ||
179 | static inline type pfx##in##bwlq##p(unsigned long port) \ | ||
180 | { \ | ||
181 | volatile type *__addr; \ | ||
182 | type __val; \ | ||
183 | \ | ||
184 | __addr = __ioport_map(port, sizeof(type)); \ | ||
185 | __val = *__addr; \ | ||
186 | slow; \ | ||
187 | \ | ||
188 | return __val; \ | ||
189 | } | ||
241 | 190 | ||
242 | /* synco on SH-4A, otherwise a nop */ | 191 | #define __BUILD_IOPORT_PFX(bus, bwlq, type) \ |
243 | #define mmiowb() wmb() | 192 | __BUILD_IOPORT_SINGLE(bus, bwlq, type, ,) \ |
193 | __BUILD_IOPORT_SINGLE(bus, bwlq, type, _p, SLOW_DOWN_IO) | ||
244 | 194 | ||
245 | #define IO_SPACE_LIMIT 0xffffffff | 195 | #define BUILDIO_IOPORT(bwlq, type) \ |
196 | __BUILD_IOPORT_PFX(, bwlq, type) | ||
246 | 197 | ||
247 | #ifdef CONFIG_HAS_IOPORT | 198 | BUILDIO_IOPORT(b, u8) |
199 | BUILDIO_IOPORT(w, u16) | ||
200 | BUILDIO_IOPORT(l, u32) | ||
201 | BUILDIO_IOPORT(q, u64) | ||
202 | |||
203 | #define __BUILD_IOPORT_STRING(bwlq, type) \ | ||
204 | \ | ||
205 | static inline void outs##bwlq(unsigned long port, const void *addr, \ | ||
206 | unsigned int count) \ | ||
207 | { \ | ||
208 | const volatile type *__addr = addr; \ | ||
209 | \ | ||
210 | while (count--) { \ | ||
211 | out##bwlq(*__addr, port); \ | ||
212 | __addr++; \ | ||
213 | } \ | ||
214 | } \ | ||
215 | \ | ||
216 | static inline void ins##bwlq(unsigned long port, void *addr, \ | ||
217 | unsigned int count) \ | ||
218 | { \ | ||
219 | volatile type *__addr = addr; \ | ||
220 | \ | ||
221 | while (count--) { \ | ||
222 | *__addr = in##bwlq(port); \ | ||
223 | __addr++; \ | ||
224 | } \ | ||
225 | } | ||
226 | |||
227 | __BUILD_IOPORT_STRING(b, u8) | ||
228 | __BUILD_IOPORT_STRING(w, u16) | ||
229 | __BUILD_IOPORT_STRING(l, u32) | ||
230 | __BUILD_IOPORT_STRING(q, u64) | ||
231 | |||
232 | #endif | ||
248 | 233 | ||
249 | /* | 234 | /* |
250 | * This function provides a method for the generic case where a | 235 | * Legacy SuperH on-chip I/O functions |
251 | * board-specific ioport_map simply needs to return the port + some | ||
252 | * arbitrary port base. | ||
253 | * | 236 | * |
254 | * We use this at board setup time to implicitly set the port base, and | 237 | * These are all deprecated, all new (and especially cross-platform) code |
255 | * as a result, we can use the generic ioport_map. | 238 | * should be using the __raw_xxx() routines directly. |
256 | */ | 239 | */ |
257 | static inline void __set_io_port_base(unsigned long pbase) | 240 | static inline u8 __deprecated ctrl_inb(unsigned long addr) |
258 | { | 241 | { |
259 | generic_io_base = pbase; | 242 | return __raw_readb(addr); |
260 | } | 243 | } |
261 | 244 | ||
262 | #define __ioport_map(p, n) sh_mv.mv_ioport_map((p), (n)) | 245 | static inline u16 __deprecated ctrl_inw(unsigned long addr) |
246 | { | ||
247 | return __raw_readw(addr); | ||
248 | } | ||
263 | 249 | ||
264 | #endif | 250 | static inline u32 __deprecated ctrl_inl(unsigned long addr) |
251 | { | ||
252 | return __raw_readl(addr); | ||
253 | } | ||
254 | |||
255 | static inline u64 __deprecated ctrl_inq(unsigned long addr) | ||
256 | { | ||
257 | return __raw_readq(addr); | ||
258 | } | ||
259 | |||
260 | static inline void __deprecated ctrl_outb(u8 v, unsigned long addr) | ||
261 | { | ||
262 | __raw_writeb(v, addr); | ||
263 | } | ||
264 | |||
265 | static inline void __deprecated ctrl_outw(u16 v, unsigned long addr) | ||
266 | { | ||
267 | __raw_writew(v, addr); | ||
268 | } | ||
269 | |||
270 | static inline void __deprecated ctrl_outl(u32 v, unsigned long addr) | ||
271 | { | ||
272 | __raw_writel(v, addr); | ||
273 | } | ||
274 | |||
275 | static inline void __deprecated ctrl_outq(u64 v, unsigned long addr) | ||
276 | { | ||
277 | __raw_writeq(v, addr); | ||
278 | } | ||
279 | |||
280 | #define IO_SPACE_LIMIT 0xffffffff | ||
281 | |||
282 | /* synco on SH-4A, otherwise a nop */ | ||
283 | #define mmiowb() wmb() | ||
265 | 284 | ||
266 | /* We really want to try and get these to memcpy etc */ | 285 | /* We really want to try and get these to memcpy etc */ |
267 | void memcpy_fromio(void *, const volatile void __iomem *, unsigned long); | 286 | void memcpy_fromio(void *, const volatile void __iomem *, unsigned long); |
@@ -395,10 +414,6 @@ static inline int iounmap_fixed(void __iomem *addr) { return -EINVAL; } | |||
395 | #define ioremap_nocache ioremap | 414 | #define ioremap_nocache ioremap |
396 | #define iounmap __iounmap | 415 | #define iounmap __iounmap |
397 | 416 | ||
398 | #define maybebadio(port) \ | ||
399 | printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \ | ||
400 | __func__, __LINE__, (port), (u32)__builtin_return_address(0)) | ||
401 | |||
402 | /* | 417 | /* |
403 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem | 418 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem |
404 | * access | 419 | * access |
diff --git a/arch/sh/include/asm/io_generic.h b/arch/sh/include/asm/io_generic.h index 491df93cbf8e..b5f6956f19c8 100644 --- a/arch/sh/include/asm/io_generic.h +++ b/arch/sh/include/asm/io_generic.h | |||
@@ -11,31 +11,6 @@ | |||
11 | #error "Don't include this header without a valid system prefix" | 11 | #error "Don't include this header without a valid system prefix" |
12 | #endif | 12 | #endif |
13 | 13 | ||
14 | u8 IO_CONCAT(__IO_PREFIX,inb)(unsigned long); | ||
15 | u16 IO_CONCAT(__IO_PREFIX,inw)(unsigned long); | ||
16 | u32 IO_CONCAT(__IO_PREFIX,inl)(unsigned long); | ||
17 | |||
18 | void IO_CONCAT(__IO_PREFIX,outb)(u8, unsigned long); | ||
19 | void IO_CONCAT(__IO_PREFIX,outw)(u16, unsigned long); | ||
20 | void IO_CONCAT(__IO_PREFIX,outl)(u32, unsigned long); | ||
21 | |||
22 | u8 IO_CONCAT(__IO_PREFIX,inb_p)(unsigned long); | ||
23 | u16 IO_CONCAT(__IO_PREFIX,inw_p)(unsigned long); | ||
24 | u32 IO_CONCAT(__IO_PREFIX,inl_p)(unsigned long); | ||
25 | void IO_CONCAT(__IO_PREFIX,outb_p)(u8, unsigned long); | ||
26 | void IO_CONCAT(__IO_PREFIX,outw_p)(u16, unsigned long); | ||
27 | void IO_CONCAT(__IO_PREFIX,outl_p)(u32, unsigned long); | ||
28 | |||
29 | void IO_CONCAT(__IO_PREFIX,insb)(unsigned long, void *dst, unsigned long count); | ||
30 | void IO_CONCAT(__IO_PREFIX,insw)(unsigned long, void *dst, unsigned long count); | ||
31 | void IO_CONCAT(__IO_PREFIX,insl)(unsigned long, void *dst, unsigned long count); | ||
32 | void IO_CONCAT(__IO_PREFIX,outsb)(unsigned long, const void *src, unsigned long count); | ||
33 | void IO_CONCAT(__IO_PREFIX,outsw)(unsigned long, const void *src, unsigned long count); | ||
34 | void IO_CONCAT(__IO_PREFIX,outsl)(unsigned long, const void *src, unsigned long count); | ||
35 | |||
36 | void *IO_CONCAT(__IO_PREFIX,ioremap)(unsigned long offset, unsigned long size); | ||
37 | void IO_CONCAT(__IO_PREFIX,iounmap)(void *addr); | ||
38 | |||
39 | void __iomem *IO_CONCAT(__IO_PREFIX,ioport_map)(unsigned long addr, unsigned int size); | 14 | void __iomem *IO_CONCAT(__IO_PREFIX,ioport_map)(unsigned long addr, unsigned int size); |
40 | void IO_CONCAT(__IO_PREFIX,ioport_unmap)(void __iomem *addr); | 15 | void IO_CONCAT(__IO_PREFIX,ioport_unmap)(void __iomem *addr); |
41 | void IO_CONCAT(__IO_PREFIX,mem_init)(void); | 16 | void IO_CONCAT(__IO_PREFIX,mem_init)(void); |
diff --git a/arch/sh/include/asm/machvec.h b/arch/sh/include/asm/machvec.h index a0b0cf79cf8a..dd5d6e5bf204 100644 --- a/arch/sh/include/asm/machvec.h +++ b/arch/sh/include/asm/machvec.h | |||
@@ -23,27 +23,6 @@ struct sh_machine_vector { | |||
23 | void (*mv_init_irq)(void); | 23 | void (*mv_init_irq)(void); |
24 | 24 | ||
25 | #ifdef CONFIG_HAS_IOPORT | 25 | #ifdef CONFIG_HAS_IOPORT |
26 | u8 (*mv_inb)(unsigned long); | ||
27 | u16 (*mv_inw)(unsigned long); | ||
28 | u32 (*mv_inl)(unsigned long); | ||
29 | void (*mv_outb)(u8, unsigned long); | ||
30 | void (*mv_outw)(u16, unsigned long); | ||
31 | void (*mv_outl)(u32, unsigned long); | ||
32 | |||
33 | u8 (*mv_inb_p)(unsigned long); | ||
34 | u16 (*mv_inw_p)(unsigned long); | ||
35 | u32 (*mv_inl_p)(unsigned long); | ||
36 | void (*mv_outb_p)(u8, unsigned long); | ||
37 | void (*mv_outw_p)(u16, unsigned long); | ||
38 | void (*mv_outl_p)(u32, unsigned long); | ||
39 | |||
40 | void (*mv_insb)(unsigned long, void *dst, unsigned long count); | ||
41 | void (*mv_insw)(unsigned long, void *dst, unsigned long count); | ||
42 | void (*mv_insl)(unsigned long, void *dst, unsigned long count); | ||
43 | void (*mv_outsb)(unsigned long, const void *src, unsigned long count); | ||
44 | void (*mv_outsw)(unsigned long, const void *src, unsigned long count); | ||
45 | void (*mv_outsl)(unsigned long, const void *src, unsigned long count); | ||
46 | |||
47 | void __iomem *(*mv_ioport_map)(unsigned long port, unsigned int size); | 26 | void __iomem *(*mv_ioport_map)(unsigned long port, unsigned int size); |
48 | void (*mv_ioport_unmap)(void __iomem *); | 27 | void (*mv_ioport_unmap)(void __iomem *); |
49 | #endif | 28 | #endif |