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authorMatt Fleming <matt@console-pimps.org>2009-12-13 09:38:50 -0500
committerPaul Mundt <lethal@linux-sh.org>2009-12-17 00:31:20 -0500
commit5d9b4b19f118abfb75e352841f7bf74580d7e427 (patch)
tree5b9d0ec51bd12165d842d1d8a208e7568971757b /arch/sh/include
parentb73c806341cfc7492ede6a2ce713cb579547d0ab (diff)
sh: Definitions for 3-level page table layout
If using 64-bit PTEs and 4K pages then each page table has 512 entries (as opposed to 1024 entries with 32-bit PTEs). Unlike MIPS, SH follows the convention that all structures in the page table (pgd_t, pmd_t, pgprot_t, etc) must be the same size. Therefore, 64-bit PTEs require 64-bit PGD entries, etc. Using 2-levels of page tables and 64-bit PTEs it is only possible to map 1GB of virtual address space. In order to map all 4GB of virtual address space we need to adopt a 3-level page table layout. This actually works out better for CONFIG_SUPERH32 because we only waste 2 PGD entries on the P1 and P2 areas (which are untranslated) instead of 256. Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/include')
-rw-r--r--arch/sh/include/asm/pgalloc.h4
-rw-r--r--arch/sh/include/asm/pgalloc_pmd.h41
-rw-r--r--arch/sh/include/asm/pgtable.h4
-rw-r--r--arch/sh/include/asm/pgtable_pmd.h55
4 files changed, 104 insertions, 0 deletions
diff --git a/arch/sh/include/asm/pgalloc.h b/arch/sh/include/asm/pgalloc.h
index fe9f037ac5fd..4ea27855c3b5 100644
--- a/arch/sh/include/asm/pgalloc.h
+++ b/arch/sh/include/asm/pgalloc.h
@@ -6,7 +6,11 @@
6 6
7#define QUICK_PT 1 /* Other page table pages that are zero on free */ 7#define QUICK_PT 1 /* Other page table pages that are zero on free */
8 8
9#ifdef CONFIG_PGTABLE_LEVELS_3
10#include <asm/pgalloc_pmd.h>
11#else
9#include <asm/pgalloc_nopmd.h> 12#include <asm/pgalloc_nopmd.h>
13#endif
10 14
11static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd, 15static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd,
12 pte_t *pte) 16 pte_t *pte)
diff --git a/arch/sh/include/asm/pgalloc_pmd.h b/arch/sh/include/asm/pgalloc_pmd.h
new file mode 100644
index 000000000000..20f75cc4eb09
--- /dev/null
+++ b/arch/sh/include/asm/pgalloc_pmd.h
@@ -0,0 +1,41 @@
1#ifndef __ASM_SH_PGALLOC_PMD_H
2#define __ASM_SH_PGALLOC_PMD_H
3
4static inline pgd_t *pgd_alloc(struct mm_struct *mm)
5{
6 pgd_t *pgd;
7 int i;
8
9 pgd = kzalloc(sizeof(*pgd) * PTRS_PER_PGD, GFP_KERNEL | __GFP_REPEAT);
10
11 for (i = USER_PTRS_PER_PGD; i < PTRS_PER_PGD; i++)
12 pgd[i] = swapper_pg_dir[i];
13
14 return pgd;
15}
16
17static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
18{
19 kfree(pgd);
20}
21
22static inline void __check_pgt_cache(void)
23{
24}
25
26static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd)
27{
28 set_pud(pud, __pud((unsigned long)pmd));
29}
30
31static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)
32{
33 return quicklist_alloc(QUICK_PT, GFP_KERNEL | __GFP_REPEAT, NULL);
34}
35
36static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)
37{
38 quicklist_free(QUICK_PT, NULL, pmd);
39}
40
41#endif /* __ASM_SH_PGALLOC_PMD_H */
diff --git a/arch/sh/include/asm/pgtable.h b/arch/sh/include/asm/pgtable.h
index 9a0f66c1134c..9effcc3b0d10 100644
--- a/arch/sh/include/asm/pgtable.h
+++ b/arch/sh/include/asm/pgtable.h
@@ -12,7 +12,11 @@
12#ifndef __ASM_SH_PGTABLE_H 12#ifndef __ASM_SH_PGTABLE_H
13#define __ASM_SH_PGTABLE_H 13#define __ASM_SH_PGTABLE_H
14 14
15#ifdef CONFIG_PGTABLE_LEVELS_3
16#include <asm/pgtable_pmd.h>
17#else
15#include <asm/pgtable_nopmd.h> 18#include <asm/pgtable_nopmd.h>
19#endif
16#include <asm/page.h> 20#include <asm/page.h>
17 21
18#ifndef __ASSEMBLY__ 22#ifndef __ASSEMBLY__
diff --git a/arch/sh/include/asm/pgtable_pmd.h b/arch/sh/include/asm/pgtable_pmd.h
new file mode 100644
index 000000000000..78dc36e1c2dd
--- /dev/null
+++ b/arch/sh/include/asm/pgtable_pmd.h
@@ -0,0 +1,55 @@
1#ifndef __ASM_SH_PGTABLE_PMD_H
2#define __ASM_SH_PGTABLE_PMD_H
3
4#include <asm-generic/pgtable-nopud.h>
5
6/*
7 * Some cores need a 3-level page table layout, for example when using
8 * 64-bit PTEs and 4K pages.
9 */
10
11#define PTE_MAGNITUDE 3 /* 64-bit PTEs on extended mode SH-X2 TLB */
12
13/* PGD bits */
14#define PGDIR_SHIFT 30
15
16#define PTRS_PER_PGD 4
17#define USER_PTRS_PER_PGD 2
18
19/* PMD bits */
20#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT - 3))
21#define PMD_SIZE (1UL << PMD_SHIFT)
22#define PMD_MASK (~(PMD_SIZE-1))
23
24#define PTRS_PER_PMD (PAGE_SIZE / sizeof(pmd_t))
25
26#define pmd_ERROR(e) \
27 printk("%s:%d: bad pmd %016llx.\n", __FILE__, __LINE__, pmd_val(e))
28
29typedef struct { unsigned long long pmd; } pmd_t;
30#define pmd_val(x) ((x).pmd)
31#define __pmd(x) ((pmd_t) { (x) } )
32
33static inline unsigned long pud_page_vaddr(pud_t pud)
34{
35 return pud_val(pud);
36}
37
38#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
39static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
40{
41 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
42}
43
44#define pud_none(x) (!pud_val(x))
45#define pud_present(x) (pud_val(x))
46#define pud_clear(xp) do { set_pud(xp, __pud(0)); } while (0)
47#define pud_bad(x) (pud_val(x) & ~PAGE_MASK)
48
49/*
50 * (puds are folded into pgds so this doesn't get actually called,
51 * but the define is needed for a generic inline function.)
52 */
53#define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0)
54
55#endif /* __ASM_SH_PGTABLE_PMD_H */