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authorLinus Torvalds <torvalds@linux-foundation.org>2009-04-05 14:15:54 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-04-05 14:15:54 -0400
commit45e36c1666aa6c8b0c538abcf984b336184d8c3f (patch)
treec1f1771d6b02ec210238081450b4a063847b3383 /arch/sh/include
parent87fc94d54b639d8c39fc4a11db0e142f84096e13 (diff)
parent68b42d1b548be1840aff7122fdebeb804daf0fa3 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (23 commits) sh: sh7785lcr: Map whole PCI address space. sh: Fix up DSP context save/restore. sh: Fix up number of on-chip DMA channels on SH7091. sh: update defconfigs. sh: Kill off broken direct-mapped cache mode. sh: Wire up ARCH_HAS_DEFAULT_IDLE for cpuidle. sh: Add a command line option for disabling I/O trapping. sh: Select ARCH_HIBERNATION_POSSIBLE. sh: migor: Fix up CEU use flags. input: migor_ts: add wakeup support rtc: rtc-sh: use set_irq_wake() input: sh_keysc: use enable/disable_irq_wake() sh: intc: set_irq_wake() support sh: intc: install enable, disable and shutdown callbacks clocksource: sh_cmt: use remove_irq() and remove clockevent workaround sh: ap325 and Migo-R use new sh_mobile_ceu_info flags sh: Fix up -Wformat-security whining. sh: ap325rxa: Add ov772x support, again. sh: Sanitize asm/mmu.h for assembly use. sh: Tidy up sh7786 pinmux table. ...
Diffstat (limited to 'arch/sh/include')
-rw-r--r--arch/sh/include/asm/mmu.h35
-rw-r--r--arch/sh/include/asm/processor_32.h13
-rw-r--r--arch/sh/include/asm/ptrace.h8
-rw-r--r--arch/sh/include/asm/system.h1
-rw-r--r--arch/sh/include/asm/system_32.h170
-rw-r--r--arch/sh/include/cpu-sh4/cpu/sh7786.h214
6 files changed, 235 insertions, 206 deletions
diff --git a/arch/sh/include/asm/mmu.h b/arch/sh/include/asm/mmu.h
index 6c43625bb1a5..f5963037c9d6 100644
--- a/arch/sh/include/asm/mmu.h
+++ b/arch/sh/include/asm/mmu.h
@@ -1,22 +1,6 @@
1#ifndef __MMU_H 1#ifndef __MMU_H
2#define __MMU_H 2#define __MMU_H
3 3
4/* Default "unsigned long" context */
5typedef unsigned long mm_context_id_t[NR_CPUS];
6
7typedef struct {
8#ifdef CONFIG_MMU
9 mm_context_id_t id;
10 void *vdso;
11#else
12 unsigned long end_brk;
13#endif
14#ifdef CONFIG_BINFMT_ELF_FDPIC
15 unsigned long exec_fdpic_loadmap;
16 unsigned long interp_fdpic_loadmap;
17#endif
18} mm_context_t;
19
20/* 4/*
21 * Privileged Space Mapping Buffer (PMB) definitions 5 * Privileged Space Mapping Buffer (PMB) definitions
22 */ 6 */
@@ -41,6 +25,24 @@ typedef struct {
41 25
42#define PMB_NO_ENTRY (-1) 26#define PMB_NO_ENTRY (-1)
43 27
28#ifndef __ASSEMBLY__
29
30/* Default "unsigned long" context */
31typedef unsigned long mm_context_id_t[NR_CPUS];
32
33typedef struct {
34#ifdef CONFIG_MMU
35 mm_context_id_t id;
36 void *vdso;
37#else
38 unsigned long end_brk;
39#endif
40#ifdef CONFIG_BINFMT_ELF_FDPIC
41 unsigned long exec_fdpic_loadmap;
42 unsigned long interp_fdpic_loadmap;
43#endif
44} mm_context_t;
45
44struct pmb_entry; 46struct pmb_entry;
45 47
46struct pmb_entry { 48struct pmb_entry {
@@ -70,6 +72,7 @@ void pmb_free(struct pmb_entry *pmbe);
70long pmb_remap(unsigned long virt, unsigned long phys, 72long pmb_remap(unsigned long virt, unsigned long phys,
71 unsigned long size, unsigned long flags); 73 unsigned long size, unsigned long flags);
72void pmb_unmap(unsigned long addr); 74void pmb_unmap(unsigned long addr);
75#endif /* __ASSEMBLY__ */
73 76
74#endif /* __MMU_H */ 77#endif /* __MMU_H */
75 78
diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h
index efdd78a53b11..9a8714945dc9 100644
--- a/arch/sh/include/asm/processor_32.h
+++ b/arch/sh/include/asm/processor_32.h
@@ -58,6 +58,14 @@ asmlinkage void __init sh_cpu_init(void);
58#define SR_FD 0x00008000 58#define SR_FD 0x00008000
59 59
60/* 60/*
61 * DSP structure and data
62 */
63struct sh_dsp_struct {
64 unsigned long dsp_regs[14];
65 long status;
66};
67
68/*
61 * FPU structure and data 69 * FPU structure and data
62 */ 70 */
63 71
@@ -96,6 +104,11 @@ struct thread_struct {
96 104
97 /* floating point info */ 105 /* floating point info */
98 union sh_fpu_union fpu; 106 union sh_fpu_union fpu;
107
108#ifdef CONFIG_SH_DSP
109 /* Dsp status information */
110 struct sh_dsp_struct dsp_status;
111#endif
99}; 112};
100 113
101/* Count of active tasks with UBC settings */ 114/* Count of active tasks with UBC settings */
diff --git a/arch/sh/include/asm/ptrace.h b/arch/sh/include/asm/ptrace.h
index 81c6568fdb3e..d3f6caa936b0 100644
--- a/arch/sh/include/asm/ptrace.h
+++ b/arch/sh/include/asm/ptrace.h
@@ -119,16 +119,8 @@ struct task_struct;
119extern void user_enable_single_step(struct task_struct *); 119extern void user_enable_single_step(struct task_struct *);
120extern void user_disable_single_step(struct task_struct *); 120extern void user_disable_single_step(struct task_struct *);
121 121
122#ifdef CONFIG_SH_DSP
123#define task_pt_regs(task) \
124 ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE \
125 - sizeof(struct pt_dspregs)) - 1)
126#define task_pt_dspregs(task) \
127 ((struct pt_dspregs *) (task_stack_page(task) + THREAD_SIZE) - 1)
128#else
129#define task_pt_regs(task) \ 122#define task_pt_regs(task) \
130 ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE) - 1) 123 ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE) - 1)
131#endif
132 124
133static inline unsigned long profile_pc(struct pt_regs *regs) 125static inline unsigned long profile_pc(struct pt_regs *regs)
134{ 126{
diff --git a/arch/sh/include/asm/system.h b/arch/sh/include/asm/system.h
index c9ec6af8e745..a88895e6dcb0 100644
--- a/arch/sh/include/asm/system.h
+++ b/arch/sh/include/asm/system.h
@@ -153,6 +153,7 @@ extern unsigned long cached_to_uncached;
153extern struct dentry *sh_debugfs_root; 153extern struct dentry *sh_debugfs_root;
154 154
155void per_cpu_trap_init(void); 155void per_cpu_trap_init(void);
156void default_idle(void);
156 157
157asmlinkage void break_point_trap(void); 158asmlinkage void break_point_trap(void);
158 159
diff --git a/arch/sh/include/asm/system_32.h b/arch/sh/include/asm/system_32.h
index a726d5d07277..240b31e1142c 100644
--- a/arch/sh/include/asm/system_32.h
+++ b/arch/sh/include/asm/system_32.h
@@ -3,59 +3,135 @@
3 3
4#include <linux/types.h> 4#include <linux/types.h>
5 5
6#ifdef CONFIG_SH_DSP
7
8#define is_dsp_enabled(tsk) \
9 (!!(tsk->thread.dsp_status.status & SR_DSP))
10
11#define __restore_dsp(tsk) \
12do { \
13 register u32 *__ts2 __asm__ ("r2") = \
14 (u32 *)&tsk->thread.dsp_status; \
15 __asm__ __volatile__ ( \
16 ".balign 4\n\t" \
17 "movs.l @r2+, a1\n\t" \
18 "movs.l @r2+, a0g\n\t" \
19 "movs.l @r2+, a1g\n\t" \
20 "movs.l @r2+, m0\n\t" \
21 "movs.l @r2+, m1\n\t" \
22 "movs.l @r2+, a0\n\t" \
23 "movs.l @r2+, x0\n\t" \
24 "movs.l @r2+, x1\n\t" \
25 "movs.l @r2+, y0\n\t" \
26 "movs.l @r2+, y1\n\t" \
27 "lds.l @r2+, dsr\n\t" \
28 "ldc.l @r2+, rs\n\t" \
29 "ldc.l @r2+, re\n\t" \
30 "ldc.l @r2+, mod\n\t" \
31 : : "r" (__ts2)); \
32} while (0)
33
34
35#define __save_dsp(tsk) \
36do { \
37 register u32 *__ts2 __asm__ ("r2") = \
38 (u32 *)&tsk->thread.dsp_status + 14; \
39 \
40 __asm__ __volatile__ ( \
41 ".balign 4\n\t" \
42 "stc.l mod, @-r2\n\t" \
43 "stc.l re, @-r2\n\t" \
44 "stc.l rs, @-r2\n\t" \
45 "sts.l dsr, @-r2\n\t" \
46 "sts.l y1, @-r2\n\t" \
47 "sts.l y0, @-r2\n\t" \
48 "sts.l x1, @-r2\n\t" \
49 "sts.l x0, @-r2\n\t" \
50 "sts.l a0, @-r2\n\t" \
51 ".word 0xf653 ! movs.l a1, @-r2\n\t" \
52 ".word 0xf6f3 ! movs.l a0g, @-r2\n\t" \
53 ".word 0xf6d3 ! movs.l a1g, @-r2\n\t" \
54 ".word 0xf6c3 ! movs.l m0, @-r2\n\t" \
55 ".word 0xf6e3 ! movs.l m1, @-r2\n\t" \
56 : : "r" (__ts2)); \
57} while (0)
58
59#else
60
61#define is_dsp_enabled(tsk) (0)
62#define __save_dsp(tsk) do { } while (0)
63#define __restore_dsp(tsk) do { } while (0)
64#endif
65
6struct task_struct *__switch_to(struct task_struct *prev, 66struct task_struct *__switch_to(struct task_struct *prev,
7 struct task_struct *next); 67 struct task_struct *next);
8 68
9/* 69/*
10 * switch_to() should switch tasks to task nr n, first 70 * switch_to() should switch tasks to task nr n, first
11 */ 71 */
12#define switch_to(prev, next, last) \ 72#define switch_to(prev, next, last) \
13do { \ 73do { \
14 register u32 *__ts1 __asm__ ("r1") = (u32 *)&prev->thread.sp; \ 74 register u32 *__ts1 __asm__ ("r1"); \
15 register u32 *__ts2 __asm__ ("r2") = (u32 *)&prev->thread.pc; \ 75 register u32 *__ts2 __asm__ ("r2"); \
16 register u32 *__ts4 __asm__ ("r4") = (u32 *)prev; \ 76 register u32 *__ts4 __asm__ ("r4"); \
17 register u32 *__ts5 __asm__ ("r5") = (u32 *)next; \ 77 register u32 *__ts5 __asm__ ("r5"); \
18 register u32 *__ts6 __asm__ ("r6") = (u32 *)&next->thread.sp; \ 78 register u32 *__ts6 __asm__ ("r6"); \
19 register u32 __ts7 __asm__ ("r7") = next->thread.pc; \ 79 register u32 __ts7 __asm__ ("r7"); \
20 struct task_struct *__last; \ 80 struct task_struct *__last; \
21 \ 81 \
22 __asm__ __volatile__ ( \ 82 if (is_dsp_enabled(prev)) \
23 ".balign 4\n\t" \ 83 __save_dsp(prev); \
24 "stc.l gbr, @-r15\n\t" \ 84 \
25 "sts.l pr, @-r15\n\t" \ 85 __ts1 = (u32 *)&prev->thread.sp; \
26 "mov.l r8, @-r15\n\t" \ 86 __ts2 = (u32 *)&prev->thread.pc; \
27 "mov.l r9, @-r15\n\t" \ 87 __ts4 = (u32 *)prev; \
28 "mov.l r10, @-r15\n\t" \ 88 __ts5 = (u32 *)next; \
29 "mov.l r11, @-r15\n\t" \ 89 __ts6 = (u32 *)&next->thread.sp; \
30 "mov.l r12, @-r15\n\t" \ 90 __ts7 = next->thread.pc; \
31 "mov.l r13, @-r15\n\t" \ 91 \
32 "mov.l r14, @-r15\n\t" \ 92 __asm__ __volatile__ ( \
33 "mov.l r15, @r1\t! save SP\n\t" \ 93 ".balign 4\n\t" \
34 "mov.l @r6, r15\t! change to new stack\n\t" \ 94 "stc.l gbr, @-r15\n\t" \
35 "mova 1f, %0\n\t" \ 95 "sts.l pr, @-r15\n\t" \
36 "mov.l %0, @r2\t! save PC\n\t" \ 96 "mov.l r8, @-r15\n\t" \
37 "mov.l 2f, %0\n\t" \ 97 "mov.l r9, @-r15\n\t" \
38 "jmp @%0\t! call __switch_to\n\t" \ 98 "mov.l r10, @-r15\n\t" \
39 " lds r7, pr\t! with return to new PC\n\t" \ 99 "mov.l r11, @-r15\n\t" \
40 ".balign 4\n" \ 100 "mov.l r12, @-r15\n\t" \
41 "2:\n\t" \ 101 "mov.l r13, @-r15\n\t" \
42 ".long __switch_to\n" \ 102 "mov.l r14, @-r15\n\t" \
43 "1:\n\t" \ 103 "mov.l r15, @r1\t! save SP\n\t" \
44 "mov.l @r15+, r14\n\t" \ 104 "mov.l @r6, r15\t! change to new stack\n\t" \
45 "mov.l @r15+, r13\n\t" \ 105 "mova 1f, %0\n\t" \
46 "mov.l @r15+, r12\n\t" \ 106 "mov.l %0, @r2\t! save PC\n\t" \
47 "mov.l @r15+, r11\n\t" \ 107 "mov.l 2f, %0\n\t" \
48 "mov.l @r15+, r10\n\t" \ 108 "jmp @%0\t! call __switch_to\n\t" \
49 "mov.l @r15+, r9\n\t" \ 109 " lds r7, pr\t! with return to new PC\n\t" \
50 "mov.l @r15+, r8\n\t" \ 110 ".balign 4\n" \
51 "lds.l @r15+, pr\n\t" \ 111 "2:\n\t" \
52 "ldc.l @r15+, gbr\n\t" \ 112 ".long __switch_to\n" \
53 : "=z" (__last) \ 113 "1:\n\t" \
54 : "r" (__ts1), "r" (__ts2), "r" (__ts4), \ 114 "mov.l @r15+, r14\n\t" \
55 "r" (__ts5), "r" (__ts6), "r" (__ts7) \ 115 "mov.l @r15+, r13\n\t" \
56 : "r3", "t"); \ 116 "mov.l @r15+, r12\n\t" \
57 \ 117 "mov.l @r15+, r11\n\t" \
58 last = __last; \ 118 "mov.l @r15+, r10\n\t" \
119 "mov.l @r15+, r9\n\t" \
120 "mov.l @r15+, r8\n\t" \
121 "lds.l @r15+, pr\n\t" \
122 "ldc.l @r15+, gbr\n\t" \
123 : "=z" (__last) \
124 : "r" (__ts1), "r" (__ts2), "r" (__ts4), \
125 "r" (__ts5), "r" (__ts6), "r" (__ts7) \
126 : "r3", "t"); \
127 \
128 last = __last; \
129} while (0)
130
131#define finish_arch_switch(prev) \
132do { \
133 if (is_dsp_enabled(prev)) \
134 __restore_dsp(prev); \
59} while (0) 135} while (0)
60 136
61#define __uses_jump_to_uncached \ 137#define __uses_jump_to_uncached \
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7786.h b/arch/sh/include/cpu-sh4/cpu/sh7786.h
index 48688adc0c84..977862f9072a 100644
--- a/arch/sh/include/cpu-sh4/cpu/sh7786.h
+++ b/arch/sh/include/cpu-sh4/cpu/sh7786.h
@@ -51,142 +51,86 @@ enum {
51 GPIO_PJ7, GPIO_PJ6, GPIO_PJ5, GPIO_PJ4, 51 GPIO_PJ7, GPIO_PJ6, GPIO_PJ5, GPIO_PJ4,
52 GPIO_PJ3, GPIO_PJ2, GPIO_PJ1, GPIO_PJ0, 52 GPIO_PJ3, GPIO_PJ2, GPIO_PJ1, GPIO_PJ0,
53 53
54 GPIO_FN_CDE, 54 /* DU */
55 GPIO_FN_ETH_MAGIC, 55 GPIO_FN_DCLKIN, GPIO_FN_DCLKOUT, GPIO_FN_ODDF,
56 GPIO_FN_DISP, 56 GPIO_FN_VSYNC, GPIO_FN_HSYNC, GPIO_FN_CDE, GPIO_FN_DISP,
57 GPIO_FN_ETH_LINK, 57 GPIO_FN_DR0, GPIO_FN_DG0, GPIO_FN_DB0,
58 GPIO_FN_DR5, 58 GPIO_FN_DR1, GPIO_FN_DG1, GPIO_FN_DB1,
59 GPIO_FN_ETH_TX_ER, 59 GPIO_FN_DR2, GPIO_FN_DG2, GPIO_FN_DB2,
60 GPIO_FN_DR4, 60 GPIO_FN_DR3, GPIO_FN_DG3, GPIO_FN_DB3,
61 GPIO_FN_ETH_TX_EN, 61 GPIO_FN_DR4, GPIO_FN_DG4, GPIO_FN_DB4,
62 GPIO_FN_DR3, 62 GPIO_FN_DR5, GPIO_FN_DG5, GPIO_FN_DB5,
63 GPIO_FN_ETH_TXD3, 63
64 GPIO_FN_DR2, 64 /* Eth */
65 GPIO_FN_ETH_TXD2, 65 GPIO_FN_ETH_MAGIC, GPIO_FN_ETH_LINK, GPIO_FN_ETH_TX_ER,
66 GPIO_FN_DR1, 66 GPIO_FN_ETH_TX_EN, GPIO_FN_ETH_MDIO, GPIO_FN_ETH_RX_CLK,
67 GPIO_FN_ETH_TXD1, 67 GPIO_FN_ETH_MDC, GPIO_FN_ETH_COL, GPIO_FN_ETH_TX_CLK,
68 GPIO_FN_DR0, 68 GPIO_FN_ETH_CRS, GPIO_FN_ETH_RX_DV, GPIO_FN_ETH_RX_ER,
69 GPIO_FN_ETH_TXD0, 69 GPIO_FN_ETH_TXD3, GPIO_FN_ETH_TXD2, GPIO_FN_ETH_TXD1, GPIO_FN_ETH_TXD0,
70 GPIO_FN_VSYNC, 70 GPIO_FN_ETH_RXD3, GPIO_FN_ETH_RXD2, GPIO_FN_ETH_RXD1, GPIO_FN_ETH_RXD0,
71 GPIO_FN_HSPI_CLK, 71
72 GPIO_FN_ODDF, 72 /* HSPI */
73 GPIO_FN_HSPI_CS, 73 GPIO_FN_HSPI_CLK, GPIO_FN_HSPI_CS, GPIO_FN_HSPI_RX, GPIO_FN_HSPI_TX,
74 GPIO_FN_DG5, 74
75 GPIO_FN_ETH_MDIO, 75 /* SCIF0 */
76 GPIO_FN_DG4, 76 GPIO_FN_SCIF0_CTS, GPIO_FN_SCIF0_RTS, GPIO_FN_SCIF0_SCK,
77 GPIO_FN_ETH_RX_CLK, 77 GPIO_FN_SCIF0_RXD, GPIO_FN_SCIF0_TXD,
78 GPIO_FN_DG3, 78
79 GPIO_FN_ETH_MDC, 79 /* SCIF1 */
80 GPIO_FN_DG2, 80 GPIO_FN_SCIF1_SCK, GPIO_FN_SCIF1_RXD, GPIO_FN_SCIF1_TXD,
81 GPIO_FN_ETH_COL, 81
82 GPIO_FN_DG1, 82 /* SCIF3 */
83 GPIO_FN_ETH_TX_CLK, 83 GPIO_FN_SCIF3_SCK, GPIO_FN_SCIF3_RXD, GPIO_FN_SCIF3_TXD,
84 GPIO_FN_DG0, 84
85 GPIO_FN_ETH_CRS, 85 /* SCIF4 */
86 GPIO_FN_DCLKIN, 86 GPIO_FN_SCIF4_SCK, GPIO_FN_SCIF4_RXD, GPIO_FN_SCIF4_TXD,
87 GPIO_FN_HSPI_RX, 87
88 GPIO_FN_HSYNC, 88 /* SCIF5 */
89 GPIO_FN_HSPI_TX, 89 GPIO_FN_SCIF5_SCK, GPIO_FN_SCIF5_RXD, GPIO_FN_SCIF5_TXD,
90 GPIO_FN_DB5, 90
91 GPIO_FN_ETH_RXD3, 91 /* LBSC */
92 GPIO_FN_DB4, 92 GPIO_FN_BREQ, GPIO_FN_IOIS16, GPIO_FN_CE2B, GPIO_FN_CE2A, GPIO_FN_BACK,
93 GPIO_FN_ETH_RXD2, 93
94 GPIO_FN_DB3, 94 /* FLCTL */
95 GPIO_FN_ETH_RXD1, 95 GPIO_FN_FALE, GPIO_FN_FRB, GPIO_FN_FSTATUS,
96 GPIO_FN_DB2, 96 GPIO_FN_FSE, GPIO_FN_FCLE,
97 GPIO_FN_ETH_RXD0, 97
98 GPIO_FN_DB1, 98 /* DMAC */
99 GPIO_FN_ETH_RX_DV, 99 GPIO_FN_DACK0, GPIO_FN_DREQ0, GPIO_FN_DRAK0,
100 GPIO_FN_DB0, 100 GPIO_FN_DACK1, GPIO_FN_DREQ1, GPIO_FN_DRAK1,
101 GPIO_FN_ETH_RX_ER, 101 GPIO_FN_DACK2, GPIO_FN_DREQ2, GPIO_FN_DRAK2,
102 GPIO_FN_DCLKOUT, 102 GPIO_FN_DACK3, GPIO_FN_DREQ3, GPIO_FN_DRAK3,
103 GPIO_FN_SCIF1_SLK, 103
104 GPIO_FN_SCIF1_RXD, 104 /* USB */
105 GPIO_FN_SCIF1_TXD, 105 GPIO_FN_USB_OVC0, GPIO_FN_USB_PENC0,
106 GPIO_FN_DACK1, 106 GPIO_FN_USB_OVC1, GPIO_FN_USB_PENC1,
107 GPIO_FN_BACK, 107
108 GPIO_FN_FALE, 108 /* HAC */
109 GPIO_FN_DACK0,
110 GPIO_FN_FCLE,
111 GPIO_FN_DREQ1,
112 GPIO_FN_BREQ,
113 GPIO_FN_USB_OVC1,
114 GPIO_FN_DREQ0,
115 GPIO_FN_USB_OVC0,
116 GPIO_FN_USB_PENC1,
117 GPIO_FN_USB_PENC0,
118 GPIO_FN_HAC1_SDOUT,
119 GPIO_FN_SSI1_SDATA,
120 GPIO_FN_SDIF1CMD,
121 GPIO_FN_HAC1_SDIN,
122 GPIO_FN_SSI1_SCK,
123 GPIO_FN_SDIF1CD,
124 GPIO_FN_HAC1_SYNC,
125 GPIO_FN_SSI1_WS,
126 GPIO_FN_SDIF1WP,
127 GPIO_FN_HAC1_BITCLK,
128 GPIO_FN_SSI1_CLK,
129 GPIO_FN_SDIF1CLK,
130 GPIO_FN_HAC0_SDOUT,
131 GPIO_FN_SSI0_SDATA,
132 GPIO_FN_SDIF1D3,
133 GPIO_FN_HAC0_SDIN,
134 GPIO_FN_SSI0_SCK,
135 GPIO_FN_SDIF1D2,
136 GPIO_FN_HAC0_SYNC,
137 GPIO_FN_SSI0_WS,
138 GPIO_FN_SDIF1D1,
139 GPIO_FN_HAC0_BITCLK,
140 GPIO_FN_SSI0_CLK,
141 GPIO_FN_SDIF1D0,
142 GPIO_FN_SCIF3_SCK,
143 GPIO_FN_SSI2_SDATA,
144 GPIO_FN_SCIF3_RXD,
145 GPIO_FN_TCLK,
146 GPIO_FN_SSI2_SCK,
147 GPIO_FN_SCIF3_TXD,
148 GPIO_FN_HAC_RES, 109 GPIO_FN_HAC_RES,
149 GPIO_FN_SSI2_WS, 110 GPIO_FN_HAC0_SDOUT, GPIO_FN_HAC0_SDIN,
150 GPIO_FN_DACK3, 111 GPIO_FN_HAC0_SYNC, GPIO_FN_HAC0_BITCLK,
151 GPIO_FN_SDIF0CMD, 112 GPIO_FN_HAC1_SDOUT, GPIO_FN_HAC1_SDIN,
152 GPIO_FN_DACK2, 113 GPIO_FN_HAC1_SYNC, GPIO_FN_HAC1_BITCLK,
153 GPIO_FN_SDIF0CD, 114
154 GPIO_FN_DREQ3, 115 /* SSI */
155 GPIO_FN_SDIF0WP, 116 GPIO_FN_SSI0_SDATA, GPIO_FN_SSI0_SCK, GPIO_FN_SSI0_WS, GPIO_FN_SSI0_CLK,
156 GPIO_FN_SCIF0_CTS, 117 GPIO_FN_SSI1_SDATA, GPIO_FN_SSI1_SCK, GPIO_FN_SSI1_WS, GPIO_FN_SSI1_CLK,
157 GPIO_FN_DREQ2, 118 GPIO_FN_SSI2_SDATA, GPIO_FN_SSI2_SCK, GPIO_FN_SSI2_WS,
158 GPIO_FN_SDIF0CLK, 119 GPIO_FN_SSI3_SDATA, GPIO_FN_SSI3_SCK, GPIO_FN_SSI3_WS,
159 GPIO_FN_SCIF0_RTS, 120
160 GPIO_FN_IRL7, 121 /* SDIF1 */
161 GPIO_FN_SDIF0D3, 122 GPIO_FN_SDIF1CMD, GPIO_FN_SDIF1CD, GPIO_FN_SDIF1WP, GPIO_FN_SDIF1CLK,
162 GPIO_FN_SCIF0_SCK, 123 GPIO_FN_SDIF1D3, GPIO_FN_SDIF1D2, GPIO_FN_SDIF1D1, GPIO_FN_SDIF1D0,
163 GPIO_FN_IRL6, 124
164 GPIO_FN_SDIF0D2, 125 /* SDIF0 */
165 GPIO_FN_SCIF0_RXD, 126 GPIO_FN_SDIF0CMD, GPIO_FN_SDIF0CD, GPIO_FN_SDIF0WP, GPIO_FN_SDIF0CLK,
166 GPIO_FN_IRL5, 127 GPIO_FN_SDIF0D3, GPIO_FN_SDIF0D2, GPIO_FN_SDIF0D1, GPIO_FN_SDIF0D0,
167 GPIO_FN_SDIF0D1, 128
168 GPIO_FN_SCIF0_TXD, 129 /* TMU */
169 GPIO_FN_IRL4, 130 GPIO_FN_TCLK,
170 GPIO_FN_SDIF0D0, 131
171 GPIO_FN_SCIF5_SCK, 132 /* INTC */
172 GPIO_FN_FRB, 133 GPIO_FN_IRL7, GPIO_FN_IRL6, GPIO_FN_IRL5, GPIO_FN_IRL4,
173 GPIO_FN_SCIF5_RXD,
174 GPIO_FN_IOIS16,
175 GPIO_FN_SCIF5_TXD,
176 GPIO_FN_CE2B,
177 GPIO_FN_DRAK3,
178 GPIO_FN_CE2A,
179 GPIO_FN_SCIF4_SCK,
180 GPIO_FN_DRAK2,
181 GPIO_FN_SSI3_WS,
182 GPIO_FN_SCIF4_RXD,
183 GPIO_FN_DRAK1,
184 GPIO_FN_SSI3_SDATA,
185 GPIO_FN_FSTATUS,
186 GPIO_FN_SCIF4_TXD,
187 GPIO_FN_DRAK0,
188 GPIO_FN_SSI3_SCK,
189 GPIO_FN_FSE,
190}; 134};
191 135
192#endif /* __CPU_SH7786_H__ */ 136#endif /* __CPU_SH7786_H__ */
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-03 14:25:25 -0500