diff options
author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2012-10-30 14:39:02 -0400 |
---|---|---|
committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2012-10-30 14:39:02 -0400 |
commit | 31271e9aacaa3c3460cbad8ec62fb5a04a522f5b (patch) | |
tree | 815c671dac14e0e07959dc88e94c36a994f9c460 /arch/sh/include/uapi/asm/auxvec.h | |
parent | 32111abb508424d1d110fa471d940160abe251f5 (diff) | |
parent | dc4dc36056392c0b0b1ca9e81bebff964b9297e0 (diff) |
Merge branch 'spi-tegra' into spi-next
Diffstat (limited to 'arch/sh/include/uapi/asm/auxvec.h')
-rw-r--r-- | arch/sh/include/uapi/asm/auxvec.h | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/sh/include/uapi/asm/auxvec.h b/arch/sh/include/uapi/asm/auxvec.h new file mode 100644 index 000000000000..8bcc51af9367 --- /dev/null +++ b/arch/sh/include/uapi/asm/auxvec.h | |||
@@ -0,0 +1,38 @@ | |||
1 | #ifndef __ASM_SH_AUXVEC_H | ||
2 | #define __ASM_SH_AUXVEC_H | ||
3 | |||
4 | /* | ||
5 | * Architecture-neutral AT_ values in 0-17, leave some room | ||
6 | * for more of them. | ||
7 | */ | ||
8 | |||
9 | /* | ||
10 | * This entry gives some information about the FPU initialization | ||
11 | * performed by the kernel. | ||
12 | */ | ||
13 | #define AT_FPUCW 18 /* Used FPU control word. */ | ||
14 | |||
15 | #if defined(CONFIG_VSYSCALL) || !defined(__KERNEL__) | ||
16 | /* | ||
17 | * Only define this in the vsyscall case, the entry point to | ||
18 | * the vsyscall page gets placed here. The kernel will attempt | ||
19 | * to build a gate VMA we don't care about otherwise.. | ||
20 | */ | ||
21 | #define AT_SYSINFO_EHDR 33 | ||
22 | #endif | ||
23 | |||
24 | /* | ||
25 | * More complete cache descriptions than AT_[DIU]CACHEBSIZE. If the | ||
26 | * value is -1, then the cache doesn't exist. Otherwise: | ||
27 | * | ||
28 | * bit 0-3: Cache set-associativity; 0 means fully associative. | ||
29 | * bit 4-7: Log2 of cacheline size. | ||
30 | * bit 8-31: Size of the entire cache >> 8. | ||
31 | */ | ||
32 | #define AT_L1I_CACHESHAPE 34 | ||
33 | #define AT_L1D_CACHESHAPE 35 | ||
34 | #define AT_L2_CACHESHAPE 36 | ||
35 | |||
36 | #define AT_VECTOR_SIZE_ARCH 5 /* entries in ARCH_DLINFO */ | ||
37 | |||
38 | #endif /* __ASM_SH_AUXVEC_H */ | ||