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authorPaul Mundt <lethal@linux-sh.org>2008-12-17 00:41:54 -0500
committerPaul Mundt <lethal@linux-sh.org>2008-12-22 04:44:46 -0500
commit073da9c0de401e8683b6bc76c008a7e0850045d5 (patch)
tree7b843de420aec114f3ed497813ca9e5913d7e157 /arch/sh/include/mach-se
parent8c197c3afb4a9026973315cc6a3c189dd8434053 (diff)
sh: Kill off cf-enabler with extreme prejudice.
Now that the rest of the boards that were using cf-enabler "generically" have switched to setting up their mappings on their own, only the mach-se boards were left using it. All of the cf-enabler using mach-se boards use a special initialization of the MRSHPC windows rather than going through the special PTE as other SH-4 platforms do. This consolidates the MRSHPC setup logic, hooks it up on the boards that care, and gets rid of any and all remaining references to cf-enabler. This has been long overdue, as cf-enabler has been the bane of arch/sh/kernel for the last 7 years. Good riddance. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/include/mach-se')
-rw-r--r--arch/sh/include/mach-se/mach/mrshpc.h52
1 files changed, 52 insertions, 0 deletions
diff --git a/arch/sh/include/mach-se/mach/mrshpc.h b/arch/sh/include/mach-se/mach/mrshpc.h
new file mode 100644
index 000000000000..95c8b8254015
--- /dev/null
+++ b/arch/sh/include/mach-se/mach/mrshpc.h
@@ -0,0 +1,52 @@
1#ifndef __MACH_SE_MRSHPC_H
2#define __MACH_SE_MRSHPC_H
3
4#include <linux/io.h>
5
6static void __init mrshpc_setup_windows(void)
7{
8 if ((__raw_readw(MRSHPC_CSR) & 0x000c) != 0)
9 return; /* Not detected */
10
11 if ((__raw_readw(MRSHPC_CSR) & 0x0080) == 0) {
12 __raw_writew(0x0674, MRSHPC_CPWCR); /* Card Vcc is 3.3v? */
13 } else {
14 __raw_writew(0x0678, MRSHPC_CPWCR); /* Card Vcc is 5V */
15 }
16
17 /*
18 * PC-Card window open
19 * flag == COMMON/ATTRIBUTE/IO
20 */
21 /* common window open */
22 __raw_writew(0x8a84, MRSHPC_MW0CR1);
23 if((__raw_readw(MRSHPC_CSR) & 0x4000) != 0)
24 /* common mode & bus width 16bit SWAP = 1*/
25 __raw_writew(0x0b00, MRSHPC_MW0CR2);
26 else
27 /* common mode & bus width 16bit SWAP = 0*/
28 __raw_writew(0x0300, MRSHPC_MW0CR2);
29
30 /* attribute window open */
31 __raw_writew(0x8a85, MRSHPC_MW1CR1);
32 if ((__raw_readw(MRSHPC_CSR) & 0x4000) != 0)
33 /* attribute mode & bus width 16bit SWAP = 1*/
34 __raw_writew(0x0a00, MRSHPC_MW1CR2);
35 else
36 /* attribute mode & bus width 16bit SWAP = 0*/
37 __raw_writew(0x0200, MRSHPC_MW1CR2);
38
39 /* I/O window open */
40 __raw_writew(0x8a86, MRSHPC_IOWCR1);
41 __raw_writew(0x0008, MRSHPC_CDCR); /* I/O card mode */
42 if ((__raw_readw(MRSHPC_CSR) & 0x4000) != 0)
43 __raw_writew(0x0a00, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 1*/
44 else
45 __raw_writew(0x0200, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 0*/
46
47 __raw_writew(0x2000, MRSHPC_ICR);
48 __raw_writeb(0x00, PA_MRSHPC_MW2 + 0x206);
49 __raw_writeb(0x42, PA_MRSHPC_MW2 + 0x200);
50}
51
52#endif /* __MACH_SE_MRSHPC_H */