sh: mach-se: Convert SE7343 FPGA to dynamic IRQ allocation.

This gets rid of the arbitrary set of vectors used by the SE7722 FPGA
interrupt controller and switches over to a completely dynamic set.
No assumptions regarding a contiguous range are made, and the platform
resources themselves need to be filled in lazily.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

1 files changed, 22 insertions, 30 deletions

diff --git a/arch/sh/include/mach-se/mach/se7343.h b/arch/sh/include/mach-se/mach/se7343.h
index 749914b400fb..8d8170d6cc43 100644
--- a/arch/sh/include/mach-se/mach/se7343.h
+++ b/arch/sh/include/mach-se/mach/se7343.h
@@ -94,26 +94,26 @@
 
 #define PORT_DRVCR      0xA4050180
 
-#define PORT_PADR       0xA4050120
-#define PORT_PBDR       0xA4050122
-#define PORT_PCDR       0xA4050124
-#define PORT_PDDR       0xA4050126
-#define PORT_PEDR       0xA4050128
-#define PORT_PFDR       0xA405012A
-#define PORT_PGDR       0xA405012C
-#define PORT_PHDR       0xA405012E
-#define PORT_PJDR       0xA4050130
-#define PORT_PKDR       0xA4050132
-#define PORT_PLDR       0xA4050134
-#define PORT_PMDR       0xA4050136
-#define PORT_PNDR       0xA4050138
-#define PORT_PQDR       0xA405013A
-#define PORT_PRDR       0xA405013C
-#define PORT_PTDR       0xA4050160
-#define PORT_PUDR       0xA4050162
-#define PORT_PVDR       0xA4050164
-#define PORT_PWDR       0xA4050166
-#define PORT_PYDR       0xA4050168
+#define PORT_PADR       0xA4050120
+#define PORT_PBDR       0xA4050122
+#define PORT_PCDR       0xA4050124
+#define PORT_PDDR       0xA4050126
+#define PORT_PEDR       0xA4050128
+#define PORT_PFDR       0xA405012A
+#define PORT_PGDR       0xA405012C
+#define PORT_PHDR       0xA405012E
+#define PORT_PJDR       0xA4050130
+#define PORT_PKDR       0xA4050132
+#define PORT_PLDR       0xA4050134
+#define PORT_PMDR       0xA4050136
+#define PORT_PNDR       0xA4050138
+#define PORT_PQDR       0xA405013A
+#define PORT_PRDR       0xA405013C
+#define PORT_PTDR       0xA4050160
+#define PORT_PUDR       0xA4050162
+#define PORT_PVDR       0xA4050164
+#define PORT_PWDR       0xA4050166
+#define PORT_PYDR       0xA4050168
 
 #define FPGA_IN         0xb1400000
 #define FPGA_OUT        0xb1400002
@@ -133,18 +133,10 @@
 #define SE7343_FPGA_IRQ_UARTB   11
 
 #define SE7343_FPGA_IRQ_NR      12
-#define SE7343_FPGA_IRQ_BASE    120
-
-#define MRSHPC_IRQ3     (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC3)
-#define MRSHPC_IRQ2     (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC2)
-#define MRSHPC_IRQ1     (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC1)
-#define MRSHPC_IRQ0     (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC0)
-#define SMC_IRQ         (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_SMC)
-#define USB_IRQ         (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_USB)
-#define UARTA_IRQ       (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_UARTA)
-#define UARTB_IRQ       (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_UARTB)
 
 /* arch/sh/boards/se/7343/irq.c */
+extern unsigned int se7343_fpga_irq[];
+
 void init_7343se_IRQ(void);
 
 #endif  /* __ASM_SH_HITACHI_SE7343_H */