diff options
author | Paul Mundt <lethal@linux-sh.org> | 2008-07-29 09:52:49 -0400 |
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committer | Paul Mundt <lethal@linux-sh.org> | 2008-07-29 09:52:49 -0400 |
commit | 51f3547d619956e9b428bfff17004d8f4d259a02 (patch) | |
tree | 8e035f60124ece835a9acb3cf84dc2af887cefc3 /arch/sh/include/cpu-sh3 | |
parent | 93dc544cf4892b9188d7d0d4946b0394020b4551 (diff) |
sh: Allow SH-3 and SH-5 to use common headers.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/include/cpu-sh3')
-rw-r--r-- | arch/sh/include/cpu-sh3/cpu/addrspace.h | 19 | ||||
-rw-r--r-- | arch/sh/include/cpu-sh3/cpu/cacheflush.h | 36 | ||||
-rw-r--r-- | arch/sh/include/cpu-sh3/cpu/rtc.h | 8 | ||||
-rw-r--r-- | arch/sh/include/cpu-sh3/cpu/sigcontext.h | 17 |
4 files changed, 1 insertions, 79 deletions
diff --git a/arch/sh/include/cpu-sh3/cpu/addrspace.h b/arch/sh/include/cpu-sh3/cpu/addrspace.h deleted file mode 100644 index 0f94726c7d62..000000000000 --- a/arch/sh/include/cpu-sh3/cpu/addrspace.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 1999 by Kaz Kojima | ||
7 | * | ||
8 | * Defitions for the address spaces of the SH-3 CPUs. | ||
9 | */ | ||
10 | #ifndef __ASM_CPU_SH3_ADDRSPACE_H | ||
11 | #define __ASM_CPU_SH3_ADDRSPACE_H | ||
12 | |||
13 | #define P0SEG 0x00000000 | ||
14 | #define P1SEG 0x80000000 | ||
15 | #define P2SEG 0xa0000000 | ||
16 | #define P3SEG 0xc0000000 | ||
17 | #define P4SEG 0xe0000000 | ||
18 | |||
19 | #endif /* __ASM_CPU_SH3_ADDRSPACE_H */ | ||
diff --git a/arch/sh/include/cpu-sh3/cpu/cacheflush.h b/arch/sh/include/cpu-sh3/cpu/cacheflush.h index f70d8ef76a15..abc909880807 100644 --- a/arch/sh/include/cpu-sh3/cpu/cacheflush.h +++ b/arch/sh/include/cpu-sh3/cpu/cacheflush.h | |||
@@ -10,25 +10,7 @@ | |||
10 | #ifndef __ASM_CPU_SH3_CACHEFLUSH_H | 10 | #ifndef __ASM_CPU_SH3_CACHEFLUSH_H |
11 | #define __ASM_CPU_SH3_CACHEFLUSH_H | 11 | #define __ASM_CPU_SH3_CACHEFLUSH_H |
12 | 12 | ||
13 | /* | ||
14 | * Cache flushing: | ||
15 | * | ||
16 | * - flush_cache_all() flushes entire cache | ||
17 | * - flush_cache_mm(mm) flushes the specified mm context's cache lines | ||
18 | * - flush_cache_dup mm(mm) handles cache flushing when forking | ||
19 | * - flush_cache_page(mm, vmaddr, pfn) flushes a single page | ||
20 | * - flush_cache_range(vma, start, end) flushes a range of pages | ||
21 | * | ||
22 | * - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache | ||
23 | * - flush_icache_range(start, end) flushes(invalidates) a range for icache | ||
24 | * - flush_icache_page(vma, pg) flushes(invalidates) a page for icache | ||
25 | * | ||
26 | * Caches are indexed (effectively) by physical address on SH-3, so | ||
27 | * we don't need them. | ||
28 | */ | ||
29 | |||
30 | #if defined(CONFIG_SH7705_CACHE_32KB) | 13 | #if defined(CONFIG_SH7705_CACHE_32KB) |
31 | |||
32 | /* SH7705 is an SH3 processor with 32KB cache. This has alias issues like the | 14 | /* SH7705 is an SH3 processor with 32KB cache. This has alias issues like the |
33 | * SH4. Unlike the SH4 this is a unified cache so we need to do some work | 15 | * SH4. Unlike the SH4 this is a unified cache so we need to do some work |
34 | * in mmap when 'exec'ing a new binary | 16 | * in mmap when 'exec'ing a new binary |
@@ -48,23 +30,7 @@ void flush_dcache_page(struct page *pg); | |||
48 | void flush_icache_range(unsigned long start, unsigned long end); | 30 | void flush_icache_range(unsigned long start, unsigned long end); |
49 | void flush_icache_page(struct vm_area_struct *vma, struct page *page); | 31 | void flush_icache_page(struct vm_area_struct *vma, struct page *page); |
50 | #else | 32 | #else |
51 | #define flush_cache_all() do { } while (0) | 33 | #include <cpu-common/cpu/cacheflush.h> |
52 | #define flush_cache_mm(mm) do { } while (0) | ||
53 | #define flush_cache_dup_mm(mm) do { } while (0) | ||
54 | #define flush_cache_range(vma, start, end) do { } while (0) | ||
55 | #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) | ||
56 | #define flush_dcache_page(page) do { } while (0) | ||
57 | #define flush_icache_range(start, end) do { } while (0) | ||
58 | #define flush_icache_page(vma,pg) do { } while (0) | ||
59 | #endif | 34 | #endif |
60 | 35 | ||
61 | #define flush_dcache_mmap_lock(mapping) do { } while (0) | ||
62 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) | ||
63 | |||
64 | /* SH3 has unified cache so no special action needed here */ | ||
65 | #define flush_cache_sigtramp(vaddr) do { } while (0) | ||
66 | #define flush_icache_user_range(vma,pg,adr,len) do { } while (0) | ||
67 | |||
68 | #define p3_cache_init() do { } while (0) | ||
69 | |||
70 | #endif /* __ASM_CPU_SH3_CACHEFLUSH_H */ | 36 | #endif /* __ASM_CPU_SH3_CACHEFLUSH_H */ |
diff --git a/arch/sh/include/cpu-sh3/cpu/rtc.h b/arch/sh/include/cpu-sh3/cpu/rtc.h deleted file mode 100644 index 319404aaee37..000000000000 --- a/arch/sh/include/cpu-sh3/cpu/rtc.h +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | #ifndef __ASM_SH_CPU_SH3_RTC_H | ||
2 | #define __ASM_SH_CPU_SH3_RTC_H | ||
3 | |||
4 | #define rtc_reg_size sizeof(u16) | ||
5 | #define RTC_BIT_INVERTED 0 /* No bug on SH7708, SH7709A */ | ||
6 | #define RTC_DEF_CAPABILITIES 0UL | ||
7 | |||
8 | #endif /* __ASM_SH_CPU_SH3_RTC_H */ | ||
diff --git a/arch/sh/include/cpu-sh3/cpu/sigcontext.h b/arch/sh/include/cpu-sh3/cpu/sigcontext.h deleted file mode 100644 index 17310dc03dcd..000000000000 --- a/arch/sh/include/cpu-sh3/cpu/sigcontext.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | #ifndef __ASM_CPU_SH3_SIGCONTEXT_H | ||
2 | #define __ASM_CPU_SH3_SIGCONTEXT_H | ||
3 | |||
4 | struct sigcontext { | ||
5 | unsigned long oldmask; | ||
6 | |||
7 | /* CPU registers */ | ||
8 | unsigned long sc_regs[16]; | ||
9 | unsigned long sc_pc; | ||
10 | unsigned long sc_pr; | ||
11 | unsigned long sc_sr; | ||
12 | unsigned long sc_gbr; | ||
13 | unsigned long sc_mach; | ||
14 | unsigned long sc_macl; | ||
15 | }; | ||
16 | |||
17 | #endif /* __ASM_CPU_SH3_SIGCONTEXT_H */ | ||