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authorPaul Mundt <lethal@linux-sh.org>2009-08-14 23:29:49 -0400
committerPaul Mundt <lethal@linux-sh.org>2009-08-14 23:29:49 -0400
commit37443ef3f0406e855e169c87ae3f4ffb4b6ff635 (patch)
treedd57e6fe91e6058b45660b6e4629249a50bc448e /arch/sh/include/cpu-common
parent916e97834e023f89b31f796b53cc9c7956e7fe17 (diff)
sh: Migrate SH-4 cacheflush ops to function pointers.
This paves the way for allowing individual CPUs to overload the individual flushing routines that they care about without having to depend on weak aliases. SH-4 is converted over initially, as it wires up pretty much everything. The majority of the other CPUs will simply use the default no-op implementation with their own region flushers wired up. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/include/cpu-common')
-rw-r--r--arch/sh/include/cpu-common/cpu/cacheflush.h37
1 files changed, 20 insertions, 17 deletions
diff --git a/arch/sh/include/cpu-common/cpu/cacheflush.h b/arch/sh/include/cpu-common/cpu/cacheflush.h
index 5dc3736218e7..8189dbd68f8f 100644
--- a/arch/sh/include/cpu-common/cpu/cacheflush.h
+++ b/arch/sh/include/cpu-common/cpu/cacheflush.h
@@ -1,14 +1,12 @@
1/* 1/*
2 * include/asm-sh/cpu-sh2/cacheflush.h
3 *
4 * Copyright (C) 2003 Paul Mundt 2 * Copyright (C) 2003 Paul Mundt
5 * 3 *
6 * This file is subject to the terms and conditions of the GNU General Public 4 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive 5 * License. See the file "COPYING" in the main directory of this archive
8 * for more details. 6 * for more details.
9 */ 7 */
10#ifndef __ASM_CPU_SH2_CACHEFLUSH_H 8#ifndef __ASM_CPU_SH_CACHEFLUSH_H
11#define __ASM_CPU_SH2_CACHEFLUSH_H 9#define __ASM_CPU_SH_CACHEFLUSH_H
12 10
13/* 11/*
14 * Cache flushing: 12 * Cache flushing:
@@ -22,18 +20,23 @@
22 * - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache 20 * - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache
23 * - flush_icache_range(start, end) flushes(invalidates) a range for icache 21 * - flush_icache_range(start, end) flushes(invalidates) a range for icache
24 * - flush_icache_page(vma, pg) flushes(invalidates) a page for icache 22 * - flush_icache_page(vma, pg) flushes(invalidates) a page for icache
25 * 23 * - flush_cache_sigtramp(vaddr) flushes the signal trampoline
26 * Caches are indexed (effectively) by physical address on SH-2, so
27 * we don't need them.
28 */ 24 */
29#define flush_cache_all() do { } while (0) 25extern void (*flush_cache_all)(void);
30#define flush_cache_mm(mm) do { } while (0) 26extern void (*flush_cache_mm)(struct mm_struct *mm);
31#define flush_cache_dup_mm(mm) do { } while (0) 27extern void (*flush_cache_dup_mm)(struct mm_struct *mm);
32#define flush_cache_range(vma, start, end) do { } while (0) 28extern void (*flush_cache_page)(struct vm_area_struct *vma,
33#define flush_cache_page(vma, vmaddr, pfn) do { } while (0) 29 unsigned long addr, unsigned long pfn);
34#define flush_dcache_page(page) do { } while (0) 30extern void (*flush_cache_range)(struct vm_area_struct *vma,
35#define flush_icache_range(start, end) do { } while (0) 31 unsigned long start, unsigned long end);
36#define flush_icache_page(vma,pg) do { } while (0) 32extern void (*flush_dcache_page)(struct page *page);
37#define flush_cache_sigtramp(vaddr) do { } while (0) 33extern void (*flush_icache_range)(unsigned long start, unsigned long end);
34extern void (*flush_icache_page)(struct vm_area_struct *vma,
35 struct page *page);
36extern void (*flush_cache_sigtramp)(unsigned long address);
37
38extern void (*__flush_wback_region)(void *start, int size);
39extern void (*__flush_purge_region)(void *start, int size);
40extern void (*__flush_invalidate_region)(void *start, int size);
38 41
39#endif /* __ASM_CPU_SH2_CACHEFLUSH_H */ 42#endif /* __ASM_CPU_SH_CACHEFLUSH_H */