aboutsummaryrefslogtreecommitdiffstats
path: root/arch/sh/include/asm
diff options
context:
space:
mode:
authorPaul Mundt <lethal@linux-sh.org>2010-05-13 04:45:44 -0400
committerPaul Mundt <lethal@linux-sh.org>2010-05-13 04:45:44 -0400
commitc5eb5b372e7ea18a5eeb6b5192a6369967cb1afe (patch)
tree4e18e43ca25db9b8df6d332f9c2d3989288988a2 /arch/sh/include/asm
parent15f2a7967a46c7fab579ab88b9f1e0c7f78ac495 (diff)
parentf5ca6d4cbd49dbb6e179a71fa610eb321a3e9951 (diff)
Merge branch 'sh/clkfwk'
Diffstat (limited to 'arch/sh/include/asm')
-rw-r--r--arch/sh/include/asm/clock.h153
1 files changed, 3 insertions, 150 deletions
diff --git a/arch/sh/include/asm/clock.h b/arch/sh/include/asm/clock.h
index 405a12c09960..803d4c7f09dc 100644
--- a/arch/sh/include/asm/clock.h
+++ b/arch/sh/include/asm/clock.h
@@ -1,163 +1,16 @@
1#ifndef __ASM_SH_CLOCK_H 1#ifndef __ASM_SH_CLOCK_H
2#define __ASM_SH_CLOCK_H 2#define __ASM_SH_CLOCK_H
3 3
4#include <linux/list.h> 4#include <linux/sh_clk.h>
5#include <linux/seq_file.h>
6#include <linux/cpufreq.h>
7#include <linux/clk.h>
8#include <linux/err.h>
9
10struct clk;
11
12struct clk_ops {
13 void (*init)(struct clk *clk);
14 int (*enable)(struct clk *clk);
15 void (*disable)(struct clk *clk);
16 unsigned long (*recalc)(struct clk *clk);
17 int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id);
18 int (*set_parent)(struct clk *clk, struct clk *parent);
19 long (*round_rate)(struct clk *clk, unsigned long rate);
20};
21
22struct clk {
23 struct list_head node;
24 const char *name;
25 int id;
26 struct module *owner;
27
28 struct clk *parent;
29 struct clk_ops *ops;
30
31 struct list_head children;
32 struct list_head sibling; /* node for children */
33
34 int usecount;
35
36 unsigned long rate;
37 unsigned long flags;
38
39 void __iomem *enable_reg;
40 unsigned int enable_bit;
41
42 unsigned long arch_flags;
43 void *priv;
44 struct dentry *dentry;
45 struct cpufreq_frequency_table *freq_table;
46};
47
48#define CLK_ENABLE_ON_INIT (1 << 0)
49 5
50/* Should be defined by processor-specific code */ 6/* Should be defined by processor-specific code */
51void __deprecated arch_init_clk_ops(struct clk_ops **, int type); 7void __deprecated arch_init_clk_ops(struct clk_ops **, int type);
52int __init arch_clk_init(void); 8int __init arch_clk_init(void);
53 9
54/* arch/sh/kernel/cpu/clock.c */
55int clk_init(void);
56unsigned long followparent_recalc(struct clk *);
57void recalculate_root_clocks(void);
58void propagate_rate(struct clk *);
59int clk_reparent(struct clk *child, struct clk *parent);
60int clk_register(struct clk *);
61void clk_unregister(struct clk *);
62
63/* arch/sh/kernel/cpu/clock-cpg.c */ 10/* arch/sh/kernel/cpu/clock-cpg.c */
64int __init __deprecated cpg_clk_init(void); 11int __init __deprecated cpg_clk_init(void);
65 12
66/* the exported API, in addition to clk_set_rate */ 13/* arch/sh/kernel/cpu/clock.c */
67/** 14int clk_init(void);
68 * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter
69 * @clk: clock source
70 * @rate: desired clock rate in Hz
71 * @algo_id: algorithm id to be passed down to ops->set_rate
72 *
73 * Returns success (0) or negative errno.
74 */
75int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id);
76
77enum clk_sh_algo_id {
78 NO_CHANGE = 0,
79
80 IUS_N1_N1,
81 IUS_322,
82 IUS_522,
83 IUS_N11,
84
85 SB_N1,
86
87 SB3_N1,
88 SB3_32,
89 SB3_43,
90 SB3_54,
91
92 BP_N1,
93
94 IP_N1,
95};
96
97struct clk_div_mult_table {
98 unsigned int *divisors;
99 unsigned int nr_divisors;
100 unsigned int *multipliers;
101 unsigned int nr_multipliers;
102};
103
104struct cpufreq_frequency_table;
105void clk_rate_table_build(struct clk *clk,
106 struct cpufreq_frequency_table *freq_table,
107 int nr_freqs,
108 struct clk_div_mult_table *src_table,
109 unsigned long *bitmap);
110
111long clk_rate_table_round(struct clk *clk,
112 struct cpufreq_frequency_table *freq_table,
113 unsigned long rate);
114
115int clk_rate_table_find(struct clk *clk,
116 struct cpufreq_frequency_table *freq_table,
117 unsigned long rate);
118
119#define SH_CLK_MSTP32(_name, _id, _parent, _enable_reg, \
120 _enable_bit, _flags) \
121{ \
122 .name = _name, \
123 .id = _id, \
124 .parent = _parent, \
125 .enable_reg = (void __iomem *)_enable_reg, \
126 .enable_bit = _enable_bit, \
127 .flags = _flags, \
128}
129
130int sh_clk_mstp32_register(struct clk *clks, int nr);
131
132#define SH_CLK_DIV4(_name, _parent, _reg, _shift, _div_bitmap, _flags) \
133{ \
134 .name = _name, \
135 .parent = _parent, \
136 .enable_reg = (void __iomem *)_reg, \
137 .enable_bit = _shift, \
138 .arch_flags = _div_bitmap, \
139 .flags = _flags, \
140}
141
142struct clk_div4_table {
143 struct clk_div_mult_table *div_mult_table;
144 void (*kick)(struct clk *clk);
145};
146
147int sh_clk_div4_register(struct clk *clks, int nr,
148 struct clk_div4_table *table);
149int sh_clk_div4_enable_register(struct clk *clks, int nr,
150 struct clk_div4_table *table);
151int sh_clk_div4_reparent_register(struct clk *clks, int nr,
152 struct clk_div4_table *table);
153
154#define SH_CLK_DIV6(_parent, _reg, _flags) \
155{ \
156 .parent = _parent, \
157 .enable_reg = (void __iomem *)_reg, \
158 .flags = _flags, \
159}
160
161int sh_clk_div6_register(struct clk *clks, int nr);
162 15
163#endif /* __ASM_SH_CLOCK_H */ 16#endif /* __ASM_SH_CLOCK_H */