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authorGuennadi Liakhovetski <g.liakhovetski@gmx.de>2010-02-11 11:50:14 -0500
committerPaul Mundt <lethal@linux-sh.org>2010-03-01 21:09:04 -0500
commit8b1935e6a36b0967efc593d67ed3aebbfbc1f5b1 (patch)
tree811ebd670e9704790625137b4a824e548bded00b /arch/sh/include/asm
parent027811b9b81a6b3ae5aa20c3302897bee9dcf09e (diff)
dmaengine: shdma: separate DMA headers.
Separate SH DMA headers into ones, commonly used by both drivers, and ones, specific to each of them. This will make the future development of the dmaengine driver easier. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/include/asm')
-rw-r--r--arch/sh/include/asm/dma-register.h51
-rw-r--r--arch/sh/include/asm/dma-sh.h95
-rw-r--r--arch/sh/include/asm/dmaengine.h73
-rw-r--r--arch/sh/include/asm/siu.h2
4 files changed, 127 insertions, 94 deletions
diff --git a/arch/sh/include/asm/dma-register.h b/arch/sh/include/asm/dma-register.h
new file mode 100644
index 000000000000..51cd78feacff
--- /dev/null
+++ b/arch/sh/include/asm/dma-register.h
@@ -0,0 +1,51 @@
1/*
2 * Common header for the legacy SH DMA driver and the new dmaengine driver
3 *
4 * extracted from arch/sh/include/asm/dma-sh.h:
5 *
6 * Copyright (C) 2000 Takashi YOSHII
7 * Copyright (C) 2003 Paul Mundt
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 */
13#ifndef DMA_REGISTER_H
14#define DMA_REGISTER_H
15
16/* DMA register */
17#define SAR 0x00
18#define DAR 0x04
19#define TCR 0x08
20#define CHCR 0x0C
21#define DMAOR 0x40
22
23/* DMAOR definitions */
24#define DMAOR_AE 0x00000004
25#define DMAOR_NMIF 0x00000002
26#define DMAOR_DME 0x00000001
27
28/* Definitions for the SuperH DMAC */
29#define REQ_L 0x00000000
30#define REQ_E 0x00080000
31#define RACK_H 0x00000000
32#define RACK_L 0x00040000
33#define ACK_R 0x00000000
34#define ACK_W 0x00020000
35#define ACK_H 0x00000000
36#define ACK_L 0x00010000
37#define DM_INC 0x00004000
38#define DM_DEC 0x00008000
39#define DM_FIX 0x0000c000
40#define SM_INC 0x00001000
41#define SM_DEC 0x00002000
42#define SM_FIX 0x00003000
43#define RS_IN 0x00000200
44#define RS_OUT 0x00000300
45#define TS_BLK 0x00000040
46#define TM_BUR 0x00000020
47#define CHCR_DE 0x00000001
48#define CHCR_TE 0x00000002
49#define CHCR_IE 0x00000004
50
51#endif
diff --git a/arch/sh/include/asm/dma-sh.h b/arch/sh/include/asm/dma-sh.h
index 2e3631d6e273..f3acb8e34c6b 100644
--- a/arch/sh/include/asm/dma-sh.h
+++ b/arch/sh/include/asm/dma-sh.h
@@ -11,7 +11,8 @@
11#ifndef __DMA_SH_H 11#ifndef __DMA_SH_H
12#define __DMA_SH_H 12#define __DMA_SH_H
13 13
14#include <asm/dma.h> 14#include <asm/dma-register.h>
15#include <cpu/dma-register.h>
15#include <cpu/dma.h> 16#include <cpu/dma.h>
16 17
17/* DMAOR contorl: The DMAOR access size is different by CPU.*/ 18/* DMAOR contorl: The DMAOR access size is different by CPU.*/
@@ -53,34 +54,6 @@ static int dmte_irq_map[] __maybe_unused = {
53#endif 54#endif
54}; 55};
55 56
56/* Definitions for the SuperH DMAC */
57#define REQ_L 0x00000000
58#define REQ_E 0x00080000
59#define RACK_H 0x00000000
60#define RACK_L 0x00040000
61#define ACK_R 0x00000000
62#define ACK_W 0x00020000
63#define ACK_H 0x00000000
64#define ACK_L 0x00010000
65#define DM_INC 0x00004000
66#define DM_DEC 0x00008000
67#define DM_FIX 0x0000c000
68#define SM_INC 0x00001000
69#define SM_DEC 0x00002000
70#define SM_FIX 0x00003000
71#define RS_IN 0x00000200
72#define RS_OUT 0x00000300
73#define TS_BLK 0x00000040
74#define TM_BUR 0x00000020
75#define CHCR_DE 0x00000001
76#define CHCR_TE 0x00000002
77#define CHCR_IE 0x00000004
78
79/* DMAOR definitions */
80#define DMAOR_AE 0x00000004
81#define DMAOR_NMIF 0x00000002
82#define DMAOR_DME 0x00000001
83
84/* 57/*
85 * Define the default configuration for dual address memory-memory transfer. 58 * Define the default configuration for dual address memory-memory transfer.
86 * The 0x400 value represents auto-request, external->external. 59 * The 0x400 value represents auto-request, external->external.
@@ -111,68 +84,4 @@ static u32 dma_base_addr[] __maybe_unused = {
111#endif 84#endif
112}; 85};
113 86
114/* DMA register */
115#define SAR 0x00
116#define DAR 0x04
117#define TCR 0x08
118#define CHCR 0x0C
119#define DMAOR 0x40
120
121/*
122 * for dma engine
123 *
124 * SuperH DMA mode
125 */
126#define SHDMA_MIX_IRQ (1 << 1)
127#define SHDMA_DMAOR1 (1 << 2)
128#define SHDMA_DMAE1 (1 << 3)
129
130enum sh_dmae_slave_chan_id {
131 SHDMA_SLAVE_SCIF0_TX,
132 SHDMA_SLAVE_SCIF0_RX,
133 SHDMA_SLAVE_SCIF1_TX,
134 SHDMA_SLAVE_SCIF1_RX,
135 SHDMA_SLAVE_SCIF2_TX,
136 SHDMA_SLAVE_SCIF2_RX,
137 SHDMA_SLAVE_SCIF3_TX,
138 SHDMA_SLAVE_SCIF3_RX,
139 SHDMA_SLAVE_SCIF4_TX,
140 SHDMA_SLAVE_SCIF4_RX,
141 SHDMA_SLAVE_SCIF5_TX,
142 SHDMA_SLAVE_SCIF5_RX,
143 SHDMA_SLAVE_SIUA_TX,
144 SHDMA_SLAVE_SIUA_RX,
145 SHDMA_SLAVE_SIUB_TX,
146 SHDMA_SLAVE_SIUB_RX,
147 SHDMA_SLAVE_NUMBER, /* Must stay last */
148};
149
150struct sh_dmae_slave_config {
151 enum sh_dmae_slave_chan_id slave_id;
152 dma_addr_t addr;
153 u32 chcr;
154 char mid_rid;
155};
156
157struct sh_dmae_channel {
158 unsigned int offset;
159 unsigned int dmars;
160 unsigned int dmars_bit;
161};
162
163struct sh_dmae_pdata {
164 struct sh_dmae_slave_config *slave;
165 int slave_num;
166 struct sh_dmae_channel *channel;
167 int channel_num;
168};
169
170struct device;
171
172struct sh_dmae_slave {
173 enum sh_dmae_slave_chan_id slave_id; /* Set by the platform */
174 struct device *dma_dev; /* Set by the platform */
175 struct sh_dmae_slave_config *config; /* Set by the driver */
176};
177
178#endif /* __DMA_SH_H */ 87#endif /* __DMA_SH_H */
diff --git a/arch/sh/include/asm/dmaengine.h b/arch/sh/include/asm/dmaengine.h
new file mode 100644
index 000000000000..9586e4a482b1
--- /dev/null
+++ b/arch/sh/include/asm/dmaengine.h
@@ -0,0 +1,73 @@
1/*
2 * Header for the new SH dmaengine driver
3 *
4 * Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef ASM_DMAENGINE_H
11#define ASM_DMAENGINE_H
12
13#include <asm/dma-register.h>
14
15#define SH_DMAC_MAX_CHANNELS 6
16
17enum sh_dmae_slave_chan_id {
18 SHDMA_SLAVE_SCIF0_TX,
19 SHDMA_SLAVE_SCIF0_RX,
20 SHDMA_SLAVE_SCIF1_TX,
21 SHDMA_SLAVE_SCIF1_RX,
22 SHDMA_SLAVE_SCIF2_TX,
23 SHDMA_SLAVE_SCIF2_RX,
24 SHDMA_SLAVE_SCIF3_TX,
25 SHDMA_SLAVE_SCIF3_RX,
26 SHDMA_SLAVE_SCIF4_TX,
27 SHDMA_SLAVE_SCIF4_RX,
28 SHDMA_SLAVE_SCIF5_TX,
29 SHDMA_SLAVE_SCIF5_RX,
30 SHDMA_SLAVE_SIUA_TX,
31 SHDMA_SLAVE_SIUA_RX,
32 SHDMA_SLAVE_SIUB_TX,
33 SHDMA_SLAVE_SIUB_RX,
34 SHDMA_SLAVE_NUMBER, /* Must stay last */
35};
36
37struct sh_dmae_slave_config {
38 enum sh_dmae_slave_chan_id slave_id;
39 dma_addr_t addr;
40 u32 chcr;
41 char mid_rid;
42};
43
44struct sh_dmae_channel {
45 unsigned int offset;
46 unsigned int dmars;
47 unsigned int dmars_bit;
48};
49
50struct sh_dmae_pdata {
51 struct sh_dmae_slave_config *slave;
52 int slave_num;
53 struct sh_dmae_channel *channel;
54 int channel_num;
55 unsigned int ts_low_shift;
56 unsigned int ts_low_mask;
57 unsigned int ts_high_shift;
58 unsigned int ts_high_mask;
59 unsigned int *ts_shift;
60 int ts_shift_num;
61 u16 dmaor_init;
62};
63
64struct device;
65
66/* Used by slave DMA clients to request DMA to/from a specific peripheral */
67struct sh_dmae_slave {
68 enum sh_dmae_slave_chan_id slave_id; /* Set by the platform */
69 struct device *dma_dev; /* Set by the platform */
70 struct sh_dmae_slave_config *config; /* Set by the driver */
71};
72
73#endif
diff --git a/arch/sh/include/asm/siu.h b/arch/sh/include/asm/siu.h
index 57565a3b551f..f1b1e6944a5f 100644
--- a/arch/sh/include/asm/siu.h
+++ b/arch/sh/include/asm/siu.h
@@ -11,7 +11,7 @@
11#ifndef ASM_SIU_H 11#ifndef ASM_SIU_H
12#define ASM_SIU_H 12#define ASM_SIU_H
13 13
14#include <asm/dma-sh.h> 14#include <asm/dmaengine.h>
15 15
16struct device; 16struct device;
17 17
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-06 11:55:27 -0500