sh: Abstracted SH-4A UBC support on hw-breakpoint core.

This is the next big chunk of hw_breakpoint support. This decouples
the SH-4A support from the core and moves it out in to its own stub,
following many of the conventions established with the perf events
layering.

In addition to extending SH-4A support to encapsulate the remainder
of the UBC channels, clock framework support for handling the UBC
interface clock is added as well, allowing for dynamic clock gating.

This also fixes up a regression introduced by the SIGTRAP handling that
broke the ksym_tracer, to the extent that the current support works well
with all of the ksym_tracer/ptrace/kgdb. The kprobes singlestep code will
follow in turn.

With this in place, the remaining UBC variants (SH-2A and SH-4) can now
be trivially plugged in.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

2 files changed, 20 insertions, 6 deletions

diff --git a/arch/sh/include/asm/hw_breakpoint.h b/arch/sh/include/asm/hw_breakpoint.h
index 0f4a00f60058..7295d6290249 100644
--- a/arch/sh/include/asm/hw_breakpoint.h
+++ b/arch/sh/include/asm/hw_breakpoint.h
@@ -3,7 +3,6 @@
 
 #include <linux/kdebug.h>
 #include <linux/types.h>
-#include <asm/ubc.h>
 
 #ifdef __KERNEL__
 #define __ARCH_HW_BREAKPOINT_H
@@ -11,7 +10,6 @@
 struct arch_hw_breakpoint {
         char            *name; /* Contains name of the symbol to set bkpt */
         unsigned long   address;
-        unsigned long   asid;
         u16             len;
         u16             type;
 };
@@ -27,13 +25,28 @@ enum {
         SH_BREAKPOINT_LEN_8     = (1 << 14),
 };
 
-/* Total number of available UBC channels */
-#define HBP_NUM         1 /* XXX */
+struct sh_ubc {
+        const char      *name;
+        unsigned int    num_events;
+        unsigned int    trap_nr;
+        void            (*enable)(struct arch_hw_breakpoint *, int);
+        void            (*disable)(struct arch_hw_breakpoint *, int);
+        void            (*enable_all)(unsigned long);
+        void            (*disable_all)(void);
+        unsigned long   (*active_mask)(void);
+        unsigned long   (*triggered_mask)(void);
+        void            (*clear_triggered_mask)(unsigned long);
+        struct clk      *clk;   /* optional interface clock / MSTP bit */
+};
 
 struct perf_event;
 struct task_struct;
 struct pmu;
 
+/* Maximum number of UBC channels */
+#define HBP_NUM         2
+
+/* arch/sh/kernel/hw_breakpoint.c */
 extern int arch_check_va_in_userspace(unsigned long va, u16 hbp_len);
 extern int arch_validate_hwbkpt_settings(struct perf_event *bp,
                                          struct task_struct *tsk);
@@ -46,6 +59,7 @@ void hw_breakpoint_pmu_read(struct perf_event *bp);
 void hw_breakpoint_pmu_unthrottle(struct perf_event *bp);
 
 extern void arch_fill_perf_breakpoint(struct perf_event *bp);
+extern int register_sh_ubc(struct sh_ubc *);
 
 extern struct pmu perf_ops_bp;
 
diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h
index d60b28271a05..259112cecbdf 100644
--- a/arch/sh/include/asm/processor_32.h
+++ b/arch/sh/include/asm/processor_32.h
@@ -14,7 +14,7 @@
 #include <asm/page.h>
 #include <asm/types.h>
 #include <asm/ptrace.h>
-#include <asm/ubc.h>
+#include <asm/hw_breakpoint.h>
 
 /*
  * Default implementation of macro that returns current
@@ -102,7 +102,7 @@ struct thread_struct {
         unsigned long pc;
 
         /* Save middle states of ptrace breakpoints */
-        struct perf_event       *ptrace_bps[NR_UBC_CHANNELS];
+        struct perf_event       *ptrace_bps[HBP_NUM];
 
         /* floating point info */
         union sh_fpu_union fpu;