diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-12-09 22:03:16 -0500 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-12-09 22:03:16 -0500 |
| commit | 3a43aaa31790c36b69ebf8a6396f37fade86b531 (patch) | |
| tree | 7c7f8da6219d546f2b44534cb7be1fb5591d6ac4 /arch/sh/include/asm/pgtable.h | |
| parent | aed886ce777590eac87f7ce2897d9f8357754331 (diff) | |
| parent | 6a5a0b9139b19dd1a107870269a35bc9cf18d2dc (diff) | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (137 commits)
sh: include empty zero page in romImage
sh: Make associative cache writes fatal on all SH-4A parts.
sh: Drop associative writes for SH-4 cache flushes.
sh: Partial revert of copy/clear_user_highpage() optimizations.
sh: Add default uImage rule for se7724, ap325rxa, and migor.
sh: allow runtime pm without suspend/resume callbacks
sh: mach-ecovec24: Remove un-defined settings for VPU
sh: mach-ecovec24: LCDC drive ability become high
sh: fix sh7724 VEU3F resource size
serial: sh-sci: Fix too early port disabling.
sh: pfc: pr_info() -> pr_debug() cleanups.
sh: pfc: Convert from ctrl_xxx() to __raw_xxx() I/O routines.
sh: Improve kfr2r09 serial port setup code
sh: Break out SuperH PFC code
sh: Move KEYSC header file
sh: convert /proc/cpu/aligmnent, /proc/cpu/kernel_alignment to seq_file
sh: Add CPG save/restore code for sh7724 R-standby
sh: Add SDHI power control support to Ecovec
mfd: Add power control platform data to SDHI driver
sh: mach-ecovec24: modify address map
...
Diffstat (limited to 'arch/sh/include/asm/pgtable.h')
| -rw-r--r-- | arch/sh/include/asm/pgtable.h | 26 |
1 files changed, 22 insertions, 4 deletions
diff --git a/arch/sh/include/asm/pgtable.h b/arch/sh/include/asm/pgtable.h index 4f3efa7d5a64..ba3046e4f06f 100644 --- a/arch/sh/include/asm/pgtable.h +++ b/arch/sh/include/asm/pgtable.h | |||
| @@ -75,13 +75,31 @@ static inline unsigned long long neff_sign_extend(unsigned long val) | |||
| 75 | #define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE) | 75 | #define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE) |
| 76 | #define FIRST_USER_ADDRESS 0 | 76 | #define FIRST_USER_ADDRESS 0 |
| 77 | 77 | ||
| 78 | #ifdef CONFIG_32BIT | 78 | #define PHYS_ADDR_MASK29 0x1fffffff |
| 79 | #define PHYS_ADDR_MASK 0xffffffff | 79 | #define PHYS_ADDR_MASK32 0xffffffff |
| 80 | |||
| 81 | #ifdef CONFIG_PMB | ||
| 82 | static inline unsigned long phys_addr_mask(void) | ||
| 83 | { | ||
| 84 | /* Is the MMU in 29bit mode? */ | ||
| 85 | if (__in_29bit_mode()) | ||
| 86 | return PHYS_ADDR_MASK29; | ||
| 87 | |||
| 88 | return PHYS_ADDR_MASK32; | ||
| 89 | } | ||
| 90 | #elif defined(CONFIG_32BIT) | ||
| 91 | static inline unsigned long phys_addr_mask(void) | ||
| 92 | { | ||
| 93 | return PHYS_ADDR_MASK32; | ||
| 94 | } | ||
| 80 | #else | 95 | #else |
| 81 | #define PHYS_ADDR_MASK 0x1fffffff | 96 | static inline unsigned long phys_addr_mask(void) |
| 97 | { | ||
| 98 | return PHYS_ADDR_MASK29; | ||
| 99 | } | ||
| 82 | #endif | 100 | #endif |
| 83 | 101 | ||
| 84 | #define PTE_PHYS_MASK (PHYS_ADDR_MASK & PAGE_MASK) | 102 | #define PTE_PHYS_MASK (phys_addr_mask() & PAGE_MASK) |
| 85 | #define PTE_FLAGS_MASK (~(PTE_PHYS_MASK) << PAGE_SHIFT) | 103 | #define PTE_FLAGS_MASK (~(PTE_PHYS_MASK) << PAGE_SHIFT) |
| 86 | 104 | ||
| 87 | #ifdef CONFIG_SUPERH32 | 105 | #ifdef CONFIG_SUPERH32 |
