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authorPaul Mundt <lethal@linux-sh.org>2010-02-07 21:34:03 -0500
committerPaul Mundt <lethal@linux-sh.org>2010-02-07 21:34:03 -0500
commit2e18e047981ae04be9bd0d9760057f7c1a7b3785 (patch)
tree999941abf466ce4d6915273e2e7a42bf0a107385 /arch/sh/include/asm/dma-sh.h
parentb06ede84dd1473dec7c6af03a41c8d04d2fee437 (diff)
parentcfefe99795251d76d92e8457f4152f532a961ec5 (diff)
Merge branch 'sh/dmaengine'
Conflicts: arch/sh/drivers/dma/dma-sh.c
Diffstat (limited to 'arch/sh/include/asm/dma-sh.h')
-rw-r--r--arch/sh/include/asm/dma-sh.h43
1 files changed, 41 insertions, 2 deletions
diff --git a/arch/sh/include/asm/dma-sh.h b/arch/sh/include/asm/dma-sh.h
index 47de10976991..e934a2e66651 100644
--- a/arch/sh/include/asm/dma-sh.h
+++ b/arch/sh/include/asm/dma-sh.h
@@ -64,8 +64,10 @@ static int dmte_irq_map[] __maybe_unused = {
64#define ACK_L 0x00010000 64#define ACK_L 0x00010000
65#define DM_INC 0x00004000 65#define DM_INC 0x00004000
66#define DM_DEC 0x00008000 66#define DM_DEC 0x00008000
67#define DM_FIX 0x0000c000
67#define SM_INC 0x00001000 68#define SM_INC 0x00001000
68#define SM_DEC 0x00002000 69#define SM_DEC 0x00002000
70#define SM_FIX 0x00003000
69#define RS_IN 0x00000200 71#define RS_IN 0x00000200
70#define RS_OUT 0x00000300 72#define RS_OUT 0x00000300
71#define TS_BLK 0x00000040 73#define TS_BLK 0x00000040
@@ -83,7 +85,7 @@ static int dmte_irq_map[] __maybe_unused = {
83 * Define the default configuration for dual address memory-memory transfer. 85 * Define the default configuration for dual address memory-memory transfer.
84 * The 0x400 value represents auto-request, external->external. 86 * The 0x400 value represents auto-request, external->external.
85 */ 87 */
86#define RS_DUAL (DM_INC | SM_INC | 0x400 | TS_32) 88#define RS_DUAL (DM_INC | SM_INC | 0x400 | TS_INDEX2VAL(XMIT_SZ_32BIT))
87 89
88/* DMA base address */ 90/* DMA base address */
89static u32 dma_base_addr[] __maybe_unused = { 91static u32 dma_base_addr[] __maybe_unused = {
@@ -123,10 +125,47 @@ static u32 dma_base_addr[] __maybe_unused = {
123 */ 125 */
124#define SHDMA_MIX_IRQ (1 << 1) 126#define SHDMA_MIX_IRQ (1 << 1)
125#define SHDMA_DMAOR1 (1 << 2) 127#define SHDMA_DMAOR1 (1 << 2)
126#define SHDMA_DMAE1 (1 << 3) 128#define SHDMA_DMAE1 (1 << 3)
129
130enum sh_dmae_slave_chan_id {
131 SHDMA_SLAVE_SCIF0_TX,
132 SHDMA_SLAVE_SCIF0_RX,
133 SHDMA_SLAVE_SCIF1_TX,
134 SHDMA_SLAVE_SCIF1_RX,
135 SHDMA_SLAVE_SCIF2_TX,
136 SHDMA_SLAVE_SCIF2_RX,
137 SHDMA_SLAVE_SCIF3_TX,
138 SHDMA_SLAVE_SCIF3_RX,
139 SHDMA_SLAVE_SCIF4_TX,
140 SHDMA_SLAVE_SCIF4_RX,
141 SHDMA_SLAVE_SCIF5_TX,
142 SHDMA_SLAVE_SCIF5_RX,
143 SHDMA_SLAVE_SIUA_TX,
144 SHDMA_SLAVE_SIUA_RX,
145 SHDMA_SLAVE_SIUB_TX,
146 SHDMA_SLAVE_SIUB_RX,
147 SHDMA_SLAVE_NUMBER, /* Must stay last */
148};
149
150struct sh_dmae_slave_config {
151 enum sh_dmae_slave_chan_id slave_id;
152 dma_addr_t addr;
153 u32 chcr;
154 char mid_rid;
155};
127 156
128struct sh_dmae_pdata { 157struct sh_dmae_pdata {
129 unsigned int mode; 158 unsigned int mode;
159 struct sh_dmae_slave_config *config;
160 int config_num;
161};
162
163struct device;
164
165struct sh_dmae_slave {
166 enum sh_dmae_slave_chan_id slave_id; /* Set by the platform */
167 struct device *dma_dev; /* Set by the platform */
168 struct sh_dmae_slave_config *config; /* Set by the driver */
130}; 169};
131 170
132#endif /* __DMA_SH_H */ 171#endif /* __DMA_SH_H */