diff options
author | Matt Fleming <matt@console-pimps.org> | 2009-01-20 16:14:37 -0500 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2009-01-28 21:57:09 -0500 |
commit | 42990701f938b9318e46102d9919ceb28e5b0e6d (patch) | |
tree | 495a86cf7d4528dbef351074f0b7c2ff21b61681 /arch/sh/include/asm/cmpxchg-llsc.h | |
parent | e4e3c3f17fdb78282e3d9b4af7ec90d6e65798eb (diff) |
sh: Relax inline assembly constraints
When dereferencing the memory address contained in a register and
modifying the value at that memory address, the register should not be
listed in the inline asm outputs. The value at the memory address is an
output (which is taken care of with the "memory" clobber), not the register.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/include/asm/cmpxchg-llsc.h')
-rw-r--r-- | arch/sh/include/asm/cmpxchg-llsc.h | 38 |
1 files changed, 19 insertions, 19 deletions
diff --git a/arch/sh/include/asm/cmpxchg-llsc.h b/arch/sh/include/asm/cmpxchg-llsc.h index aee3bf286581..0fac3da536ca 100644 --- a/arch/sh/include/asm/cmpxchg-llsc.h +++ b/arch/sh/include/asm/cmpxchg-llsc.h | |||
@@ -8,14 +8,14 @@ static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val) | |||
8 | 8 | ||
9 | __asm__ __volatile__ ( | 9 | __asm__ __volatile__ ( |
10 | "1: \n\t" | 10 | "1: \n\t" |
11 | "movli.l @%1, %0 ! xchg_u32 \n\t" | 11 | "movli.l @%2, %0 ! xchg_u32 \n\t" |
12 | "mov %0, %2 \n\t" | 12 | "mov %0, %1 \n\t" |
13 | "mov %4, %0 \n\t" | 13 | "mov %3, %0 \n\t" |
14 | "movco.l %0, @%1 \n\t" | 14 | "movco.l %0, @%2 \n\t" |
15 | "bf 1b \n\t" | 15 | "bf 1b \n\t" |
16 | "synco \n\t" | 16 | "synco \n\t" |
17 | : "=&z"(tmp), "=r" (m), "=&r" (retval) | 17 | : "=&z"(tmp), "=&r" (retval) |
18 | : "1" (m), "r" (val) | 18 | : "r" (m), "r" (val) |
19 | : "t", "memory" | 19 | : "t", "memory" |
20 | ); | 20 | ); |
21 | 21 | ||
@@ -29,14 +29,14 @@ static inline unsigned long xchg_u8(volatile u8 *m, unsigned long val) | |||
29 | 29 | ||
30 | __asm__ __volatile__ ( | 30 | __asm__ __volatile__ ( |
31 | "1: \n\t" | 31 | "1: \n\t" |
32 | "movli.l @%1, %0 ! xchg_u8 \n\t" | 32 | "movli.l @%2, %0 ! xchg_u8 \n\t" |
33 | "mov %0, %2 \n\t" | 33 | "mov %0, %1 \n\t" |
34 | "mov %4, %0 \n\t" | 34 | "mov %3, %0 \n\t" |
35 | "movco.l %0, @%1 \n\t" | 35 | "movco.l %0, @%2 \n\t" |
36 | "bf 1b \n\t" | 36 | "bf 1b \n\t" |
37 | "synco \n\t" | 37 | "synco \n\t" |
38 | : "=&z"(tmp), "=r" (m), "=&r" (retval) | 38 | : "=&z"(tmp), "=&r" (retval) |
39 | : "1" (m), "r" (val & 0xff) | 39 | : "r" (m), "r" (val & 0xff) |
40 | : "t", "memory" | 40 | : "t", "memory" |
41 | ); | 41 | ); |
42 | 42 | ||
@@ -51,17 +51,17 @@ __cmpxchg_u32(volatile int *m, unsigned long old, unsigned long new) | |||
51 | 51 | ||
52 | __asm__ __volatile__ ( | 52 | __asm__ __volatile__ ( |
53 | "1: \n\t" | 53 | "1: \n\t" |
54 | "movli.l @%1, %0 ! __cmpxchg_u32 \n\t" | 54 | "movli.l @%2, %0 ! __cmpxchg_u32 \n\t" |
55 | "mov %0, %2 \n\t" | 55 | "mov %0, %1 \n\t" |
56 | "cmp/eq %2, %4 \n\t" | 56 | "cmp/eq %1, %3 \n\t" |
57 | "bf 2f \n\t" | 57 | "bf 2f \n\t" |
58 | "mov %5, %0 \n\t" | 58 | "mov %3, %0 \n\t" |
59 | "2: \n\t" | 59 | "2: \n\t" |
60 | "movco.l %0, @%1 \n\t" | 60 | "movco.l %0, @%2 \n\t" |
61 | "bf 1b \n\t" | 61 | "bf 1b \n\t" |
62 | "synco \n\t" | 62 | "synco \n\t" |
63 | : "=&z" (tmp), "=r" (m), "=&r" (retval) | 63 | : "=&z" (tmp), "=&r" (retval) |
64 | : "1" (m), "r" (old), "r" (new) | 64 | : "r" (m), "r" (old), "r" (new) |
65 | : "t", "memory" | 65 | : "t", "memory" |
66 | ); | 66 | ); |
67 | 67 | ||