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authorIngo Molnar <mingo@elte.hu>2009-09-21 06:51:27 -0400
committerIngo Molnar <mingo@elte.hu>2009-09-21 06:51:42 -0400
commitae82bfd61ca7e57cc2d914add9ab0873e260f2f5 (patch)
treea7f862ad8b0ae4f2e8953e6aa613eb702b484ecf /arch/sh/include/asm/cachectl.h
parentcd74c86bdf705f824d494a2bbda393d1d562b40a (diff)
parentebc79c4f8da0f92efa968e0328f32334a2ce80cf (diff)
Merge branch 'linus' into perfcounters/rename
Merge reason: pull in all the latest code before doing the rename. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/sh/include/asm/cachectl.h')
-rw-r--r--arch/sh/include/asm/cachectl.h19
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/sh/include/asm/cachectl.h b/arch/sh/include/asm/cachectl.h
new file mode 100644
index 000000000000..6ffb4b7a212e
--- /dev/null
+++ b/arch/sh/include/asm/cachectl.h
@@ -0,0 +1,19 @@
1#ifndef _SH_CACHECTL_H
2#define _SH_CACHECTL_H
3
4/* Definitions for the cacheflush system call. */
5
6#define CACHEFLUSH_D_INVAL 0x1 /* invalidate (without write back) */
7#define CACHEFLUSH_D_WB 0x2 /* write back (without invalidate) */
8#define CACHEFLUSH_D_PURGE 0x3 /* writeback and invalidate */
9
10#define CACHEFLUSH_I 0x4
11
12/*
13 * Options for cacheflush system call
14 */
15#define ICACHE CACHEFLUSH_I /* flush instruction cache */
16#define DCACHE CACHEFLUSH_D_PURGE /* writeback and flush data cache */
17#define BCACHE (ICACHE|DCACHE) /* flush both caches */
18
19#endif /* _SH_CACHECTL_H */