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authorPaul Mundt <lethal@linux-sh.org>2009-04-20 05:53:41 -0400
committerPaul Mundt <lethal@linux-sh.org>2009-04-20 05:53:41 -0400
commit3f8daeacd7ed7a502daf0998e2515cea4f467f21 (patch)
tree1f11706c54251791cacc9b28006cc3ed6ea2171c /arch/sh/drivers
parent5160d3f782a5e0cdb3bdaa8a891a1fb9d9ab83ec (diff)
sh: pci: Consolidate the remaining common bits.
This moves the remaining common bits in to pci-lib. Thereby reducing pci.c/pci-new.c to simple bus fixups and controller registration. As more platforms are moved over, the old code will disappear completely and the pci-new bits will be rolled in to pci-lib, eventually replacing pci.c completely. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/drivers')
-rw-r--r--arch/sh/drivers/pci/pci-lib.c64
-rw-r--r--arch/sh/drivers/pci/pci-new.c58
-rw-r--r--arch/sh/drivers/pci/pci.c58
3 files changed, 64 insertions, 116 deletions
diff --git a/arch/sh/drivers/pci/pci-lib.c b/arch/sh/drivers/pci/pci-lib.c
index 9fd3af9db462..ea8362945849 100644
--- a/arch/sh/drivers/pci/pci-lib.c
+++ b/arch/sh/drivers/pci/pci-lib.c
@@ -70,6 +70,70 @@ pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
70 res->end = region->end + offset; 70 res->end = region->end + offset;
71} 71}
72 72
73int pcibios_enable_device(struct pci_dev *dev, int mask)
74{
75 u16 cmd, old_cmd;
76 int idx;
77 struct resource *r;
78
79 pci_read_config_word(dev, PCI_COMMAND, &cmd);
80 old_cmd = cmd;
81 for (idx=0; idx < PCI_NUM_RESOURCES; idx++) {
82 /* Only set up the requested stuff */
83 if (!(mask & (1<<idx)))
84 continue;
85
86 r = &dev->resource[idx];
87 if (!(r->flags & (IORESOURCE_IO | IORESOURCE_MEM)))
88 continue;
89 if ((idx == PCI_ROM_RESOURCE) &&
90 (!(r->flags & IORESOURCE_ROM_ENABLE)))
91 continue;
92 if (!r->start && r->end) {
93 printk(KERN_ERR "PCI: Device %s not available "
94 "because of resource collisions\n",
95 pci_name(dev));
96 return -EINVAL;
97 }
98 if (r->flags & IORESOURCE_IO)
99 cmd |= PCI_COMMAND_IO;
100 if (r->flags & IORESOURCE_MEM)
101 cmd |= PCI_COMMAND_MEMORY;
102 }
103 if (cmd != old_cmd) {
104 printk("PCI: Enabling device %s (%04x -> %04x)\n",
105 pci_name(dev), old_cmd, cmd);
106 pci_write_config_word(dev, PCI_COMMAND, cmd);
107 }
108 return 0;
109}
110
111/*
112 * If we set up a device for bus mastering, we need to check and set
113 * the latency timer as it may not be properly set.
114 */
115static unsigned int pcibios_max_latency = 255;
116
117void pcibios_set_master(struct pci_dev *dev)
118{
119 u8 lat;
120 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
121 if (lat < 16)
122 lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
123 else if (lat > pcibios_max_latency)
124 lat = pcibios_max_latency;
125 else
126 return;
127 printk(KERN_INFO "PCI: Setting latency timer of device %s to %d\n",
128 pci_name(dev), lat);
129 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
130}
131
132void __init pcibios_update_irq(struct pci_dev *dev, int irq)
133{
134 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
135}
136
73int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, 137int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
74 enum pci_mmap_state mmap_state, int write_combine) 138 enum pci_mmap_state mmap_state, int write_combine)
75{ 139{
diff --git a/arch/sh/drivers/pci/pci-new.c b/arch/sh/drivers/pci/pci-new.c
index 9d426147802b..8c0b136eecb3 100644
--- a/arch/sh/drivers/pci/pci-new.c
+++ b/arch/sh/drivers/pci/pci-new.c
@@ -146,61 +146,3 @@ void __devinit __weak pcibios_fixup_bus(struct pci_bus *bus)
146 pcibios_fixup_device_resources(dev, bus); 146 pcibios_fixup_device_resources(dev, bus);
147 } 147 }
148} 148}
149
150int pcibios_enable_device(struct pci_dev *dev, int mask)
151{
152 u16 cmd, old_cmd;
153 int idx;
154 struct resource *r;
155
156 pci_read_config_word(dev, PCI_COMMAND, &cmd);
157 old_cmd = cmd;
158 for(idx=0; idx<6; idx++) {
159 if (!(mask & (1 << idx)))
160 continue;
161 r = &dev->resource[idx];
162 if (!r->start && r->end) {
163 printk(KERN_ERR "PCI: Device %s not available because "
164 "of resource collisions\n", pci_name(dev));
165 return -EINVAL;
166 }
167 if (r->flags & IORESOURCE_IO)
168 cmd |= PCI_COMMAND_IO;
169 if (r->flags & IORESOURCE_MEM)
170 cmd |= PCI_COMMAND_MEMORY;
171 }
172 if (dev->resource[PCI_ROM_RESOURCE].start)
173 cmd |= PCI_COMMAND_MEMORY;
174 if (cmd != old_cmd) {
175 printk(KERN_INFO "PCI: Enabling device %s (%04x -> %04x)\n",
176 pci_name(dev), old_cmd, cmd);
177 pci_write_config_word(dev, PCI_COMMAND, cmd);
178 }
179 return 0;
180}
181
182/*
183 * If we set up a device for bus mastering, we need to check and set
184 * the latency timer as it may not be properly set.
185 */
186static unsigned int pcibios_max_latency = 255;
187
188void pcibios_set_master(struct pci_dev *dev)
189{
190 u8 lat;
191 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
192 if (lat < 16)
193 lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
194 else if (lat > pcibios_max_latency)
195 lat = pcibios_max_latency;
196 else
197 return;
198 printk(KERN_INFO "PCI: Setting latency timer of device %s to %d\n",
199 pci_name(dev), lat);
200 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
201}
202
203void __init pcibios_update_irq(struct pci_dev *dev, int irq)
204{
205 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
206}
diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
index c15a6f0ad500..8c332b2a4641 100644
--- a/arch/sh/drivers/pci/pci.c
+++ b/arch/sh/drivers/pci/pci.c
@@ -72,62 +72,4 @@ void __devinit __weak pcibios_fixup_bus(struct pci_bus *bus)
72 pci_read_bridge_bases(bus); 72 pci_read_bridge_bases(bus);
73} 73}
74 74
75int pcibios_enable_device(struct pci_dev *dev, int mask)
76{
77 u16 cmd, old_cmd;
78 int idx;
79 struct resource *r;
80
81 pci_read_config_word(dev, PCI_COMMAND, &cmd);
82 old_cmd = cmd;
83 for(idx=0; idx<6; idx++) {
84 if (!(mask & (1 << idx)))
85 continue;
86 r = &dev->resource[idx];
87 if (!r->start && r->end) {
88 printk(KERN_ERR "PCI: Device %s not available because "
89 "of resource collisions\n", pci_name(dev));
90 return -EINVAL;
91 }
92 if (r->flags & IORESOURCE_IO)
93 cmd |= PCI_COMMAND_IO;
94 if (r->flags & IORESOURCE_MEM)
95 cmd |= PCI_COMMAND_MEMORY;
96 }
97 if (dev->resource[PCI_ROM_RESOURCE].start)
98 cmd |= PCI_COMMAND_MEMORY;
99 if (cmd != old_cmd) {
100 printk(KERN_INFO "PCI: Enabling device %s (%04x -> %04x)\n",
101 pci_name(dev), old_cmd, cmd);
102 pci_write_config_word(dev, PCI_COMMAND, cmd);
103 }
104 return 0;
105}
106
107/*
108 * If we set up a device for bus mastering, we need to check and set
109 * the latency timer as it may not be properly set.
110 */
111static unsigned int pcibios_max_latency = 255;
112
113void pcibios_set_master(struct pci_dev *dev)
114{
115 u8 lat;
116 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
117 if (lat < 16)
118 lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
119 else if (lat > pcibios_max_latency)
120 lat = pcibios_max_latency;
121 else
122 return;
123 printk(KERN_INFO "PCI: Setting latency timer of device %s to %d\n",
124 pci_name(dev), lat);
125 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
126}
127
128void __init pcibios_update_irq(struct pci_dev *dev, int irq)
129{
130 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
131}
132
133EXPORT_SYMBOL(board_pci_channels); 75EXPORT_SYMBOL(board_pci_channels);