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author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-10-13 12:49:04 -0400 |
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committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-10-13 12:49:04 -0400 |
commit | dcf397f037f52add9945eced57ca300ab6a4413c (patch) | |
tree | e78767d164589e9097a54bf564b072fb01f80820 /arch/sh/drivers | |
parent | 6faf035cf9fdd8283c2b2b2c34b76b5445ec6fc4 (diff) | |
parent | 68ee0f9c98a42e36f9eab29155b2bb0e7e409ac6 (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (124 commits)
sh: allow building for both r2d boards in same binary.
sh: fix r2d board detection
sh: Discard .exit.text/.exit.data at runtime.
sh: Fix up some section alignments in linker script.
sh: Fix SH-4 DMAC CHCR masking.
sh: Rip out left-over nommu cond syscall cruft.
sh: Make kgdb i-cache flushing less inept.
sh: kgdb section mismatches and tidying.
sh: cleanup struct irqaction initializers.
sh: early_printk tidying.
video: pvr2fb: Add TV (RGB) support to Dreamcast PVR driver.
sh: Conditionalize gUSA support.
sh: Follow gUSA preempt changes in __switch_to().
sh: Tidy up gUSA preempt handling.
sh: __copy_user() optimizations for small copies.
sh: clkfwk: Support multi-level clock propagation.
sh: Fix URAM start address on SH7785.
sh: Use boot_cpu_data for CPU probe.
sh: Support extended mode TLB on SH-X3.
sh: Bump MAX_ACTIVE_REGIONS for SH7785.
...
Diffstat (limited to 'arch/sh/drivers')
-rw-r--r-- | arch/sh/drivers/dma/Kconfig | 1 | ||||
-rw-r--r-- | arch/sh/drivers/dma/dma-sh.c | 13 | ||||
-rw-r--r-- | arch/sh/drivers/heartbeat.c | 70 | ||||
-rw-r--r-- | arch/sh/drivers/pci/ops-rts7751r2d.c | 8 | ||||
-rw-r--r-- | arch/sh/drivers/pci/pci-sh7780.c | 13 |
5 files changed, 66 insertions, 39 deletions
diff --git a/arch/sh/drivers/dma/Kconfig b/arch/sh/drivers/dma/Kconfig index ee711431e504..4e711a0c3dae 100644 --- a/arch/sh/drivers/dma/Kconfig +++ b/arch/sh/drivers/dma/Kconfig | |||
@@ -12,6 +12,7 @@ config SH_DMA | |||
12 | config NR_ONCHIP_DMA_CHANNELS | 12 | config NR_ONCHIP_DMA_CHANNELS |
13 | int | 13 | int |
14 | depends on SH_DMA | 14 | depends on SH_DMA |
15 | default "6" if CPU_SUBTYPE_SH7720 | ||
15 | default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R | 16 | default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R |
16 | default "12" if CPU_SUBTYPE_SH7780 | 17 | default "12" if CPU_SUBTYPE_SH7780 |
17 | default "4" | 18 | default "4" |
diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c index 06ed0609a95d..958bac1c585a 100644 --- a/arch/sh/drivers/dma/dma-sh.c +++ b/arch/sh/drivers/dma/dma-sh.c | |||
@@ -24,13 +24,19 @@ static int dmte_irq_map[] = { | |||
24 | DMTE1_IRQ, | 24 | DMTE1_IRQ, |
25 | DMTE2_IRQ, | 25 | DMTE2_IRQ, |
26 | DMTE3_IRQ, | 26 | DMTE3_IRQ, |
27 | #if defined(CONFIG_CPU_SUBTYPE_SH7751R) || \ | 27 | #if defined(CONFIG_CPU_SUBTYPE_SH7720) || \ |
28 | defined(CONFIG_CPU_SUBTYPE_SH7751R) || \ | ||
28 | defined(CONFIG_CPU_SUBTYPE_SH7760) || \ | 29 | defined(CONFIG_CPU_SUBTYPE_SH7760) || \ |
30 | defined(CONFIG_CPU_SUBTYPE_SH7709) || \ | ||
29 | defined(CONFIG_CPU_SUBTYPE_SH7780) | 31 | defined(CONFIG_CPU_SUBTYPE_SH7780) |
30 | DMTE4_IRQ, | 32 | DMTE4_IRQ, |
31 | DMTE5_IRQ, | 33 | DMTE5_IRQ, |
34 | #endif | ||
35 | #if defined(CONFIG_CPU_SUBTYPE_SH7751R) || \ | ||
36 | defined(CONFIG_CPU_SUBTYPE_SH7760) || \ | ||
37 | defined(CONFIG_CPU_SUBTYPE_SH7780) | ||
32 | DMTE6_IRQ, | 38 | DMTE6_IRQ, |
33 | DMTE7_IRQ, | 39 | DMTE7_IRQ, |
34 | #endif | 40 | #endif |
35 | }; | 41 | }; |
36 | 42 | ||
@@ -196,7 +202,8 @@ static int sh_dmac_get_dma_residue(struct dma_channel *chan) | |||
196 | return ctrl_inl(DMATCR[chan->chan]) << calc_xmit_shift(chan); | 202 | return ctrl_inl(DMATCR[chan->chan]) << calc_xmit_shift(chan); |
197 | } | 203 | } |
198 | 204 | ||
199 | #ifdef CONFIG_CPU_SUBTYPE_SH7780 | 205 | #if defined(CONFIG_CPU_SUBTYPE_SH7720) || \ |
206 | defined(CONFIG_CPU_SUBTYPE_SH7780) | ||
200 | #define dmaor_read_reg() ctrl_inw(DMAOR) | 207 | #define dmaor_read_reg() ctrl_inw(DMAOR) |
201 | #define dmaor_write_reg(data) ctrl_outw(data, DMAOR) | 208 | #define dmaor_write_reg(data) ctrl_outw(data, DMAOR) |
202 | #else | 209 | #else |
diff --git a/arch/sh/drivers/heartbeat.c b/arch/sh/drivers/heartbeat.c index 10c1828c9ff5..b76a14f12ce2 100644 --- a/arch/sh/drivers/heartbeat.c +++ b/arch/sh/drivers/heartbeat.c | |||
@@ -24,24 +24,44 @@ | |||
24 | #include <linux/sched.h> | 24 | #include <linux/sched.h> |
25 | #include <linux/timer.h> | 25 | #include <linux/timer.h> |
26 | #include <linux/io.h> | 26 | #include <linux/io.h> |
27 | #include <asm/heartbeat.h> | ||
27 | 28 | ||
28 | #define DRV_NAME "heartbeat" | 29 | #define DRV_NAME "heartbeat" |
29 | #define DRV_VERSION "0.1.0" | 30 | #define DRV_VERSION "0.1.1" |
30 | 31 | ||
31 | struct heartbeat_data { | 32 | static unsigned char default_bit_pos[] = { 0, 1, 2, 3, 4, 5, 6, 7 }; |
32 | void __iomem *base; | 33 | |
33 | unsigned char bit_pos[8]; | 34 | static inline void heartbeat_toggle_bit(struct heartbeat_data *hd, |
34 | struct timer_list timer; | 35 | unsigned bit, unsigned int inverted) |
35 | }; | 36 | { |
37 | unsigned int new; | ||
38 | |||
39 | new = (1 << hd->bit_pos[bit]); | ||
40 | if (inverted) | ||
41 | new = ~new; | ||
42 | |||
43 | switch (hd->regsize) { | ||
44 | case 32: | ||
45 | iowrite32(new, hd->base); | ||
46 | break; | ||
47 | case 16: | ||
48 | iowrite16(new, hd->base); | ||
49 | break; | ||
50 | default: | ||
51 | iowrite8(new, hd->base); | ||
52 | break; | ||
53 | } | ||
54 | } | ||
36 | 55 | ||
37 | static void heartbeat_timer(unsigned long data) | 56 | static void heartbeat_timer(unsigned long data) |
38 | { | 57 | { |
39 | struct heartbeat_data *hd = (struct heartbeat_data *)data; | 58 | struct heartbeat_data *hd = (struct heartbeat_data *)data; |
40 | static unsigned bit = 0, up = 1; | 59 | static unsigned bit = 0, up = 1; |
41 | 60 | ||
42 | ctrl_outw(1 << hd->bit_pos[bit], (unsigned long)hd->base); | 61 | heartbeat_toggle_bit(hd, bit, hd->flags & HEARTBEAT_INVERTED); |
62 | |||
43 | bit += up; | 63 | bit += up; |
44 | if ((bit == 0) || (bit == ARRAY_SIZE(hd->bit_pos)-1)) | 64 | if ((bit == 0) || (bit == (hd->nr_bits)-1)) |
45 | up = -up; | 65 | up = -up; |
46 | 66 | ||
47 | mod_timer(&hd->timer, jiffies + (110 - ((300 << FSHIFT) / | 67 | mod_timer(&hd->timer, jiffies + (110 - ((300 << FSHIFT) / |
@@ -64,21 +84,31 @@ static int heartbeat_drv_probe(struct platform_device *pdev) | |||
64 | return -EINVAL; | 84 | return -EINVAL; |
65 | } | 85 | } |
66 | 86 | ||
67 | hd = kmalloc(sizeof(struct heartbeat_data), GFP_KERNEL); | ||
68 | if (unlikely(!hd)) | ||
69 | return -ENOMEM; | ||
70 | |||
71 | if (pdev->dev.platform_data) { | 87 | if (pdev->dev.platform_data) { |
72 | memcpy(hd->bit_pos, pdev->dev.platform_data, | 88 | hd = pdev->dev.platform_data; |
73 | ARRAY_SIZE(hd->bit_pos)); | ||
74 | } else { | 89 | } else { |
75 | int i; | 90 | hd = kzalloc(sizeof(struct heartbeat_data), GFP_KERNEL); |
91 | if (unlikely(!hd)) | ||
92 | return -ENOMEM; | ||
93 | } | ||
94 | |||
95 | hd->base = ioremap_nocache(res->start, res->end - res->start + 1); | ||
96 | if (!unlikely(hd->base)) { | ||
97 | dev_err(&pdev->dev, "ioremap failed\n"); | ||
98 | |||
99 | if (!pdev->dev.platform_data) | ||
100 | kfree(hd); | ||
101 | |||
102 | return -ENXIO; | ||
103 | } | ||
76 | 104 | ||
77 | for (i = 0; i < ARRAY_SIZE(hd->bit_pos); i++) | 105 | if (!hd->nr_bits) { |
78 | hd->bit_pos[i] = i; | 106 | hd->bit_pos = default_bit_pos; |
107 | hd->nr_bits = ARRAY_SIZE(default_bit_pos); | ||
79 | } | 108 | } |
80 | 109 | ||
81 | hd->base = (void __iomem *)(unsigned long)res->start; | 110 | if (!hd->regsize) |
111 | hd->regsize = 8; /* default access size */ | ||
82 | 112 | ||
83 | setup_timer(&hd->timer, heartbeat_timer, (unsigned long)hd); | 113 | setup_timer(&hd->timer, heartbeat_timer, (unsigned long)hd); |
84 | platform_set_drvdata(pdev, hd); | 114 | platform_set_drvdata(pdev, hd); |
@@ -91,10 +121,12 @@ static int heartbeat_drv_remove(struct platform_device *pdev) | |||
91 | struct heartbeat_data *hd = platform_get_drvdata(pdev); | 121 | struct heartbeat_data *hd = platform_get_drvdata(pdev); |
92 | 122 | ||
93 | del_timer_sync(&hd->timer); | 123 | del_timer_sync(&hd->timer); |
124 | iounmap(hd->base); | ||
94 | 125 | ||
95 | platform_set_drvdata(pdev, NULL); | 126 | platform_set_drvdata(pdev, NULL); |
96 | 127 | ||
97 | kfree(hd); | 128 | if (!pdev->dev.platform_data) |
129 | kfree(hd); | ||
98 | 130 | ||
99 | return 0; | 131 | return 0; |
100 | } | 132 | } |
diff --git a/arch/sh/drivers/pci/ops-rts7751r2d.c b/arch/sh/drivers/pci/ops-rts7751r2d.c index 4a518d948049..ec8430c8d2d1 100644 --- a/arch/sh/drivers/pci/ops-rts7751r2d.c +++ b/arch/sh/drivers/pci/ops-rts7751r2d.c | |||
@@ -19,10 +19,10 @@ | |||
19 | #include "pci-sh4.h" | 19 | #include "pci-sh4.h" |
20 | 20 | ||
21 | static u8 rts7751r2d_irq_tab[] __initdata = { | 21 | static u8 rts7751r2d_irq_tab[] __initdata = { |
22 | IRQ_PCISLOT1, | 22 | IRQ_PCI_INTA, |
23 | IRQ_PCISLOT2, | 23 | IRQ_PCI_INTB, |
24 | IRQ_PCMCIA, | 24 | IRQ_PCI_INTC, |
25 | IRQ_PCIETH, | 25 | IRQ_PCI_INTD, |
26 | }; | 26 | }; |
27 | 27 | ||
28 | int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) | 28 | int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) |
diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c index 5508e45d4838..e516087fb435 100644 --- a/arch/sh/drivers/pci/pci-sh7780.c +++ b/arch/sh/drivers/pci/pci-sh7780.c | |||
@@ -79,19 +79,6 @@ static int __init sh7780_pci_init(void) | |||
79 | ctrl_outl(0xAAAA0000, INTC_ICR1); | 79 | ctrl_outl(0xAAAA0000, INTC_ICR1); |
80 | /* INTPRI: priority=3(all) */ | 80 | /* INTPRI: priority=3(all) */ |
81 | ctrl_outl(0x33333333, INTC_INTPRI); | 81 | ctrl_outl(0x33333333, INTC_INTPRI); |
82 | } else { | ||
83 | /* INTC SH-4 Mode */ | ||
84 | ctrl_outl(0x00200000, INTC_ICR0); | ||
85 | /* enable PCIINTA - PCIINTD */ | ||
86 | ctrl_outl(0x00078000, INTC_INT2MSKCR); | ||
87 | /* disable IRL4-7 Interrupt */ | ||
88 | ctrl_outl(0x40000000, INTC_INTMSK1); | ||
89 | /* disable IRL4-7 Interrupt */ | ||
90 | ctrl_outl(0x0000fffe, INTC_INTMSK2); | ||
91 | /* enable IRL0-3 Interrupt */ | ||
92 | ctrl_outl(0x80000000, INTC_INTMSKCLR1); | ||
93 | /* enable IRL0-3 Interrupt */ | ||
94 | ctrl_outl(0xfffe0000, INTC_INTMSKCLR2); | ||
95 | } | 82 | } |
96 | 83 | ||
97 | if ((ret = sh4_pci_check_direct()) != 0) | 84 | if ((ret = sh4_pci_check_direct()) != 0) |