sh: SH7780 Solution Engine board support.

This adds support for the SH7780-based Solution Engine reference board.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.zh@hitachi.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

2 files changed, 38 insertions, 8 deletions

diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c
index 16b30a9e94bb..5508e45d4838 100644
--- a/arch/sh/drivers/pci/pci-sh7780.c
+++ b/arch/sh/drivers/pci/pci-sh7780.c
@@ -72,12 +72,27 @@ static int __init sh7780_pci_init(void)
         }
 
         /* Setup the INTC */
-        ctrl_outl(0x00200000, INTC_ICR0);       /* INTC SH-4 Mode */
-        ctrl_outl(0x00078000, INTC_INT2MSKCR);  /* enable PCIINTA - PCIINTD */
-        ctrl_outl(0x40000000, INTC_INTMSK1);    /* disable IRL4-7 Interrupt */
-        ctrl_outl(0x0000fffe, INTC_INTMSK2);    /* disable IRL4-7 Interrupt */
-        ctrl_outl(0x80000000, INTC_INTMSKCLR1); /* enable IRL0-3 Interrupt */
-        ctrl_outl(0xfffe0000, INTC_INTMSKCLR2); /* enable IRL0-3 Interrupt */
+        if (mach_is_7780se()) {
+                /* ICR0: IRL=use separately */
+                ctrl_outl(0x00C00020, INTC_ICR0);
+                /* ICR1: detect low level(for 2ndcut) */
+                ctrl_outl(0xAAAA0000, INTC_ICR1);
+                /* INTPRI: priority=3(all) */
+                ctrl_outl(0x33333333, INTC_INTPRI);
+        } else {
+                /* INTC SH-4 Mode */
+                ctrl_outl(0x00200000, INTC_ICR0);
+                /* enable PCIINTA - PCIINTD */
+                ctrl_outl(0x00078000, INTC_INT2MSKCR);
+                /* disable IRL4-7 Interrupt */
+                ctrl_outl(0x40000000, INTC_INTMSK1);
+                /* disable IRL4-7 Interrupt */
+                ctrl_outl(0x0000fffe, INTC_INTMSK2);
+                /* enable IRL0-3 Interrupt */
+                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
+                /* enable IRL0-3 Interrupt */
+                ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
+        }
 
         if ((ret = sh4_pci_check_direct()) != 0)
                 return ret;
@@ -147,9 +162,8 @@ int __init sh7780_pcic_init(struct sh4_pci_address_map *map)
          * DMA interrupts...
          */
 
-#ifdef CONFIG_SH_HIGHLANDER
+        /* Apply any last-minute PCIC fixups */
         pci_fixup_pcic();
-#endif
 
         /* SH7780 init done, set central function init complete */
         /* use round robin mode to stop a device starving/overruning */
diff --git a/arch/sh/drivers/pci/pci-sh7780.h b/arch/sh/drivers/pci/pci-sh7780.h
index bd44255509e6..00d12d0f8c1f 100644
--- a/arch/sh/drivers/pci/pci-sh7780.h
+++ b/arch/sh/drivers/pci/pci-sh7780.h
@@ -66,6 +66,22 @@
 #define SH7780_PCIPMCSR_BSE     0x046
 #define SH7780_PCICDD           0x047
 
+#define SH7780_PCICR            0x100           /* PCI Control Register */
+#define SH7780_PCILSR           0x104           /* PCI Local Space Register0 */
+#define SH7780_PCILSR1          0x108           /* PCI Local Space Register1 */
+#define SH7780_PCILAR0          0x10C           /* PCI Local Address Register1 */
+#define SH7780_PCILAR1          0x110           /* PCI Local Address Register1 */
+#define SH7780_PCIIR            0x114           /* PCI Interrupt Register */
+#define SH7780_PCIIMR           0x118           /* PCI Interrupt Mask Register */
+#define SH7780_PCIAIR           0x11C           /* Error Address Register */
+#define SH7780_PCICIR           0x120           /* Error Command/Data Register */
+#define SH7780_PCIAINT          0x130           /* Arbiter Interrupt Register */
+#define SH7780_PCIAINTM         0x134           /* Arbiter Int. Mask Register */
+#define SH7780_PCIBMIR          0x138           /* Error Bus Master Register */
+#define SH7780_PCIPAR           0x1C0           /* PIO Address Register */
+#define SH7780_PCIPINT          0x1CC           /* Power Mgmnt Int. Register */
+#define SH7780_PCIPINTM         0x1D0           /* Power Mgmnt Mask Register */
+
 #define SH7780_PCIMBR0          0x1E0
 #define SH7780_PCIMBMR0         0x1E4
 #define SH7780_PCIMBR2          0x1F0