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authorPaul Mundt <lethal@linux-sh.org>2010-10-13 19:44:55 -0400
committerPaul Mundt <lethal@linux-sh.org>2010-10-13 19:44:55 -0400
commitb6b77b2d5ffd2f8ee74fcc27661f7f4962c34705 (patch)
treec4596337ce521cd5be2f96af85ccbe88b76c4d80 /arch/sh/drivers
parent61a46766c9d5d8fb5dad23da1b7cc4cb8b0107da (diff)
sh: pci: Support secondary FPGA-driven PCIe clocks on SDK7786.
The SDK7786 FPGA has secondary control over the PCIe clocks, specifically relating to the slots and oscillator. This ties the FPGA clocks in to the clock framework and balances the refcounting similar to how the primary on-chip clocks are managed. While the on-chip clocks are per-port, the FPGA clock enable/disable is global for the entire block. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/drivers')
-rw-r--r--arch/sh/drivers/pci/fixups-sdk7786.c1
-rw-r--r--arch/sh/drivers/pci/pcie-sh7786.c23
2 files changed, 21 insertions, 3 deletions
diff --git a/arch/sh/drivers/pci/fixups-sdk7786.c b/arch/sh/drivers/pci/fixups-sdk7786.c
index 058a65a1aa20..0e18ee332553 100644
--- a/arch/sh/drivers/pci/fixups-sdk7786.c
+++ b/arch/sh/drivers/pci/fixups-sdk7786.c
@@ -10,7 +10,6 @@
10#define pr_fmt(fmt) "PCI: " fmt 10#define pr_fmt(fmt) "PCI: " fmt
11 11
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/clk.h>
14#include <linux/kernel.h> 13#include <linux/kernel.h>
15#include <linux/pci.h> 14#include <linux/pci.h>
16#include <mach/fpga.h> 15#include <mach/fpga.h>
diff --git a/arch/sh/drivers/pci/pcie-sh7786.c b/arch/sh/drivers/pci/pcie-sh7786.c
index 8ec4af197388..ae0b2c9b70a0 100644
--- a/arch/sh/drivers/pci/pcie-sh7786.c
+++ b/arch/sh/drivers/pci/pcie-sh7786.c
@@ -17,7 +17,6 @@
17#include <linux/sh_clk.h> 17#include <linux/sh_clk.h>
18#include "pcie-sh7786.h" 18#include "pcie-sh7786.h"
19#include <asm/sizes.h> 19#include <asm/sizes.h>
20#include <asm/clock.h>
21 20
22struct sh7786_pcie_port { 21struct sh7786_pcie_port {
23 struct pci_channel *hose; 22 struct pci_channel *hose;
@@ -510,6 +509,7 @@ static struct sh7786_pcie_hwops sh7786_65nm_pcie_hwops __initdata = {
510 509
511static int __init sh7786_pcie_init(void) 510static int __init sh7786_pcie_init(void)
512{ 511{
512 struct clk *platclk;
513 int ret = 0, i; 513 int ret = 0, i;
514 514
515 printk(KERN_NOTICE "PCI: Starting initialization.\n"); 515 printk(KERN_NOTICE "PCI: Starting initialization.\n");
@@ -527,6 +527,22 @@ static int __init sh7786_pcie_init(void)
527 if (unlikely(!sh7786_pcie_ports)) 527 if (unlikely(!sh7786_pcie_ports))
528 return -ENOMEM; 528 return -ENOMEM;
529 529
530 /*
531 * Fetch any optional platform clock associated with this block.
532 *
533 * This is a rather nasty hack for boards with spec-mocking FPGAs
534 * that have a secondary set of clocks outside of the on-chip
535 * ones that need to be accounted for before there is any chance
536 * of touching the existing MSTP bits or CPG clocks.
537 */
538 platclk = clk_get(NULL, "pcie_plat_clk");
539 if (IS_ERR(platclk)) {
540 /* Sane hardware should probably get a WARN_ON.. */
541 platclk = NULL;
542 }
543
544 clk_enable(platclk);
545
530 printk(KERN_NOTICE "PCI: probing %d ports.\n", nr_ports); 546 printk(KERN_NOTICE "PCI: probing %d ports.\n", nr_ports);
531 547
532 for (i = 0; i < nr_ports; i++) { 548 for (i = 0; i < nr_ports; i++) {
@@ -539,8 +555,11 @@ static int __init sh7786_pcie_init(void)
539 ret |= sh7786_pcie_hwops->port_init_hw(port); 555 ret |= sh7786_pcie_hwops->port_init_hw(port);
540 } 556 }
541 557
542 if (unlikely(ret)) 558 if (unlikely(ret)) {
559 clk_disable(platclk);
560 clk_put(platclk);
543 return ret; 561 return ret;
562 }
544 563
545 return 0; 564 return 0;
546} 565}