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author | Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> | 2008-11-27 04:57:35 -0500 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2008-12-22 04:43:50 -0500 |
commit | 331ff103c7737294c8ecd7921564dae07b9e4632 (patch) | |
tree | 593a3ea9ea3986dbdcaf8a3ae329a023b7d5ddae /arch/sh/drivers | |
parent | 22f131aa8de7a534339bf7051680234462f2e877 (diff) |
sh: pci-sh7780: fix pci memory address mask
Fix the problem that cannot work a PCI device when system memory size is
256Mbyte in 29bit address mode.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/drivers')
-rw-r--r-- | arch/sh/drivers/pci/pci-sh7780.c | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c index b2a2bfa3c1bd..078dc44d6b08 100644 --- a/arch/sh/drivers/pci/pci-sh7780.c +++ b/arch/sh/drivers/pci/pci-sh7780.c | |||
@@ -123,16 +123,14 @@ int __init sh7780_pcic_init(struct sh4_pci_address_map *map) | |||
123 | * Window0 = map->window0.size @ non-cached area base = SDRAM | 123 | * Window0 = map->window0.size @ non-cached area base = SDRAM |
124 | * Window1 = map->window1.size @ cached area base = SDRAM | 124 | * Window1 = map->window1.size @ cached area base = SDRAM |
125 | */ | 125 | */ |
126 | word = ((map->window0.size - 1) & 0x1ff00001) | 0x01; | 126 | word = (CONFIG_MEMORY_SIZE - 0x00100000) | 0x00000001; |
127 | pci_write_reg(0x07f00001, SH4_PCILSR0); | 127 | pci_write_reg(word, SH4_PCILSR0); |
128 | word = ((map->window1.size - 1) & 0x1ff00001) | 0x01; | ||
129 | pci_write_reg(0x00000001, SH4_PCILSR1); | 128 | pci_write_reg(0x00000001, SH4_PCILSR1); |
130 | /* Set the values on window 0 PCI config registers */ | 129 | /* Set the values on window 0 PCI config registers */ |
131 | word = P2SEGADDR(map->window0.base); | 130 | word = (CONFIG_MEMORY_SIZE > 0x08000000) ? 0x10000000 : 0x08000000; |
132 | pci_write_reg(0xa8000000, SH4_PCILAR0); | 131 | pci_write_reg(word | 0xa0000000, SH4_PCILAR0); |
133 | pci_write_reg(0x08000000, SH7780_PCIMBAR0); | 132 | pci_write_reg(word, SH7780_PCIMBAR0); |
134 | /* Set the values on window 1 PCI config registers */ | 133 | /* Set the values on window 1 PCI config registers */ |
135 | word = P2SEGADDR(map->window1.base); | ||
136 | pci_write_reg(0x00000000, SH4_PCILAR1); | 134 | pci_write_reg(0x00000000, SH4_PCILAR1); |
137 | pci_write_reg(0x00000000, SH7780_PCIMBAR1); | 135 | pci_write_reg(0x00000000, SH7780_PCIMBAR1); |
138 | 136 | ||