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authorNobuhiro Iwamatsu <nobuhiro.iwamatsu.zh@hitachi.com>2007-03-28 11:07:35 -0400
committerPaul Mundt <lethal@hera.kernel.org>2007-05-06 22:11:55 -0400
commitb75762302e144b73f12b72c59b99401d036680aa (patch)
tree92b2ea71d705652bcb3ec9435e86fcf9c06b5757 /arch/sh/drivers/pci/pci-sh7780.h
parentcd6c7ea234dc8a8607283e056d8010b2bd3c6369 (diff)
sh: SH7780 Solution Engine board support.
This adds support for the SH7780-based Solution Engine reference board. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.zh@hitachi.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/drivers/pci/pci-sh7780.h')
-rw-r--r--arch/sh/drivers/pci/pci-sh7780.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/sh/drivers/pci/pci-sh7780.h b/arch/sh/drivers/pci/pci-sh7780.h
index bd44255509e6..00d12d0f8c1f 100644
--- a/arch/sh/drivers/pci/pci-sh7780.h
+++ b/arch/sh/drivers/pci/pci-sh7780.h
@@ -66,6 +66,22 @@
66#define SH7780_PCIPMCSR_BSE 0x046 66#define SH7780_PCIPMCSR_BSE 0x046
67#define SH7780_PCICDD 0x047 67#define SH7780_PCICDD 0x047
68 68
69#define SH7780_PCICR 0x100 /* PCI Control Register */
70#define SH7780_PCILSR 0x104 /* PCI Local Space Register0 */
71#define SH7780_PCILSR1 0x108 /* PCI Local Space Register1 */
72#define SH7780_PCILAR0 0x10C /* PCI Local Address Register1 */
73#define SH7780_PCILAR1 0x110 /* PCI Local Address Register1 */
74#define SH7780_PCIIR 0x114 /* PCI Interrupt Register */
75#define SH7780_PCIIMR 0x118 /* PCI Interrupt Mask Register */
76#define SH7780_PCIAIR 0x11C /* Error Address Register */
77#define SH7780_PCICIR 0x120 /* Error Command/Data Register */
78#define SH7780_PCIAINT 0x130 /* Arbiter Interrupt Register */
79#define SH7780_PCIAINTM 0x134 /* Arbiter Int. Mask Register */
80#define SH7780_PCIBMIR 0x138 /* Error Bus Master Register */
81#define SH7780_PCIPAR 0x1C0 /* PIO Address Register */
82#define SH7780_PCIPINT 0x1CC /* Power Mgmnt Int. Register */
83#define SH7780_PCIPINTM 0x1D0 /* Power Mgmnt Mask Register */
84
69#define SH7780_PCIMBR0 0x1E0 85#define SH7780_PCIMBR0 0x1E0
70#define SH7780_PCIMBMR0 0x1E4 86#define SH7780_PCIMBMR0 0x1E4
71#define SH7780_PCIMBR2 0x1F0 87#define SH7780_PCIMBR2 0x1F0