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authorYoshihiro Shimoda <shimoda.yoshihiro@renesas.com>2009-04-06 07:37:15 -0400
committerPaul Mundt <lethal@linux-sh.org>2009-04-06 11:55:51 -0400
commit9bb019f4c25a426deab26c9d1c67c8914bb4424f (patch)
tree2079b6fbb56f8fb64af4eab13a830149ba2caa72 /arch/sh/drivers/pci/ops-sh7785lcr.c
parent7fd87b3f1a6955da0a21b4fd99f8939701055172 (diff)
sh: sh7785lcr: fix PCI address map for 32-bit mode
Fix the problem that cannot work PCI device on 32-bit mode because influence of the commit 68b42d1b548be1840aff7122fdebeb804daf0fa3 ("sh: sh7785lcr: Map whole PCI address space."). So this patch was implement like a 29-bit mode, map whole physical address space of DDR-SDRAM. Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/drivers/pci/ops-sh7785lcr.c')
-rw-r--r--arch/sh/drivers/pci/ops-sh7785lcr.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/sh/drivers/pci/ops-sh7785lcr.c b/arch/sh/drivers/pci/ops-sh7785lcr.c
index e8b7446a7c2b..fb0869f0bef8 100644
--- a/arch/sh/drivers/pci/ops-sh7785lcr.c
+++ b/arch/sh/drivers/pci/ops-sh7785lcr.c
@@ -48,8 +48,13 @@ EXPORT_SYMBOL(board_pci_channels);
48 48
49static struct sh4_pci_address_map sh7785_pci_map = { 49static struct sh4_pci_address_map sh7785_pci_map = {
50 .window0 = { 50 .window0 = {
51#if defined(CONFIG_32BIT)
52 .base = SH7780_32BIT_DDR_BASE_ADDR,
53 .size = 0x40000000,
54#else
51 .base = SH7780_CS0_BASE_ADDR, 55 .base = SH7780_CS0_BASE_ADDR,
52 .size = 0x20000000, 56 .size = 0x20000000,
57#endif
53 }, 58 },
54 59
55 .flags = SH4_PCIC_NO_RESET, 60 .flags = SH4_PCIC_NO_RESET,