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authorNobuhiro Iwamatsu <iwamatsu@nigauri.org>2007-03-26 01:27:43 -0400
committerPaul Mundt <lethal@hera.kernel.org>2007-05-06 22:10:54 -0400
commitc86c5a910451dd5a30e62a9e36d8e9b3c7a0c1d1 (patch)
tree69acbb65e61a8895dfdebfd70dc58f5d8d9dbe38 /arch/sh/drivers/pci/ops-lboxre2.c
parent00e8c494a1603eac0a2cae9836e624a752ad45b1 (diff)
sh: L-BOX RE2 support.
This adds support for the L-BOX RE2 router. http://www.nttcom.co.jp/l-box/ L-BOX RE2 is a SH7751R-based router. It has CF, Cardbus, serial, and LAN x2. This is one of the very few SH boards that a general person can obtain now. The L-BOX shipped with a 2.4.28 kernel, this is a rewritten patch adding it to current git. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/drivers/pci/ops-lboxre2.c')
-rw-r--r--arch/sh/drivers/pci/ops-lboxre2.c63
1 files changed, 63 insertions, 0 deletions
diff --git a/arch/sh/drivers/pci/ops-lboxre2.c b/arch/sh/drivers/pci/ops-lboxre2.c
new file mode 100644
index 000000000000..a13cb764b0b9
--- /dev/null
+++ b/arch/sh/drivers/pci/ops-lboxre2.c
@@ -0,0 +1,63 @@
1/*
2 * linux/arch/sh/drivers/pci/ops-lboxre2.c
3 *
4 * Copyright (C) 2007 Nobuhiro Iwamatsu
5 *
6 * PCI initialization for the NTT COMWARE L-BOX RE2
7 */
8#include <linux/kernel.h>
9#include <linux/types.h>
10#include <linux/init.h>
11#include <linux/pci.h>
12#include <linux/io.h>
13#include <asm/lboxre2.h>
14#include "pci-sh4.h"
15
16static char lboxre2_irq_tab[] __initdata = {
17 IRQ_ETH0, IRQ_ETH1, IRQ_INTA, IRQ_INTD,
18};
19
20int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
21{
22 return lboxre2_irq_tab[slot];
23}
24
25static struct resource sh7751_io_resource = {
26 .name = "SH7751_IO",
27 .start = SH7751_PCI_IO_BASE ,
28 .end = SH7751_PCI_IO_BASE + SH7751_PCI_IO_SIZE - 1,
29 .flags = IORESOURCE_IO
30};
31
32static struct resource sh7751_mem_resource = {
33 .name = "SH7751_mem",
34 .start = SH7751_PCI_MEMORY_BASE,
35 .end = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1,
36 .flags = IORESOURCE_MEM
37};
38
39extern struct pci_ops sh7751_pci_ops;
40
41struct pci_channel board_pci_channels[] = {
42 { &sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
43 { NULL, NULL, NULL, 0, 0 },
44};
45
46EXPORT_SYMBOL(board_pci_channels);
47
48static struct sh4_pci_address_map sh7751_pci_map = {
49 .window0 = {
50 .base = SH7751_CS3_BASE_ADDR,
51 .size = 0x04000000,
52 },
53 .window1 = {
54 .base = 0x00000000, /* Unused */
55 .size = 0x00000000, /* Unused */
56 },
57 .flags = SH4_PCIC_NO_RESET,
58};
59
60int __init pcibios_init_platform(void)
61{
62 return sh7751_pcic_init(&sh7751_pci_map);
63}