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authorPaul Mundt <lethal@linux-sh.org>2009-04-17 07:37:16 -0400
committerPaul Mundt <lethal@linux-sh.org>2009-04-17 07:37:16 -0400
commit62c7ae87cb5962d3dfaa6d916a15e4faa9e07363 (patch)
tree3ab00d7c857edeb864b204bf041444fb4197af9b /arch/sh/drivers/pci/fixups-r7780rp.c
parenta6d377b6969235a3b5a6e87bdcef387d0976b41c (diff)
sh: pci: Start unifying the SH7780 PCIC initialization.
This starts moving out the common initialization bits from the various fixup paths in to the shared init path. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/drivers/pci/fixups-r7780rp.c')
-rw-r--r--arch/sh/drivers/pci/fixups-r7780rp.c20
1 files changed, 1 insertions, 19 deletions
diff --git a/arch/sh/drivers/pci/fixups-r7780rp.c b/arch/sh/drivers/pci/fixups-r7780rp.c
index 864e92f69702..15ca65cb667e 100644
--- a/arch/sh/drivers/pci/fixups-r7780rp.c
+++ b/arch/sh/drivers/pci/fixups-r7780rp.c
@@ -22,33 +22,15 @@ int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
22{ 22{
23 return irq_tab[slot]; 23 return irq_tab[slot];
24} 24}
25
25int pci_fixup_pcic(struct pci_channel *chan) 26int pci_fixup_pcic(struct pci_channel *chan)
26{ 27{
27 pci_write_reg(chan, 0x000043ff, SH4_PCIINTM); 28 pci_write_reg(chan, 0x000043ff, SH4_PCIINTM);
28 pci_write_reg(chan, 0x0000380f, SH4_PCIAINTM);
29
30 pci_write_reg(chan, 0xfbb00047, SH7780_PCICMD);
31 pci_write_reg(chan, 0x00000000, SH7780_PCIIBAR); 29 pci_write_reg(chan, 0x00000000, SH7780_PCIIBAR);
32
33 pci_write_reg(chan, 0x00011912, SH7780_PCISVID);
34 pci_write_reg(chan, 0x08000000, SH7780_PCICSCR0); 30 pci_write_reg(chan, 0x08000000, SH7780_PCICSCR0);
35 pci_write_reg(chan, 0x0000001b, SH7780_PCICSAR0); 31 pci_write_reg(chan, 0x0000001b, SH7780_PCICSAR0);
36 pci_write_reg(chan, 0xfd000000, SH7780_PCICSCR1); 32 pci_write_reg(chan, 0xfd000000, SH7780_PCICSCR1);
37 pci_write_reg(chan, 0x0000000f, SH7780_PCICSAR1); 33 pci_write_reg(chan, 0x0000000f, SH7780_PCICSAR1);
38 34
39 pci_write_reg(chan, 0xfd000000, SH7780_PCIMBR0);
40 pci_write_reg(chan, 0x00fc0000, SH7780_PCIMBMR0);
41
42#ifdef CONFIG_32BIT
43 pci_write_reg(chan, 0xc0000000, SH7780_PCIMBR2);
44 pci_write_reg(chan, 0x20000000 - SH7780_PCI_IO_SIZE, SH7780_PCIMBMR2);
45#endif
46
47 /* Set IOBR for windows containing area specified in pci.h */
48 pci_write_reg(chan, chan->io_resource->start & ~(SH7780_PCI_IO_SIZE-1),
49 SH7780_PCIIOBR);
50 pci_write_reg(chan, ((SH7780_PCI_IO_SIZE-1) & (7<<18)),
51 SH7780_PCIIOBMR);
52
53 return 0; 35 return 0;
54} 36}