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authorMarkus Brunner <super.firetwister@gmail.com>2007-08-19 19:59:33 -0400
committerPaul Mundt <lethal@linux-sh.org>2007-09-20 22:57:49 -0400
commit3ea6bc3de4f15fcae84fb31eeea4d420685a3da2 (patch)
tree2b9e37135052aab926b7be0822d024c4ba71c32e /arch/sh/drivers/dma
parentdfc5ed2a939baf08f9385a8c6249b719cac63665 (diff)
sh: Add SH7720 CPU support.
This adds support for the SH7720 (SH3-DSP) CPU. Signed-off by: Markus Brunner <super.firetwister@gmail.com> Signed-off by: Mark Jonas <toertel@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/drivers/dma')
-rw-r--r--arch/sh/drivers/dma/Kconfig1
-rw-r--r--arch/sh/drivers/dma/dma-sh.c12
2 files changed, 10 insertions, 3 deletions
diff --git a/arch/sh/drivers/dma/Kconfig b/arch/sh/drivers/dma/Kconfig
index ee711431e504..4e711a0c3dae 100644
--- a/arch/sh/drivers/dma/Kconfig
+++ b/arch/sh/drivers/dma/Kconfig
@@ -12,6 +12,7 @@ config SH_DMA
12config NR_ONCHIP_DMA_CHANNELS 12config NR_ONCHIP_DMA_CHANNELS
13 int 13 int
14 depends on SH_DMA 14 depends on SH_DMA
15 default "6" if CPU_SUBTYPE_SH7720
15 default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R 16 default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R
16 default "12" if CPU_SUBTYPE_SH7780 17 default "12" if CPU_SUBTYPE_SH7780
17 default "4" 18 default "4"
diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c
index 06ed0609a95d..6e5f16cb0aa5 100644
--- a/arch/sh/drivers/dma/dma-sh.c
+++ b/arch/sh/drivers/dma/dma-sh.c
@@ -24,13 +24,18 @@ static int dmte_irq_map[] = {
24 DMTE1_IRQ, 24 DMTE1_IRQ,
25 DMTE2_IRQ, 25 DMTE2_IRQ,
26 DMTE3_IRQ, 26 DMTE3_IRQ,
27#if defined(CONFIG_CPU_SUBTYPE_SH7751R) || \ 27#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
28 defined(CONFIG_CPU_SUBTYPE_SH7751R) || \
28 defined(CONFIG_CPU_SUBTYPE_SH7760) || \ 29 defined(CONFIG_CPU_SUBTYPE_SH7760) || \
29 defined(CONFIG_CPU_SUBTYPE_SH7780) 30 defined(CONFIG_CPU_SUBTYPE_SH7780)
30 DMTE4_IRQ, 31 DMTE4_IRQ,
31 DMTE5_IRQ, 32 DMTE5_IRQ,
33#endif
34#if defined(CONFIG_CPU_SUBTYPE_SH7751R) || \
35 defined(CONFIG_CPU_SUBTYPE_SH7760) || \
36 defined(CONFIG_CPU_SUBTYPE_SH7780)
32 DMTE6_IRQ, 37 DMTE6_IRQ,
33 DMTE7_IRQ, 38 DMTE7_IRQ,
34#endif 39#endif
35}; 40};
36 41
@@ -196,7 +201,8 @@ static int sh_dmac_get_dma_residue(struct dma_channel *chan)
196 return ctrl_inl(DMATCR[chan->chan]) << calc_xmit_shift(chan); 201 return ctrl_inl(DMATCR[chan->chan]) << calc_xmit_shift(chan);
197} 202}
198 203
199#ifdef CONFIG_CPU_SUBTYPE_SH7780 204#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
205 defined(CONFIG_CPU_SUBTYPE_SH7780)
200#define dmaor_read_reg() ctrl_inw(DMAOR) 206#define dmaor_read_reg() ctrl_inw(DMAOR)
201#define dmaor_write_reg(data) ctrl_outw(data, DMAOR) 207#define dmaor_write_reg(data) ctrl_outw(data, DMAOR)
202#else 208#else