diff options
author | Manuel Lauss <mano@roarinelk.homelinux.net> | 2007-05-09 04:36:15 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2007-05-09 04:36:15 -0400 |
commit | fc467a2623029976899261d6d379779c950ddcba (patch) | |
tree | 16b1721c800bd907207723f8031fb8601811b584 /arch/sh/drivers/dma/Kconfig | |
parent | 57be2b484a417bffae66359b9b89e7239480b729 (diff) |
sh: SH7760 DMABRG support.
The DMABRG is a special DMA unit within the SH7760 which does data
transfers from main memory to Audio units and USB shared memory.
It has 3 IRQ lines which generate 10 events, which have to be masked
unmasked and acked in a single 32bit register. It works independently
from the tradition SH DMAC, but blocks usage of DMAC channel 0.
This patch adds 2 functions to associate callbacks with DMABRG events
and initialization.
Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/drivers/dma/Kconfig')
-rw-r--r-- | arch/sh/drivers/dma/Kconfig | 20 |
1 files changed, 14 insertions, 6 deletions
diff --git a/arch/sh/drivers/dma/Kconfig b/arch/sh/drivers/dma/Kconfig index defc13c37d48..99935f9daf4b 100644 --- a/arch/sh/drivers/dma/Kconfig +++ b/arch/sh/drivers/dma/Kconfig | |||
@@ -1,12 +1,12 @@ | |||
1 | menu "DMA support" | 1 | menu "DMA support" |
2 | 2 | ||
3 | config SH_DMA | 3 | config SH_DMA_API |
4 | bool "DMA controller (DMAC) support" | 4 | bool |
5 | help | ||
6 | Selecting this option will provide same API as PC's Direct Memory | ||
7 | Access Controller(8237A) for SuperH DMAC. | ||
8 | 5 | ||
9 | If unsure, say N. | 6 | config SH_DMA |
7 | bool "SuperH on-chip DMA controller (DMAC) support" | ||
8 | select SH_DMA_API | ||
9 | default n | ||
10 | 10 | ||
11 | config NR_ONCHIP_DMA_CHANNELS | 11 | config NR_ONCHIP_DMA_CHANNELS |
12 | depends on SH_DMA | 12 | depends on SH_DMA |
@@ -53,4 +53,12 @@ config DMA_PAGE_OPS_CHANNEL | |||
53 | in case channel 3 is unavailable. On the SH4, channels 1,2, and 3 | 53 | in case channel 3 is unavailable. On the SH4, channels 1,2, and 3 |
54 | are dual-address capable. | 54 | are dual-address capable. |
55 | 55 | ||
56 | config SH_DMABRG | ||
57 | bool "SH7760 DMABRG support" | ||
58 | depends on CPU_SUBTYPE_SH7760 | ||
59 | help | ||
60 | The DMABRG does data transfers from main memory to Audio/USB units | ||
61 | of the SH7760. | ||
62 | Say Y if you want to use Audio/USB DMA on your SH7760 board. | ||
63 | |||
56 | endmenu | 64 | endmenu |