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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /arch/sh/drivers/dma/Kconfig
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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1menu "DMA support"
2
3config SH_DMA
4 bool "DMA controller (DMAC) support"
5 help
6 Selecting this option will provide same API as PC's Direct Memory
7 Access Controller(8237A) for SuperH DMAC.
8
9 If unsure, say N.
10
11config NR_ONCHIP_DMA_CHANNELS
12 depends on SH_DMA
13 int "Number of on-chip DMAC channels"
14 default "4"
15 help
16 This allows you to specify the number of channels that the on-chip
17 DMAC supports. This will be 4 for SH7750/SH7751 and 8 for the
18 SH7750R/SH7751R.
19
20config NR_DMA_CHANNELS_BOOL
21 depends on SH_DMA
22 bool "Override default number of maximum DMA channels"
23 help
24 This allows you to forcibly update the maximum number of supported
25 DMA channels for a given board. If this is unset, this will default
26 to the number of channels that the on-chip DMAC has.
27
28config NR_DMA_CHANNELS
29 int "Maximum number of DMA channels"
30 depends on SH_DMA && NR_DMA_CHANNELS_BOOL
31 default NR_ONCHIP_DMA_CHANNELS
32 help
33 This allows you to specify the maximum number of DMA channels to
34 support. Setting this to a higher value allows for cascading DMACs
35 with additional channels.
36
37config DMA_PAGE_OPS
38 bool "Use DMAC for page copy/clear"
39 depends on SH_DMA && BROKEN
40 help
41 Selecting this option will use a dual-address mode configured channel
42 in the SH DMAC for copy_page()/clear_page(). Primarily a performance
43 hack.
44
45config DMA_PAGE_OPS_CHANNEL
46 depends on DMA_PAGE_OPS
47 int "DMA channel for sh memory-manager page copy/clear"
48 default "3"
49 help
50 This allows the specification of the dual address dma channel,
51 in case channel 3 is unavailable. On the SH4, channels 1,2, and 3
52 are dual-address capable.
53
54endmenu
55