aboutsummaryrefslogtreecommitdiffstats
path: root/arch/sh/cchips
diff options
context:
space:
mode:
authorMagnus Damm <damm@igel.co.jp>2007-08-03 01:27:20 -0400
committerPaul Mundt <lethal@linux-sh.org>2007-09-20 22:57:48 -0400
commit48180cab3adf4cb290c28b70e44e958b7fb8a5b0 (patch)
tree2cf6000e98f680a8ed9631626d2ce7e9525b55d2 /arch/sh/cchips
parent51da64264b8d59a1e5fceebd94a975690b70b086 (diff)
sh: intc - convert voyagergx code
This patch converts the sh-specific voyagergx interrupt code to make use of intc. A lot of "interesting" old cruft gets replaced with intc tables and some simple demux code. - All interrupt sources in the sm501 data sheet are now in the header. - The number and order of IRQ values are disconnected from register bits. - Interrupt sources now start from IRQ 200. - set_irq_chained_handler() is now used to hook up the demux function. In the future it would probably make sense to move the interrupt demuxer into into the mfd driver, but this is probably a nice step in the right direction until that happens. Tested on a R2D-1 board using the serial port hooked up to the sm501. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/cchips')
-rw-r--r--arch/sh/cchips/voyagergx/irq.c188
1 files changed, 59 insertions, 129 deletions
diff --git a/arch/sh/cchips/voyagergx/irq.c b/arch/sh/cchips/voyagergx/irq.c
index d70e5c8461b5..0ca405a46a5b 100644
--- a/arch/sh/cchips/voyagergx/irq.c
+++ b/arch/sh/cchips/voyagergx/irq.c
@@ -23,149 +23,79 @@
23#include <asm/voyagergx.h> 23#include <asm/voyagergx.h>
24#include <asm/rts7751r2d.h> 24#include <asm/rts7751r2d.h>
25 25
26static void disable_voyagergx_irq(unsigned int irq) 26enum {
27{ 27 UNUSED = 0,
28 unsigned long val; 28
29 unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE); 29 /* voyager specific interrupt sources */
30 30 UP, G54, G53, G52, G51, G50, G49, G48,
31 pr_debug("disable_voyagergx_irq(%d): mask=%lx\n", irq, mask); 31 I2C, PW, DMA, PCI, I2S, AC, US,
32 val = readl((void __iomem *)VOYAGER_INT_MASK); 32 U1, U0, CV, MC, S1, S0,
33 val &= ~mask; 33 UH, TWOD, ZD, PV, CI,
34 writel(val, (void __iomem *)VOYAGER_INT_MASK);
35}
36
37static void enable_voyagergx_irq(unsigned int irq)
38{
39 unsigned long val;
40 unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE);
41
42 pr_debug("disable_voyagergx_irq(%d): mask=%lx\n", irq, mask);
43 val = readl((void __iomem *)VOYAGER_INT_MASK);
44 val |= mask;
45 writel(val, (void __iomem *)VOYAGER_INT_MASK);
46}
47
48static void mask_and_ack_voyagergx(unsigned int irq)
49{
50 disable_voyagergx_irq(irq);
51}
52
53static void end_voyagergx_irq(unsigned int irq)
54{
55 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
56 enable_voyagergx_irq(irq);
57}
58
59static unsigned int startup_voyagergx_irq(unsigned int irq)
60{
61 enable_voyagergx_irq(irq);
62 return 0;
63}
64
65static void shutdown_voyagergx_irq(unsigned int irq)
66{
67 disable_voyagergx_irq(irq);
68}
69
70static struct hw_interrupt_type voyagergx_irq_type = {
71 .typename = "VOYAGERGX-IRQ",
72 .startup = startup_voyagergx_irq,
73 .shutdown = shutdown_voyagergx_irq,
74 .enable = enable_voyagergx_irq,
75 .disable = disable_voyagergx_irq,
76 .ack = mask_and_ack_voyagergx,
77 .end = end_voyagergx_irq,
78}; 34};
79 35
80static irqreturn_t voyagergx_interrupt(int irq, void *dev_id) 36static struct intc_vect vectors[] = {
81{ 37 INTC_IRQ(UP, IRQ_SM501_UP), INTC_IRQ(G54, IRQ_SM501_G54),
82 printk(KERN_INFO 38 INTC_IRQ(G53, IRQ_SM501_G53), INTC_IRQ(G52, IRQ_SM501_G52),
83 "VoyagerGX: spurious interrupt, status: 0x%x\n", 39 INTC_IRQ(G51, IRQ_SM501_G51), INTC_IRQ(G50, IRQ_SM501_G50),
84 (unsigned int)readl((void __iomem *)INT_STATUS)); 40 INTC_IRQ(G49, IRQ_SM501_G49), INTC_IRQ(G48, IRQ_SM501_G48),
85 return IRQ_HANDLED; 41 INTC_IRQ(I2C, IRQ_SM501_I2C), INTC_IRQ(PW, IRQ_SM501_PW),
86} 42 INTC_IRQ(DMA, IRQ_SM501_DMA), INTC_IRQ(PCI, IRQ_SM501_PCI),
87 43 INTC_IRQ(I2S, IRQ_SM501_I2S), INTC_IRQ(AC, IRQ_SM501_AC),
88static struct { 44 INTC_IRQ(US, IRQ_SM501_US), INTC_IRQ(U1, IRQ_SM501_U1),
89 int (*func)(int, void *); 45 INTC_IRQ(U0, IRQ_SM501_U0), INTC_IRQ(CV, IRQ_SM501_CV),
90 void *dev; 46 INTC_IRQ(MC, IRQ_SM501_MC), INTC_IRQ(S1, IRQ_SM501_S1),
91} voyagergx_demux[VOYAGER_IRQ_NUM]; 47 INTC_IRQ(S0, IRQ_SM501_S0), INTC_IRQ(UH, IRQ_SM501_UH),
48 INTC_IRQ(TWOD, IRQ_SM501_2D), INTC_IRQ(ZD, IRQ_SM501_ZD),
49 INTC_IRQ(PV, IRQ_SM501_PV), INTC_IRQ(CI, IRQ_SM501_CI),
50};
92 51
93void voyagergx_register_irq_demux(int irq, 52static struct intc_mask_reg mask_registers[] = {
94 int (*demux)(int irq, void *dev), void *dev) 53 { VOYAGER_INT_MASK, 1, 32, /* "Interrupt Mask", MMIO_base + 0x30 */
95{ 54 { UP, G54, G53, G52, G51, G50, G49, G48,
96 voyagergx_demux[irq - VOYAGER_IRQ_BASE].func = demux; 55 I2C, PW, 0, DMA, PCI, I2S, AC, US,
97 voyagergx_demux[irq - VOYAGER_IRQ_BASE].dev = dev; 56 0, 0, U1, U0, CV, MC, S1, S0,
98} 57 0, UH, 0, 0, TWOD, ZD, PV, CI } },
58};
99 59
100void voyagergx_unregister_irq_demux(int irq) 60static DECLARE_INTC_DESC(intc_desc, "voyagergx", vectors,
101{ 61 NULL, NULL, mask_registers, NULL, NULL);
102 voyagergx_demux[irq - VOYAGER_IRQ_BASE].func = 0; 62
103} 63static unsigned int voyagergx_stat2irq[32] = {
64 IRQ_SM501_CI, IRQ_SM501_PV, IRQ_SM501_ZD, IRQ_SM501_2D,
65 0, 0, IRQ_SM501_UH, 0,
66 IRQ_SM501_S0, IRQ_SM501_S1, IRQ_SM501_MC, IRQ_SM501_CV,
67 IRQ_SM501_U0, IRQ_SM501_U1, 0, 0,
68 IRQ_SM501_US, IRQ_SM501_AC, IRQ_SM501_I2S, IRQ_SM501_PCI,
69 IRQ_SM501_DMA, 0, IRQ_SM501_PW, IRQ_SM501_I2C,
70 IRQ_SM501_G48, IRQ_SM501_G49, IRQ_SM501_G50, IRQ_SM501_G51,
71 IRQ_SM501_G52, IRQ_SM501_G53, IRQ_SM501_G54, IRQ_SM501_UP
72};
104 73
105int voyagergx_irq_demux(int irq) 74static void voyagergx_irq_demux(unsigned int irq, struct irq_desc *desc)
106{ 75{
107 76 unsigned long intv = ctrl_inl(INT_STATUS);
108 if (irq == IRQ_VOYAGER ) { 77 struct irq_desc *ext_desc;
109 unsigned long i = 0, bit __attribute__ ((unused)); 78 unsigned int ext_irq;
110 unsigned long val = readl((void __iomem *)INT_STATUS); 79 unsigned int k = 0;
111 80
112 if (val & (1 << 1)) 81 while (intv) {
113 i = 1; 82 ext_irq = voyagergx_stat2irq[k];
114 else if (val & (1 << 2)) 83 if (ext_irq && (intv & 1)) {
115 i = 2; 84 ext_desc = irq_desc + ext_irq;
116 else if (val & (1 << 6)) 85 handle_level_irq(ext_irq, ext_desc);
117 i = 6;
118 else if (val & (1 << 10))
119 i = 10;
120 else if (val & (1 << 11))
121 i = 11;
122 else if (val & (1 << 12))
123 i = 12;
124 else if (val & (1 << 17))
125 i = 17;
126 else
127 printk("Unexpected IRQ irq = %d status = 0x%08lx\n", irq, val);
128 pr_debug("voyagergx_irq_demux %ld \n", i);
129 if (i < VOYAGER_IRQ_NUM) {
130 irq = VOYAGER_IRQ_BASE + i;
131 if (voyagergx_demux[i].func != 0)
132 irq = voyagergx_demux[i].func(irq,
133 voyagergx_demux[i].dev);
134 } 86 }
87 intv >>= 1;
88 k++;
135 } 89 }
136 return irq;
137} 90}
138 91
139static struct irqaction irq0 = {
140 .name = "voyagergx",
141 .handler = voyagergx_interrupt,
142 .flags = IRQF_DISABLED,
143 .mask = CPU_MASK_NONE,
144};
145
146void __init setup_voyagergx_irq(void) 92void __init setup_voyagergx_irq(void)
147{ 93{
148 int i, flag; 94 printk(KERN_INFO "VoyagerGX on irq %d (mapped into %d to %d)\n",
149
150 printk(KERN_INFO "VoyagerGX configured at 0x%x on irq %d(mapped into %d to %d)\n",
151 VOYAGER_BASE,
152 IRQ_VOYAGER, 95 IRQ_VOYAGER,
153 VOYAGER_IRQ_BASE, 96 VOYAGER_IRQ_BASE,
154 VOYAGER_IRQ_BASE + VOYAGER_IRQ_NUM - 1); 97 VOYAGER_IRQ_BASE + VOYAGER_IRQ_NUM - 1);
155 98
156 for (i=0; i<VOYAGER_IRQ_NUM; i++) { 99 register_intc_controller(&intc_desc);
157 flag = 0; 100 set_irq_chained_handler(IRQ_VOYAGER, voyagergx_irq_demux);
158 switch (VOYAGER_IRQ_BASE + i) {
159 case VOYAGER_USBH_IRQ:
160 case VOYAGER_8051_IRQ:
161 case VOYAGER_UART0_IRQ:
162 case VOYAGER_UART1_IRQ:
163 case VOYAGER_AC97_IRQ:
164 flag = 1;
165 }
166 if (flag == 1)
167 irq_desc[VOYAGER_IRQ_BASE + i].chip = &voyagergx_irq_type;
168 }
169
170 setup_irq(IRQ_VOYAGER, &irq0);
171} 101}