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authorMagnus Damm <damm@igel.co.jp>2007-06-14 21:41:54 -0400
committerPaul Mundt <lethal@linux-sh.org>2007-06-14 21:41:54 -0400
commitd619500aed2f9b841b2310bc94f8056ae9ca2a73 (patch)
tree42ca07266afbf0406d419e57dde404ad89cd316d /arch/sh/boards
parentd3efbdd6c5e8c823b732df26a355ec931ccab374 (diff)
sh: rework intc2 code
The shared intc2 code currently contains cpu-specific #ifdefs. This is a tad unclean and it prevents us from using the shared code to drive board-specific irqs on the se7780 board. This patch reworks the intc2 code by moving the base addresses of the intc2 registers into struct intc2_desc. This new structure also contains the name of the controller in struct irq_chip. The idea behind putting struct irq_chip in there is that we can use offsetof() to locate the base addresses in the irq_chip callbacks. One logic change has been made - the original shared intc2 code enabled the interrupts by default but with this patch they are all disabled by default. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/boards')
-rw-r--r--arch/sh/boards/se/7780/irq.c45
1 files changed, 14 insertions, 31 deletions
diff --git a/arch/sh/boards/se/7780/irq.c b/arch/sh/boards/se/7780/irq.c
index 3d0625c2d07b..874914746009 100644
--- a/arch/sh/boards/se/7780/irq.c
+++ b/arch/sh/boards/se/7780/irq.c
@@ -16,28 +16,6 @@
16#include <asm/io.h> 16#include <asm/io.h>
17#include <asm/se7780.h> 17#include <asm/se7780.h>
18 18
19#define INTC_INTMSK0 0xFFD00044
20#define INTC_INTMSKCLR0 0xFFD00064
21
22static void disable_se7780_irq(unsigned int irq)
23{
24 struct intc2_data *p = get_irq_chip_data(irq);
25 ctrl_outl(1 << p->msk_shift, INTC_INTMSK0 + p->msk_offset);
26}
27
28static void enable_se7780_irq(unsigned int irq)
29{
30 struct intc2_data *p = get_irq_chip_data(irq);
31 ctrl_outl(1 << p->msk_shift, INTC_INTMSKCLR0 + p->msk_offset);
32}
33
34static struct irq_chip se7780_irq_chip __read_mostly = {
35 .name = "SE7780",
36 .mask = disable_se7780_irq,
37 .unmask = enable_se7780_irq,
38 .mask_ack = disable_se7780_irq,
39};
40
41static struct intc2_data intc2_irq_table[] = { 19static struct intc2_data intc2_irq_table[] = {
42 { 2, 0, 31, 0, 31, 3 }, /* daughter board EXTINT1 */ 20 { 2, 0, 31, 0, 31, 3 }, /* daughter board EXTINT1 */
43 { 4, 0, 30, 0, 30, 3 }, /* daughter board EXTINT2 */ 21 { 4, 0, 30, 0, 30, 3 }, /* daughter board EXTINT2 */
@@ -51,13 +29,24 @@ static struct intc2_data intc2_irq_table[] = {
51 { 0 , 0, 24, 0, 24, 3 }, /* SM501 */ 29 { 0 , 0, 24, 0, 24, 3 }, /* SM501 */
52}; 30};
53 31
32static struct intc2_desc intc2_irq_desc __read_mostly = {
33 .prio_base = 0, /* N/A */
34 .msk_base = 0xffd00044,
35 .mskclr_base = 0xffd00064,
36
37 .intc2_data = intc2_irq_table,
38 .nr_irqs = ARRAY_SIZE(intc2_irq_table),
39
40 .chip = {
41 .name = "INTC2-se7780",
42 },
43};
44
54/* 45/*
55 * Initialize IRQ setting 46 * Initialize IRQ setting
56 */ 47 */
57void __init init_se7780_IRQ(void) 48void __init init_se7780_IRQ(void)
58{ 49{
59 int i ;
60
61 /* enable all interrupt at FPGA */ 50 /* enable all interrupt at FPGA */
62 ctrl_outw(0, FPGA_INTMSK1); 51 ctrl_outw(0, FPGA_INTMSK1);
63 /* mask SM501 interrupt */ 52 /* mask SM501 interrupt */
@@ -79,11 +68,5 @@ void __init init_se7780_IRQ(void)
79 /* FPGA + 0x0A */ 68 /* FPGA + 0x0A */
80 ctrl_outw((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3); 69 ctrl_outw((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3);
81 70
82 for (i = 0; i < ARRAY_SIZE(intc2_irq_table); i++) { 71 register_intc2_controller(&intc2_irq_desc);
83 disable_irq_nosync(intc2_irq_table[i].irq);
84 set_irq_chip_and_handler_name( intc2_irq_table[i].irq, &se7780_irq_chip,
85 handle_level_irq, "level");
86 set_irq_chip_data( intc2_irq_table[i].irq, &intc2_irq_table[i] );
87 disable_se7780_irq(intc2_irq_table[i].irq);
88 }
89} 72}