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authorNobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>2008-09-23 22:46:48 -0400
committerPaul Mundt <lethal@linux-sh.org>2008-09-24 00:57:42 -0400
commitaa88f169d6fc4305125b6917d9d5f2e08211f011 (patch)
tree9144528a21f36c85862127e81030067492795ce3 /arch/sh/boards
parente7ab3cd251926d57ee11d7d320e8fb42c882ad22 (diff)
sh: ap325rxa: create CPLD data area in mtd
AP320 and AP325RXA has CPLD data in NOR Flash. If this area erased, this board can not boot. This patch create CPLD data area and set writeable mask bit. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/boards')
-rw-r--r--arch/sh/boards/board-ap325rxa.c33
1 files changed, 23 insertions, 10 deletions
diff --git a/arch/sh/boards/board-ap325rxa.c b/arch/sh/boards/board-ap325rxa.c
index fd1612590bf4..00e632fc0688 100644
--- a/arch/sh/boards/board-ap325rxa.c
+++ b/arch/sh/boards/board-ap325rxa.c
@@ -52,20 +52,33 @@ static struct platform_device smc9118_device = {
52 }, 52 },
53}; 53};
54 54
55/*
56 * AP320 and AP325RXA has CPLD data in NOR Flash(0xA80000-0xABFFFF).
57 * If this area erased, this board can not boot.
58 */
55static struct mtd_partition ap325rxa_nor_flash_partitions[] = { 59static struct mtd_partition ap325rxa_nor_flash_partitions[] = {
56 { 60 {
57 .name = "uboot", 61 .name = "uboot",
58 .offset = 0, 62 .offset = 0,
59 .size = (1 * 1024 * 1024), 63 .size = (1 * 1024 * 1024),
60 .mask_flags = MTD_WRITEABLE, /* Read-only */ 64 .mask_flags = MTD_WRITEABLE, /* Read-only */
65 }, {
66 .name = "kernel",
67 .offset = MTDPART_OFS_APPEND,
68 .size = (2 * 1024 * 1024),
69 }, {
70 .name = "free-area0",
71 .offset = MTDPART_OFS_APPEND,
72 .size = ((7 * 1024 * 1024) + (512 * 1024)),
61 }, { 73 }, {
62 .name = "kernel", 74 .name = "CPLD-Data",
63 .offset = MTDPART_OFS_APPEND, 75 .offset = MTDPART_OFS_APPEND,
64 .size = (2 * 1024 * 1024), 76 .mask_flags = MTD_WRITEABLE, /* Read-only */
77 .size = (1024 * 128 * 2),
65 }, { 78 }, {
66 .name = "other", 79 .name = "free-area1",
67 .offset = MTDPART_OFS_APPEND, 80 .offset = MTDPART_OFS_APPEND,
68 .size = MTDPART_SIZ_FULL, 81 .size = MTDPART_SIZ_FULL,
69 }, 82 },
70}; 83};
71 84