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authorPaul Mundt <lethal@linux-sh.org>2006-09-27 03:43:28 -0400
committerPaul Mundt <lethal@linux-sh.org>2006-09-27 03:43:28 -0400
commit959f85f8a3223c116bbe95dd8a9b207790b5d4d3 (patch)
treee7da9ccf292f860bfa0ff9cc8b2682cd1d6bad4d /arch/sh/boards
parente108b2ca2349f510ce7d7f910eda89f71d710d84 (diff)
sh: Consolidated SH7751/SH7780 PCI support.
This cleans up quite a lot of the PCI mess that we currently have, and attempts to consolidate the duplication in the SH7780 and SH7751 PCI controllers. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/boards')
-rw-r--r--arch/sh/boards/landisk/Makefile2
-rw-r--r--arch/sh/boards/landisk/io.c100
-rw-r--r--arch/sh/boards/mpc1211/setup.c15
-rw-r--r--arch/sh/boards/renesas/hs7751rvoip/io.c116
-rw-r--r--arch/sh/boards/renesas/r7780rp/io.c103
-rw-r--r--arch/sh/boards/renesas/rts7751r2d/io.c89
-rw-r--r--arch/sh/boards/renesas/systemh/io.c67
-rw-r--r--arch/sh/boards/se/770x/io.c11
-rw-r--r--arch/sh/boards/se/7751/io.c145
-rw-r--r--arch/sh/boards/sh03/setup.c6
-rw-r--r--arch/sh/boards/snapgear/io.c84
-rw-r--r--arch/sh/boards/titan/io.c65
12 files changed, 225 insertions, 578 deletions
diff --git a/arch/sh/boards/landisk/Makefile b/arch/sh/boards/landisk/Makefile
index 60e75c6db0eb..89e4beb2ad47 100644
--- a/arch/sh/boards/landisk/Makefile
+++ b/arch/sh/boards/landisk/Makefile
@@ -3,5 +3,3 @@
3# 3#
4 4
5obj-y := setup.o io.o irq.o rtc.o landisk_pwb.o 5obj-y := setup.o io.o irq.o rtc.o landisk_pwb.o
6
7obj-$(CONFIG_PCI) += pci.o
diff --git a/arch/sh/boards/landisk/io.c b/arch/sh/boards/landisk/io.c
index aa6b145c9e8f..92498b4947d5 100644
--- a/arch/sh/boards/landisk/io.c
+++ b/arch/sh/boards/landisk/io.c
@@ -14,39 +14,16 @@
14 * modifed by kogiidena 14 * modifed by kogiidena
15 * 2005.03.03 15 * 2005.03.03
16 */ 16 */
17
18#include <linux/kernel.h> 17#include <linux/kernel.h>
19#include <linux/types.h> 18#include <linux/types.h>
19#include <linux/pci.h>
20#include <asm/landisk/iodata_landisk.h> 20#include <asm/landisk/iodata_landisk.h>
21#include <asm/addrspace.h> 21#include <asm/addrspace.h>
22#include <asm/io.h> 22#include <asm/io.h>
23 23
24#include <linux/module.h>
25#include <linux/pci.h>
26#include "../../drivers/pci/pci-sh7751.h"
27
28extern void *area5_io_base; /* Area 5 I/O Base address */ 24extern void *area5_io_base; /* Area 5 I/O Base address */
29extern void *area6_io_base; /* Area 6 I/O Base address */ 25extern void *area6_io_base; /* Area 6 I/O Base address */
30 26
31/*
32 * The 7751R LANDISK uses the built-in PCI controller (PCIC)
33 * of the 7751R processor, and has a SuperIO accessible via the PCI.
34 * The board also includes a PCMCIA controller on its memory bus,
35 * like the other Solution Engine boards.
36 */
37
38#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR)
39#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR)
40#define PCI_IO_AREA SH7751_PCI_IO_BASE
41#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE
42
43#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
44
45static inline void delay(void)
46{
47 ctrl_inw(0xa0000000);
48}
49
50static inline unsigned long port2adr(unsigned int port) 27static inline unsigned long port2adr(unsigned int port)
51{ 28{
52 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6) 29 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
@@ -67,17 +44,6 @@ static inline unsigned long port2adr(unsigned int port)
67 return port; 44 return port;
68} 45}
69 46
70/* In case someone configures the kernel w/o PCI support: in that */
71/* scenario, don't ever bother to check for PCI-window addresses */
72
73/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */
74#if defined(CONFIG_PCI)
75#define CHECK_SH7751_PCIIO(port) \
76 ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
77#else
78#define CHECK_SH_7751_PCIIO(port) (0)
79#endif
80
81/* 47/*
82 * General outline: remap really low stuff [eventually] to SuperIO, 48 * General outline: remap really low stuff [eventually] to SuperIO,
83 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO) 49 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
@@ -89,8 +55,8 @@ u8 landisk_inb(unsigned long port)
89{ 55{
90 if (PXSEG(port)) 56 if (PXSEG(port))
91 return ctrl_inb(port); 57 return ctrl_inb(port);
92 else if (CHECK_SH7751_PCIIO(port)) 58 else if (is_pci_ioaddr(port))
93 return ctrl_inb(PCI_IOMAP(port)); 59 return ctrl_inb(pci_ioaddr(port));
94 60
95 return ctrl_inw(port2adr(port)) & 0xff; 61 return ctrl_inw(port2adr(port)) & 0xff;
96} 62}
@@ -101,12 +67,12 @@ u8 landisk_inb_p(unsigned long port)
101 67
102 if (PXSEG(port)) 68 if (PXSEG(port))
103 v = ctrl_inb(port); 69 v = ctrl_inb(port);
104 else if (CHECK_SH7751_PCIIO(port)) 70 else if (is_pci_ioaddr(port))
105 v = ctrl_inb(PCI_IOMAP(port)); 71 v = ctrl_inb(pci_ioaddr(port));
106 else 72 else
107 v = ctrl_inw(port2adr(port)) & 0xff; 73 v = ctrl_inw(port2adr(port)) & 0xff;
108 74
109 delay(); 75 ctrl_delay();
110 76
111 return v; 77 return v;
112} 78}
@@ -115,8 +81,8 @@ u16 landisk_inw(unsigned long port)
115{ 81{
116 if (PXSEG(port)) 82 if (PXSEG(port))
117 return ctrl_inw(port); 83 return ctrl_inw(port);
118 else if (CHECK_SH7751_PCIIO(port)) 84 else if (is_pci_ioaddr(port))
119 return ctrl_inw(PCI_IOMAP(port)); 85 return ctrl_inw(pci_ioaddr(port));
120 else 86 else
121 maybebadio(port); 87 maybebadio(port);
122 88
@@ -127,8 +93,8 @@ u32 landisk_inl(unsigned long port)
127{ 93{
128 if (PXSEG(port)) 94 if (PXSEG(port))
129 return ctrl_inl(port); 95 return ctrl_inl(port);
130 else if (CHECK_SH7751_PCIIO(port)) 96 else if (is_pci_ioaddr(port))
131 return ctrl_inl(PCI_IOMAP(port)); 97 return ctrl_inl(pci_ioaddr(port));
132 else 98 else
133 maybebadio(port); 99 maybebadio(port);
134 100
@@ -139,8 +105,8 @@ void landisk_outb(u8 value, unsigned long port)
139{ 105{
140 if (PXSEG(port)) 106 if (PXSEG(port))
141 ctrl_outb(value, port); 107 ctrl_outb(value, port);
142 else if (CHECK_SH7751_PCIIO(port)) 108 else if (is_pci_ioaddr(port))
143 ctrl_outb(value, PCI_IOMAP(port)); 109 ctrl_outb(value, pci_ioaddr(port));
144 else 110 else
145 ctrl_outw(value, port2adr(port)); 111 ctrl_outw(value, port2adr(port));
146} 112}
@@ -149,19 +115,19 @@ void landisk_outb_p(u8 value, unsigned long port)
149{ 115{
150 if (PXSEG(port)) 116 if (PXSEG(port))
151 ctrl_outb(value, port); 117 ctrl_outb(value, port);
152 else if (CHECK_SH7751_PCIIO(port)) 118 else if (is_pci_ioaddr(port))
153 ctrl_outb(value, PCI_IOMAP(port)); 119 ctrl_outb(value, pci_ioaddr(port));
154 else 120 else
155 ctrl_outw(value, port2adr(port)); 121 ctrl_outw(value, port2adr(port));
156 delay(); 122 ctrl_delay();
157} 123}
158 124
159void landisk_outw(u16 value, unsigned long port) 125void landisk_outw(u16 value, unsigned long port)
160{ 126{
161 if (PXSEG(port)) 127 if (PXSEG(port))
162 ctrl_outw(value, port); 128 ctrl_outw(value, port);
163 else if (CHECK_SH7751_PCIIO(port)) 129 else if (is_pci_ioaddr(port))
164 ctrl_outw(value, PCI_IOMAP(port)); 130 ctrl_outw(value, pci_ioaddr(port));
165 else 131 else
166 maybebadio(port); 132 maybebadio(port);
167} 133}
@@ -170,8 +136,8 @@ void landisk_outl(u32 value, unsigned long port)
170{ 136{
171 if (PXSEG(port)) 137 if (PXSEG(port))
172 ctrl_outl(value, port); 138 ctrl_outl(value, port);
173 else if (CHECK_SH7751_PCIIO(port)) 139 else if (is_pci_ioaddr(port))
174 ctrl_outl(value, PCI_IOMAP(port)); 140 ctrl_outl(value, pci_ioaddr(port));
175 else 141 else
176 maybebadio(port); 142 maybebadio(port);
177} 143}
@@ -184,8 +150,8 @@ void landisk_insb(unsigned long port, void *dst, unsigned long count)
184 if (PXSEG(port)) { 150 if (PXSEG(port)) {
185 while (count--) 151 while (count--)
186 *buf++ = *(volatile u8 *)port; 152 *buf++ = *(volatile u8 *)port;
187 } else if (CHECK_SH7751_PCIIO(port)) { 153 } else if (is_pci_ioaddr(port)) {
188 volatile u8 *bp = (volatile u8 *)PCI_IOMAP(port); 154 volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
189 155
190 while (count--) 156 while (count--)
191 *buf++ = *bp; 157 *buf++ = *bp;
@@ -203,8 +169,8 @@ void landisk_insw(unsigned long port, void *dst, unsigned long count)
203 169
204 if (PXSEG(port)) 170 if (PXSEG(port))
205 p = (volatile u16 *)port; 171 p = (volatile u16 *)port;
206 else if (CHECK_SH7751_PCIIO(port)) 172 else if (is_pci_ioaddr(port))
207 p = (volatile u16 *)PCI_IOMAP(port); 173 p = (volatile u16 *)pci_ioaddr(port);
208 else 174 else
209 p = (volatile u16 *)port2adr(port); 175 p = (volatile u16 *)port2adr(port);
210 while (count--) 176 while (count--)
@@ -215,8 +181,8 @@ void landisk_insl(unsigned long port, void *dst, unsigned long count)
215{ 181{
216 u32 *buf = dst; 182 u32 *buf = dst;
217 183
218 if (CHECK_SH7751_PCIIO(port)) { 184 if (is_pci_ioaddr(port)) {
219 volatile u32 *p = (volatile u32 *)PCI_IOMAP(port); 185 volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
220 186
221 while (count--) 187 while (count--)
222 *buf++ = *p; 188 *buf++ = *p;
@@ -232,8 +198,8 @@ void landisk_outsb(unsigned long port, const void *src, unsigned long count)
232 if (PXSEG(port)) 198 if (PXSEG(port))
233 while (count--) 199 while (count--)
234 ctrl_outb(*buf++, port); 200 ctrl_outb(*buf++, port);
235 else if (CHECK_SH7751_PCIIO(port)) { 201 else if (is_pci_ioaddr(port)) {
236 volatile u8 *bp = (volatile u8 *)PCI_IOMAP(port); 202 volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
237 203
238 while (count--) 204 while (count--)
239 *bp = *buf++; 205 *bp = *buf++;
@@ -251,8 +217,8 @@ void landisk_outsw(unsigned long port, const void *src, unsigned long count)
251 217
252 if (PXSEG(port)) 218 if (PXSEG(port))
253 p = (volatile u16 *)port; 219 p = (volatile u16 *)port;
254 else if (CHECK_SH7751_PCIIO(port)) 220 else if (is_pci_ioaddr(port))
255 p = (volatile u16 *)PCI_IOMAP(port); 221 p = (volatile u16 *)pci_ioaddr(port);
256 else 222 else
257 p = (volatile u16 *)port2adr(port); 223 p = (volatile u16 *)port2adr(port);
258 224
@@ -264,8 +230,8 @@ void landisk_outsl(unsigned long port, const void *src, unsigned long count)
264{ 230{
265 const u32 *buf = src; 231 const u32 *buf = src;
266 232
267 if (CHECK_SH7751_PCIIO(port)) { 233 if (is_pci_ioaddr(port)) {
268 volatile u32 *p = (volatile u32 *)PCI_IOMAP(port); 234 volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
269 235
270 while (count--) 236 while (count--)
271 *p = *buf++; 237 *p = *buf++;
@@ -277,8 +243,8 @@ void __iomem *landisk_ioport_map(unsigned long port, unsigned int size)
277{ 243{
278 if (PXSEG(port)) 244 if (PXSEG(port))
279 return (void __iomem *)port; 245 return (void __iomem *)port;
280 else if (CHECK_SH7751_PCIIO(port)) 246 else if (is_pci_ioaddr(port))
281 return (void __iomem *)PCI_IOMAP(port); 247 return (void __iomem *)pci_ioaddr(port);
282 248
283 return (void __iomem *)port2adr(port); 249 return (void __iomem *)port2adr(port);
284} 250}
diff --git a/arch/sh/boards/mpc1211/setup.c b/arch/sh/boards/mpc1211/setup.c
index 2bfb221cc35c..a8c5180ae219 100644
--- a/arch/sh/boards/mpc1211/setup.c
+++ b/arch/sh/boards/mpc1211/setup.c
@@ -255,23 +255,12 @@ void __init init_mpc1211_IRQ(void)
255 } 255 }
256} 256}
257 257
258/* 258static void delay1000(void)
259 Initialize the board
260*/
261
262
263static void delay (void)
264{
265 volatile unsigned short tmp;
266 tmp = *(volatile unsigned short *) 0xa0000000;
267}
268
269static void delay1000 (void)
270{ 259{
271 int i; 260 int i;
272 261
273 for (i=0; i<1000; i++) 262 for (i=0; i<1000; i++)
274 delay (); 263 ctrl_delay();
275} 264}
276 265
277static int put_smb_blk(unsigned char *p, int address, int command, int no) 266static int put_smb_blk(unsigned char *p, int address, int command, int no)
diff --git a/arch/sh/boards/renesas/hs7751rvoip/io.c b/arch/sh/boards/renesas/hs7751rvoip/io.c
index ecdce7ef6a34..8c26550ca2e4 100644
--- a/arch/sh/boards/renesas/hs7751rvoip/io.c
+++ b/arch/sh/boards/renesas/hs7751rvoip/io.c
@@ -13,14 +13,11 @@
13 13
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/types.h> 15#include <linux/types.h>
16#include <linux/module.h>
16#include <asm/io.h> 17#include <asm/io.h>
17#include <asm/hs7751rvoip/hs7751rvoip.h> 18#include <asm/hs7751rvoip/hs7751rvoip.h>
18#include <asm/addrspace.h> 19#include <asm/addrspace.h>
19 20
20#include <linux/module.h>
21#include <linux/pci.h>
22#include "../../../drivers/pci/pci-sh7751.h"
23
24extern void *area6_io8_base; /* Area 6 8bit I/O Base address */ 21extern void *area6_io8_base; /* Area 6 8bit I/O Base address */
25extern void *area5_io16_base; /* Area 5 16bit I/O Base address */ 22extern void *area5_io16_base; /* Area 5 16bit I/O Base address */
26 23
@@ -31,27 +28,17 @@ extern void *area5_io16_base; /* Area 5 16bit I/O Base address */
31 * like the other Solution Engine boards. 28 * like the other Solution Engine boards.
32 */ 29 */
33 30
34#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR)
35#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR)
36#define PCI_IO_AREA SH7751_PCI_IO_BASE
37#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE
38#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
39
40#define CODEC_IO_BASE 0x1000 31#define CODEC_IO_BASE 0x1000
41#define CODEC_IOMAP(a) ((unsigned long)area6_io8_base + ((a) - CODEC_IO_BASE)) 32#define CODEC_IOMAP(a) ((unsigned long)area6_io8_base + ((a) - CODEC_IO_BASE))
42 33
43static inline void delay(void)
44{
45 ctrl_inw(0xa0000000);
46}
47
48static inline unsigned long port2adr(unsigned int port) 34static inline unsigned long port2adr(unsigned int port)
49{ 35{
50 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6) 36 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
51 if (port == 0x3f6) 37 if (port == 0x3f6)
52 return ((unsigned long)area5_io16_base + 0x0c); 38 return ((unsigned long)area5_io16_base + 0x0c);
53 else 39 else
54 return ((unsigned long)area5_io16_base + 0x800 + ((port-0x1f0) << 1)); 40 return ((unsigned long)area5_io16_base + 0x800 +
41 ((port-0x1f0) << 1));
55 else 42 else
56 maybebadio((unsigned long)port); 43 maybebadio((unsigned long)port);
57 return port; 44 return port;
@@ -70,25 +57,10 @@ static inline int shifted_port(unsigned long port)
70} 57}
71 58
72#if defined(CONFIG_HS7751RVOIP_CODEC) 59#if defined(CONFIG_HS7751RVOIP_CODEC)
73static inline int 60#define codec_port(port) \
74codec_port(unsigned long port) 61 ((CODEC_IO_BASE <= (port)) && ((port) < (CODEC_IO_BASE + 0x20)))
75{
76 if (CODEC_IO_BASE <= port && port < (CODEC_IO_BASE+0x20))
77 return 1;
78 else
79 return 0;
80}
81#endif
82
83/* In case someone configures the kernel w/o PCI support: in that */
84/* scenario, don't ever bother to check for PCI-window addresses */
85
86/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */
87#if defined(CONFIG_PCI)
88#define CHECK_SH7751_PCIIO(port) \
89 ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
90#else 62#else
91#define CHECK_SH7751_PCIIO(port) (0) 63#define codec_port(port) (0)
92#endif 64#endif
93 65
94/* 66/*
@@ -102,12 +74,10 @@ unsigned char hs7751rvoip_inb(unsigned long port)
102{ 74{
103 if (PXSEG(port)) 75 if (PXSEG(port))
104 return ctrl_inb(port); 76 return ctrl_inb(port);
105#if defined(CONFIG_HS7751RVOIP_CODEC)
106 else if (codec_port(port)) 77 else if (codec_port(port))
107 return ctrl_inb(CODEC_IOMAP(port)); 78 return ctrl_inb(CODEC_IOMAP(port));
108#endif 79 else if (is_pci_ioaddr(port) || shifted_port(port))
109 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 80 return ctrl_inb(pci_ioaddr(port));
110 return ctrl_inb(PCI_IOMAP(port));
111 else 81 else
112 return ctrl_inw(port2adr(port)) & 0xff; 82 return ctrl_inw(port2adr(port)) & 0xff;
113} 83}
@@ -118,15 +88,13 @@ unsigned char hs7751rvoip_inb_p(unsigned long port)
118 88
119 if (PXSEG(port)) 89 if (PXSEG(port))
120 v = ctrl_inb(port); 90 v = ctrl_inb(port);
121#if defined(CONFIG_HS7751RVOIP_CODEC)
122 else if (codec_port(port)) 91 else if (codec_port(port))
123 v = ctrl_inb(CODEC_IOMAP(port)); 92 v = ctrl_inb(CODEC_IOMAP(port));
124#endif 93 else if (is_pci_ioaddr(port) || shifted_port(port))
125 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 94 v = ctrl_inb(pci_ioaddr(port));
126 v = ctrl_inb(PCI_IOMAP(port));
127 else 95 else
128 v = ctrl_inw(port2adr(port)) & 0xff; 96 v = ctrl_inw(port2adr(port)) & 0xff;
129 delay(); 97 ctrl_delay();
130 return v; 98 return v;
131} 99}
132 100
@@ -134,8 +102,8 @@ unsigned short hs7751rvoip_inw(unsigned long port)
134{ 102{
135 if (PXSEG(port)) 103 if (PXSEG(port))
136 return ctrl_inw(port); 104 return ctrl_inw(port);
137 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 105 else if (is_pci_ioaddr(port) || shifted_port(port))
138 return ctrl_inw(PCI_IOMAP(port)); 106 return ctrl_inw(pci_ioaddr(port));
139 else 107 else
140 maybebadio(port); 108 maybebadio(port);
141 return 0; 109 return 0;
@@ -145,8 +113,8 @@ unsigned int hs7751rvoip_inl(unsigned long port)
145{ 113{
146 if (PXSEG(port)) 114 if (PXSEG(port))
147 return ctrl_inl(port); 115 return ctrl_inl(port);
148 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 116 else if (is_pci_ioaddr(port) || shifted_port(port))
149 return ctrl_inl(PCI_IOMAP(port)); 117 return ctrl_inl(pci_ioaddr(port));
150 else 118 else
151 maybebadio(port); 119 maybebadio(port);
152 return 0; 120 return 0;
@@ -157,12 +125,10 @@ void hs7751rvoip_outb(unsigned char value, unsigned long port)
157 125
158 if (PXSEG(port)) 126 if (PXSEG(port))
159 ctrl_outb(value, port); 127 ctrl_outb(value, port);
160#if defined(CONFIG_HS7751RVOIP_CODEC)
161 else if (codec_port(port)) 128 else if (codec_port(port))
162 ctrl_outb(value, CODEC_IOMAP(port)); 129 ctrl_outb(value, CODEC_IOMAP(port));
163#endif 130 else if (is_pci_ioaddr(port) || shifted_port(port))
164 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 131 ctrl_outb(value, pci_ioaddr(port));
165 ctrl_outb(value, PCI_IOMAP(port));
166 else 132 else
167 ctrl_outb(value, port2adr(port)); 133 ctrl_outb(value, port2adr(port));
168} 134}
@@ -171,24 +137,22 @@ void hs7751rvoip_outb_p(unsigned char value, unsigned long port)
171{ 137{
172 if (PXSEG(port)) 138 if (PXSEG(port))
173 ctrl_outb(value, port); 139 ctrl_outb(value, port);
174#if defined(CONFIG_HS7751RVOIP_CODEC)
175 else if (codec_port(port)) 140 else if (codec_port(port))
176 ctrl_outb(value, CODEC_IOMAP(port)); 141 ctrl_outb(value, CODEC_IOMAP(port));
177#endif 142 else if (is_pci_ioaddr(port) || shifted_port(port))
178 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 143 ctrl_outb(value, pci_ioaddr(port));
179 ctrl_outb(value, PCI_IOMAP(port));
180 else 144 else
181 ctrl_outw(value, port2adr(port)); 145 ctrl_outw(value, port2adr(port));
182 146
183 delay(); 147 ctrl_delay();
184} 148}
185 149
186void hs7751rvoip_outw(unsigned short value, unsigned long port) 150void hs7751rvoip_outw(unsigned short value, unsigned long port)
187{ 151{
188 if (PXSEG(port)) 152 if (PXSEG(port))
189 ctrl_outw(value, port); 153 ctrl_outw(value, port);
190 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 154 else if (is_pci_ioaddr(port) || shifted_port(port))
191 ctrl_outw(value, PCI_IOMAP(port)); 155 ctrl_outw(value, pci_ioaddr(port));
192 else 156 else
193 maybebadio(port); 157 maybebadio(port);
194} 158}
@@ -197,8 +161,8 @@ void hs7751rvoip_outl(unsigned int value, unsigned long port)
197{ 161{
198 if (PXSEG(port)) 162 if (PXSEG(port))
199 ctrl_outl(value, port); 163 ctrl_outl(value, port);
200 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 164 else if (is_pci_ioaddr(port) || shifted_port(port))
201 ctrl_outl(value, PCI_IOMAP(port)); 165 ctrl_outl(value, pci_ioaddr(port));
202 else 166 else
203 maybebadio(port); 167 maybebadio(port);
204} 168}
@@ -210,13 +174,11 @@ void hs7751rvoip_insb(unsigned long port, void *addr, unsigned long count)
210 if (PXSEG(port)) 174 if (PXSEG(port))
211 while (count--) 175 while (count--)
212 *buf++ = ctrl_inb(port); 176 *buf++ = ctrl_inb(port);
213#if defined(CONFIG_HS7751RVOIP_CODEC)
214 else if (codec_port(port)) 177 else if (codec_port(port))
215 while (count--) 178 while (count--)
216 *buf++ = ctrl_inb(CODEC_IOMAP(port)); 179 *buf++ = ctrl_inb(CODEC_IOMAP(port));
217#endif 180 else if (is_pci_ioaddr(port) || shifted_port(port)) {
218 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { 181 volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
219 volatile u8 *bp = (volatile u8 *)PCI_IOMAP(port);
220 182
221 while (count--) 183 while (count--)
222 *buf++ = *bp; 184 *buf++ = *bp;
@@ -235,8 +197,8 @@ void hs7751rvoip_insw(unsigned long port, void *addr, unsigned long count)
235 197
236 if (PXSEG(port)) 198 if (PXSEG(port))
237 p = (volatile u16 *)port; 199 p = (volatile u16 *)port;
238 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 200 else if (is_pci_ioaddr(port) || shifted_port(port))
239 p = (volatile u16 *)PCI_IOMAP(port); 201 p = (volatile u16 *)pci_ioaddr(port);
240 else 202 else
241 p = (volatile u16 *)port2adr(port); 203 p = (volatile u16 *)port2adr(port);
242 while (count--) 204 while (count--)
@@ -246,8 +208,8 @@ void hs7751rvoip_insw(unsigned long port, void *addr, unsigned long count)
246void hs7751rvoip_insl(unsigned long port, void *addr, unsigned long count) 208void hs7751rvoip_insl(unsigned long port, void *addr, unsigned long count)
247{ 209{
248 210
249 if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { 211 if (is_pci_ioaddr(port) || shifted_port(port)) {
250 volatile u32 *p = (volatile u32 *)PCI_IOMAP(port); 212 volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
251 u32 *buf = addr; 213 u32 *buf = addr;
252 214
253 while (count--) 215 while (count--)
@@ -263,13 +225,11 @@ void hs7751rvoip_outsb(unsigned long port, const void *addr, unsigned long count
263 if (PXSEG(port)) 225 if (PXSEG(port))
264 while (count--) 226 while (count--)
265 ctrl_outb(*buf++, port); 227 ctrl_outb(*buf++, port);
266#if defined(CONFIG_HS7751RVOIP_CODEC)
267 else if (codec_port(port)) 228 else if (codec_port(port))
268 while (count--) 229 while (count--)
269 ctrl_outb(*buf++, CODEC_IOMAP(port)); 230 ctrl_outb(*buf++, CODEC_IOMAP(port));
270#endif 231 else if (is_pci_ioaddr(port) || shifted_port(port)) {
271 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { 232 volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
272 volatile u8 *bp = (volatile u8 *)PCI_IOMAP(port);
273 233
274 while (count--) 234 while (count--)
275 *bp = *buf++; 235 *bp = *buf++;
@@ -288,8 +248,8 @@ void hs7751rvoip_outsw(unsigned long port, const void *addr, unsigned long count
288 248
289 if (PXSEG(port)) 249 if (PXSEG(port))
290 p = (volatile u16 *)port; 250 p = (volatile u16 *)port;
291 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 251 else if (is_pci_ioaddr(port) || shifted_port(port))
292 p = (volatile u16 *)PCI_IOMAP(port); 252 p = (volatile u16 *)pci_ioaddr(port);
293 else 253 else
294 p = (volatile u16 *)port2adr(port); 254 p = (volatile u16 *)port2adr(port);
295 255
@@ -301,8 +261,8 @@ void hs7751rvoip_outsl(unsigned long port, const void *addr, unsigned long count
301{ 261{
302 const u32 *buf = addr; 262 const u32 *buf = addr;
303 263
304 if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { 264 if (is_pci_ioaddr(port) || shifted_port(port)) {
305 volatile u32 *p = (volatile u32 *)PCI_IOMAP(port); 265 volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
306 266
307 while (count--) 267 while (count--)
308 *p = *buf++; 268 *p = *buf++;
@@ -316,8 +276,8 @@ void __iomem *hs7751rvoip_ioport_map(unsigned long port, unsigned int size)
316 return (void __iomem *)port; 276 return (void __iomem *)port;
317 else if (unlikely(codec_port(port) && (size == 1))) 277 else if (unlikely(codec_port(port) && (size == 1)))
318 return (void __iomem *)CODEC_IOMAP(port); 278 return (void __iomem *)CODEC_IOMAP(port);
319 else if (CHECK_SH7751_PCIIO(port)) 279 else if (is_pci_ioaddr(port))
320 return (void __iomem *)PCI_IOMAP(port); 280 return (void __iomem *)pci_ioaddr(port);
321 281
322 return (void __iomem *)port2adr(port); 282 return (void __iomem *)port2adr(port);
323} 283}
diff --git a/arch/sh/boards/renesas/r7780rp/io.c b/arch/sh/boards/renesas/r7780rp/io.c
index f73ca3f0f5a1..db92d6e6ae99 100644
--- a/arch/sh/boards/renesas/r7780rp/io.c
+++ b/arch/sh/boards/renesas/r7780rp/io.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/sh/kernel/io_r7780rp.c
3 *
4 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel 2 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
5 * Based largely on io_se.c. 3 * Based largely on io_se.c.
6 * 4 *
@@ -10,37 +8,13 @@
10 * placeholder code from io_r7780rp.c left in with the 8 * placeholder code from io_r7780rp.c left in with the
11 * expectation of later SuperIO and PCMCIA access. 9 * expectation of later SuperIO and PCMCIA access.
12 */ 10 */
13 11#include <linux/pci.h>
14#include <linux/kernel.h> 12#include <linux/kernel.h>
15#include <linux/types.h> 13#include <linux/types.h>
16#include <asm/r7780rp/r7780rp.h> 14#include <asm/r7780rp/r7780rp.h>
17#include <asm/addrspace.h> 15#include <asm/addrspace.h>
18#include <asm/io.h> 16#include <asm/io.h>
19 17
20#include <linux/module.h>
21#include <linux/pci.h>
22#include "../../../drivers/pci/pci-sh7780.h"
23
24/*
25 * The 7780 R7780RP-1 uses the built-in PCI controller (PCIC)
26 * of the 7780 processor, and has a SuperIO accessible via the PCI.
27 * The board also includes a PCMCIA controller on its memory bus,
28 * like the other Solution Engine boards.
29 */
30
31#define SH7780_PCIIOBR_MASK 0xFFFC0000 /* IO Space Mask */
32#define PCIIOBR (volatile long *)PCI_REG(SH7780_PCIIOBR)
33#define PCIMBR (volatile long *)PCI_REG(SH7780_PCIMBR)
34#define PCI_IO_AREA SH7780_PCI_IO_BASE
35#define PCI_MEM_AREA SH7780_PCI_CONFIG_BASE
36
37#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7780_PCIIOBR_MASK))
38
39static inline void delay(void)
40{
41 ctrl_inw(0xa0000000);
42}
43
44static inline unsigned long port2adr(unsigned int port) 18static inline unsigned long port2adr(unsigned int port)
45{ 19{
46 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6) 20 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
@@ -78,17 +52,6 @@ static inline int shifted_port(unsigned long port)
78 return 1; 52 return 1;
79} 53}
80 54
81/* In case someone configures the kernel w/o PCI support: in that */
82/* scenario, don't ever bother to check for PCI-window addresses */
83
84/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */
85#if defined(CONFIG_PCI)
86#define CHECK_SH7780_PCIIO(port) \
87 ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7780_PCI_IO_SIZE)))
88#else
89#define CHECK_SH7780_PCIIO(port) (0)
90#endif
91
92#if defined(CONFIG_NE2000) || defined(CONFIG_NE2000_MODULE) 55#if defined(CONFIG_NE2000) || defined(CONFIG_NE2000_MODULE)
93#define CHECK_AX88796L_PORT(port) \ 56#define CHECK_AX88796L_PORT(port) \
94 ((port >= AX88796L_IO_BASE) && (port < (AX88796L_IO_BASE+0x20))) 57 ((port >= AX88796L_IO_BASE) && (port < (AX88796L_IO_BASE+0x20)))
@@ -109,8 +72,8 @@ u8 r7780rp_inb(unsigned long port)
109 return ctrl_inw(port88796l(port, 0)) & 0xff; 72 return ctrl_inw(port88796l(port, 0)) & 0xff;
110 else if (PXSEG(port)) 73 else if (PXSEG(port))
111 return ctrl_inb(port); 74 return ctrl_inb(port);
112 else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) 75 else if (is_pci_ioaddr(port) || shifted_port(port))
113 return ctrl_inb(PCI_IOMAP(port)); 76 return ctrl_inb(pci_ioaddr(port));
114 77
115 return ctrl_inw(port2adr(port)) & 0xff; 78 return ctrl_inw(port2adr(port)) & 0xff;
116} 79}
@@ -123,12 +86,12 @@ u8 r7780rp_inb_p(unsigned long port)
123 v = ctrl_inw(port88796l(port, 0)) & 0xff; 86 v = ctrl_inw(port88796l(port, 0)) & 0xff;
124 else if (PXSEG(port)) 87 else if (PXSEG(port))
125 v = ctrl_inb(port); 88 v = ctrl_inb(port);
126 else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) 89 else if (is_pci_ioaddr(port) || shifted_port(port))
127 v = ctrl_inb(PCI_IOMAP(port)); 90 v = ctrl_inb(pci_ioaddr(port));
128 else 91 else
129 v = ctrl_inw(port2adr(port)) & 0xff; 92 v = ctrl_inw(port2adr(port)) & 0xff;
130 93
131 delay(); 94 ctrl_delay();
132 95
133 return v; 96 return v;
134} 97}
@@ -139,8 +102,8 @@ u16 r7780rp_inw(unsigned long port)
139 maybebadio(port); 102 maybebadio(port);
140 else if (PXSEG(port)) 103 else if (PXSEG(port))
141 return ctrl_inw(port); 104 return ctrl_inw(port);
142 else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) 105 else if (is_pci_ioaddr(port) || shifted_port(port))
143 return ctrl_inw(PCI_IOMAP(port)); 106 return ctrl_inw(pci_ioaddr(port));
144 else 107 else
145 maybebadio(port); 108 maybebadio(port);
146 109
@@ -153,8 +116,8 @@ u32 r7780rp_inl(unsigned long port)
153 maybebadio(port); 116 maybebadio(port);
154 else if (PXSEG(port)) 117 else if (PXSEG(port))
155 return ctrl_inl(port); 118 return ctrl_inl(port);
156 else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) 119 else if (is_pci_ioaddr(port) || shifted_port(port))
157 return ctrl_inl(PCI_IOMAP(port)); 120 return ctrl_inl(pci_ioaddr(port));
158 else 121 else
159 maybebadio(port); 122 maybebadio(port);
160 123
@@ -167,8 +130,8 @@ void r7780rp_outb(u8 value, unsigned long port)
167 ctrl_outw(value, port88796l(port, 0)); 130 ctrl_outw(value, port88796l(port, 0));
168 else if (PXSEG(port)) 131 else if (PXSEG(port))
169 ctrl_outb(value, port); 132 ctrl_outb(value, port);
170 else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) 133 else if (is_pci_ioaddr(port) || shifted_port(port))
171 ctrl_outb(value, PCI_IOMAP(port)); 134 ctrl_outb(value, pci_ioaddr(port));
172 else 135 else
173 ctrl_outw(value, port2adr(port)); 136 ctrl_outw(value, port2adr(port));
174} 137}
@@ -179,12 +142,12 @@ void r7780rp_outb_p(u8 value, unsigned long port)
179 ctrl_outw(value, port88796l(port, 0)); 142 ctrl_outw(value, port88796l(port, 0));
180 else if (PXSEG(port)) 143 else if (PXSEG(port))
181 ctrl_outb(value, port); 144 ctrl_outb(value, port);
182 else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) 145 else if (is_pci_ioaddr(port) || shifted_port(port))
183 ctrl_outb(value, PCI_IOMAP(port)); 146 ctrl_outb(value, pci_ioaddr(port));
184 else 147 else
185 ctrl_outw(value, port2adr(port)); 148 ctrl_outw(value, port2adr(port));
186 149
187 delay(); 150 ctrl_delay();
188} 151}
189 152
190void r7780rp_outw(u16 value, unsigned long port) 153void r7780rp_outw(u16 value, unsigned long port)
@@ -193,8 +156,8 @@ void r7780rp_outw(u16 value, unsigned long port)
193 maybebadio(port); 156 maybebadio(port);
194 else if (PXSEG(port)) 157 else if (PXSEG(port))
195 ctrl_outw(value, port); 158 ctrl_outw(value, port);
196 else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) 159 else if (is_pci_ioaddr(port) || shifted_port(port))
197 ctrl_outw(value, PCI_IOMAP(port)); 160 ctrl_outw(value, pci_ioaddr(port));
198 else 161 else
199 maybebadio(port); 162 maybebadio(port);
200} 163}
@@ -205,8 +168,8 @@ void r7780rp_outl(u32 value, unsigned long port)
205 maybebadio(port); 168 maybebadio(port);
206 else if (PXSEG(port)) 169 else if (PXSEG(port))
207 ctrl_outl(value, port); 170 ctrl_outl(value, port);
208 else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) 171 else if (is_pci_ioaddr(port) || shifted_port(port))
209 ctrl_outl(value, PCI_IOMAP(port)); 172 ctrl_outl(value, pci_ioaddr(port));
210 else 173 else
211 maybebadio(port); 174 maybebadio(port);
212} 175}
@@ -223,8 +186,8 @@ void r7780rp_insb(unsigned long port, void *dst, unsigned long count)
223 } else if (PXSEG(port)) { 186 } else if (PXSEG(port)) {
224 while (count--) 187 while (count--)
225 *buf++ = *(volatile u8 *)port; 188 *buf++ = *(volatile u8 *)port;
226 } else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) { 189 } else if (is_pci_ioaddr(port) || shifted_port(port)) {
227 volatile u8 *bp = (volatile u8 *)PCI_IOMAP(port); 190 volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
228 191
229 while (count--) 192 while (count--)
230 *buf++ = *bp; 193 *buf++ = *bp;
@@ -244,8 +207,8 @@ void r7780rp_insw(unsigned long port, void *dst, unsigned long count)
244 p = (volatile u16 *)port88796l(port, 1); 207 p = (volatile u16 *)port88796l(port, 1);
245 else if (PXSEG(port)) 208 else if (PXSEG(port))
246 p = (volatile u16 *)port; 209 p = (volatile u16 *)port;
247 else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) 210 else if (is_pci_ioaddr(port) || shifted_port(port))
248 p = (volatile u16 *)PCI_IOMAP(port); 211 p = (volatile u16 *)pci_ioaddr(port);
249 else 212 else
250 p = (volatile u16 *)port2adr(port); 213 p = (volatile u16 *)port2adr(port);
251 214
@@ -259,8 +222,8 @@ void r7780rp_insl(unsigned long port, void *dst, unsigned long count)
259 222
260 if (CHECK_AX88796L_PORT(port)) 223 if (CHECK_AX88796L_PORT(port))
261 maybebadio(port); 224 maybebadio(port);
262 else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) { 225 else if (is_pci_ioaddr(port) || shifted_port(port)) {
263 volatile u32 *p = (volatile u32 *)PCI_IOMAP(port); 226 volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
264 227
265 while (count--) 228 while (count--)
266 *buf++ = *p; 229 *buf++ = *p;
@@ -280,8 +243,8 @@ void r7780rp_outsb(unsigned long port, const void *src, unsigned long count)
280 } else if (PXSEG(port)) 243 } else if (PXSEG(port))
281 while (count--) 244 while (count--)
282 ctrl_outb(*buf++, port); 245 ctrl_outb(*buf++, port);
283 else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) { 246 else if (is_pci_ioaddr(port) || shifted_port(port)) {
284 volatile u8 *bp = (volatile u8 *)PCI_IOMAP(port); 247 volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
285 248
286 while (count--) 249 while (count--)
287 *bp = *buf++; 250 *bp = *buf++;
@@ -301,8 +264,8 @@ void r7780rp_outsw(unsigned long port, const void *src, unsigned long count)
301 p = (volatile u16 *)port88796l(port, 1); 264 p = (volatile u16 *)port88796l(port, 1);
302 else if (PXSEG(port)) 265 else if (PXSEG(port))
303 p = (volatile u16 *)port; 266 p = (volatile u16 *)port;
304 else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) 267 else if (is_pci_ioaddr(port) || shifted_port(port))
305 p = (volatile u16 *)PCI_IOMAP(port); 268 p = (volatile u16 *)pci_ioaddr(port);
306 else 269 else
307 p = (volatile u16 *)port2adr(port); 270 p = (volatile u16 *)port2adr(port);
308 271
@@ -316,8 +279,8 @@ void r7780rp_outsl(unsigned long port, const void *src, unsigned long count)
316 279
317 if (CHECK_AX88796L_PORT(port)) 280 if (CHECK_AX88796L_PORT(port))
318 maybebadio(port); 281 maybebadio(port);
319 else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) { 282 else if (is_pci_ioaddr(port) || shifted_port(port)) {
320 volatile u32 *p = (volatile u32 *)PCI_IOMAP(port); 283 volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
321 284
322 while (count--) 285 while (count--)
323 *p = *buf++; 286 *p = *buf++;
@@ -331,8 +294,8 @@ void __iomem *r7780rp_ioport_map(unsigned long port, unsigned int size)
331 return (void __iomem *)port88796l(port, size > 1); 294 return (void __iomem *)port88796l(port, size > 1);
332 else if (PXSEG(port)) 295 else if (PXSEG(port))
333 return (void __iomem *)port; 296 return (void __iomem *)port;
334 else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) 297 else if (is_pci_ioaddr(port) || shifted_port(port))
335 return (void __iomem *)PCI_IOMAP(port); 298 return (void __iomem *)pci_ioaddr(port);
336 299
337 return (void __iomem *)port2adr(port); 300 return (void __iomem *)port2adr(port);
338} 301}
diff --git a/arch/sh/boards/renesas/rts7751r2d/io.c b/arch/sh/boards/renesas/rts7751r2d/io.c
index 8dc2a2e2e5df..135aa0b5e62d 100644
--- a/arch/sh/boards/renesas/rts7751r2d/io.c
+++ b/arch/sh/boards/renesas/rts7751r2d/io.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/sh/kernel/io_rts7751r2d.c
3 *
4 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel 2 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
5 * Based largely on io_se.c. 3 * Based largely on io_se.c.
6 * 4 *
@@ -10,11 +8,9 @@
10 * placeholder code from io_rts7751r2d.c left in with the 8 * placeholder code from io_rts7751r2d.c left in with the
11 * expectation of later SuperIO and PCMCIA access. 9 * expectation of later SuperIO and PCMCIA access.
12 */ 10 */
13
14#include <linux/kernel.h> 11#include <linux/kernel.h>
15#include <linux/types.h> 12#include <linux/types.h>
16#include <linux/pci.h> 13#include <linux/pci.h>
17#include "../../../drivers/pci/pci-sh7751.h"
18#include <asm/rts7751r2d/rts7751r2d.h> 14#include <asm/rts7751r2d/rts7751r2d.h>
19#include <asm/io.h> 15#include <asm/io.h>
20#include <asm/addrspace.h> 16#include <asm/addrspace.h>
@@ -26,18 +22,6 @@
26 * like the other Solution Engine boards. 22 * like the other Solution Engine boards.
27 */ 23 */
28 24
29#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR)
30#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR)
31#define PCI_IO_AREA SH7751_PCI_IO_BASE
32#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE
33
34#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
35
36static inline void delay(void)
37{
38 ctrl_inw(0xa0000000);
39}
40
41static inline unsigned long port2adr(unsigned int port) 25static inline unsigned long port2adr(unsigned int port)
42{ 26{
43 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6) 27 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
@@ -75,17 +59,6 @@ static inline int shifted_port(unsigned long port)
75 return 1; 59 return 1;
76} 60}
77 61
78/* In case someone configures the kernel w/o PCI support: in that */
79/* scenario, don't ever bother to check for PCI-window addresses */
80
81/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */
82#if defined(CONFIG_PCI)
83#define CHECK_SH7751_PCIIO(port) \
84 ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
85#else
86#define CHECK_SH7751_PCIIO(port) (0)
87#endif
88
89#if defined(CONFIG_NE2000) || defined(CONFIG_NE2000_MODULE) 62#if defined(CONFIG_NE2000) || defined(CONFIG_NE2000_MODULE)
90#define CHECK_AX88796L_PORT(port) \ 63#define CHECK_AX88796L_PORT(port) \
91 ((port >= AX88796L_IO_BASE) && (port < (AX88796L_IO_BASE+0x20))) 64 ((port >= AX88796L_IO_BASE) && (port < (AX88796L_IO_BASE+0x20)))
@@ -106,8 +79,8 @@ unsigned char rts7751r2d_inb(unsigned long port)
106 return (*(volatile unsigned short *)port88796l(port, 0)) & 0xff; 79 return (*(volatile unsigned short *)port88796l(port, 0)) & 0xff;
107 else if (PXSEG(port)) 80 else if (PXSEG(port))
108 return *(volatile unsigned char *)port; 81 return *(volatile unsigned char *)port;
109 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 82 else if (is_pci_ioaddr(port) || shifted_port(port))
110 return *(volatile unsigned char *)PCI_IOMAP(port); 83 return *(volatile unsigned char *)pci_ioaddr(port);
111 else 84 else
112 return (*(volatile unsigned short *)port2adr(port) & 0xff); 85 return (*(volatile unsigned short *)port2adr(port) & 0xff);
113} 86}
@@ -120,11 +93,12 @@ unsigned char rts7751r2d_inb_p(unsigned long port)
120 v = (*(volatile unsigned short *)port88796l(port, 0)) & 0xff; 93 v = (*(volatile unsigned short *)port88796l(port, 0)) & 0xff;
121 else if (PXSEG(port)) 94 else if (PXSEG(port))
122 v = *(volatile unsigned char *)port; 95 v = *(volatile unsigned char *)port;
123 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 96 else if (is_pci_ioaddr(port) || shifted_port(port))
124 v = *(volatile unsigned char *)PCI_IOMAP(port); 97 v = *(volatile unsigned char *)pci_ioaddr(port);
125 else 98 else
126 v = (*(volatile unsigned short *)port2adr(port) & 0xff); 99 v = (*(volatile unsigned short *)port2adr(port) & 0xff);
127 delay(); 100
101 ctrl_delay();
128 102
129 return v; 103 return v;
130} 104}
@@ -135,8 +109,8 @@ unsigned short rts7751r2d_inw(unsigned long port)
135 maybebadio(port); 109 maybebadio(port);
136 else if (PXSEG(port)) 110 else if (PXSEG(port))
137 return *(volatile unsigned short *)port; 111 return *(volatile unsigned short *)port;
138 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 112 else if (is_pci_ioaddr(port) || shifted_port(port))
139 return *(volatile unsigned short *)PCI_IOMAP(port); 113 return *(volatile unsigned short *)pci_ioaddr(port);
140 else 114 else
141 maybebadio(port); 115 maybebadio(port);
142 116
@@ -149,8 +123,8 @@ unsigned int rts7751r2d_inl(unsigned long port)
149 maybebadio(port); 123 maybebadio(port);
150 else if (PXSEG(port)) 124 else if (PXSEG(port))
151 return *(volatile unsigned long *)port; 125 return *(volatile unsigned long *)port;
152 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 126 else if (is_pci_ioaddr(port) || shifted_port(port))
153 return *(volatile unsigned long *)PCI_IOMAP(port); 127 return *(volatile unsigned long *)pci_ioaddr(port);
154 else 128 else
155 maybebadio(port); 129 maybebadio(port);
156 130
@@ -163,8 +137,8 @@ void rts7751r2d_outb(unsigned char value, unsigned long port)
163 *((volatile unsigned short *)port88796l(port, 0)) = value; 137 *((volatile unsigned short *)port88796l(port, 0)) = value;
164 else if (PXSEG(port)) 138 else if (PXSEG(port))
165 *(volatile unsigned char *)port = value; 139 *(volatile unsigned char *)port = value;
166 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 140 else if (is_pci_ioaddr(port) || shifted_port(port))
167 *(volatile unsigned char *)PCI_IOMAP(port) = value; 141 *(volatile unsigned char *)pci_ioaddr(port) = value;
168 else 142 else
169 *(volatile unsigned short *)port2adr(port) = value; 143 *(volatile unsigned short *)port2adr(port) = value;
170} 144}
@@ -175,11 +149,12 @@ void rts7751r2d_outb_p(unsigned char value, unsigned long port)
175 *((volatile unsigned short *)port88796l(port, 0)) = value; 149 *((volatile unsigned short *)port88796l(port, 0)) = value;
176 else if (PXSEG(port)) 150 else if (PXSEG(port))
177 *(volatile unsigned char *)port = value; 151 *(volatile unsigned char *)port = value;
178 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 152 else if (is_pci_ioaddr(port) || shifted_port(port))
179 *(volatile unsigned char *)PCI_IOMAP(port) = value; 153 *(volatile unsigned char *)pci_ioaddr(port) = value;
180 else 154 else
181 *(volatile unsigned short *)port2adr(port) = value; 155 *(volatile unsigned short *)port2adr(port) = value;
182 delay(); 156
157 ctrl_delay();
183} 158}
184 159
185void rts7751r2d_outw(unsigned short value, unsigned long port) 160void rts7751r2d_outw(unsigned short value, unsigned long port)
@@ -188,8 +163,8 @@ void rts7751r2d_outw(unsigned short value, unsigned long port)
188 maybebadio(port); 163 maybebadio(port);
189 else if (PXSEG(port)) 164 else if (PXSEG(port))
190 *(volatile unsigned short *)port = value; 165 *(volatile unsigned short *)port = value;
191 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 166 else if (is_pci_ioaddr(port) || shifted_port(port))
192 *(volatile unsigned short *)PCI_IOMAP(port) = value; 167 *(volatile unsigned short *)pci_ioaddr(port) = value;
193 else 168 else
194 maybebadio(port); 169 maybebadio(port);
195} 170}
@@ -200,8 +175,8 @@ void rts7751r2d_outl(unsigned int value, unsigned long port)
200 maybebadio(port); 175 maybebadio(port);
201 else if (PXSEG(port)) 176 else if (PXSEG(port))
202 *(volatile unsigned long *)port = value; 177 *(volatile unsigned long *)port = value;
203 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 178 else if (is_pci_ioaddr(port) || shifted_port(port))
204 *(volatile unsigned long *)PCI_IOMAP(port) = value; 179 *(volatile unsigned long *)pci_ioaddr(port) = value;
205 else 180 else
206 maybebadio(port); 181 maybebadio(port);
207} 182}
@@ -219,8 +194,8 @@ void rts7751r2d_insb(unsigned long port, void *addr, unsigned long count)
219 } else if (PXSEG(port)) 194 } else if (PXSEG(port))
220 while (count--) 195 while (count--)
221 ctrl_outb(ctrl_inb(port), a++); 196 ctrl_outb(ctrl_inb(port), a++);
222 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { 197 else if (is_pci_ioaddr(port) || shifted_port(port)) {
223 bp = (__u8 *)PCI_IOMAP(port); 198 bp = (__u8 *)pci_ioaddr(port);
224 while (count--) 199 while (count--)
225 ctrl_outb(*bp, a++); 200 ctrl_outb(*bp, a++);
226 } else { 201 } else {
@@ -239,8 +214,8 @@ void rts7751r2d_insw(unsigned long port, void *addr, unsigned long count)
239 p = (volatile unsigned short *)port88796l(port, 1); 214 p = (volatile unsigned short *)port88796l(port, 1);
240 else if (PXSEG(port)) 215 else if (PXSEG(port))
241 p = (volatile unsigned short *)port; 216 p = (volatile unsigned short *)port;
242 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 217 else if (is_pci_ioaddr(port) || shifted_port(port))
243 p = (volatile unsigned short *)PCI_IOMAP(port); 218 p = (volatile unsigned short *)pci_ioaddr(port);
244 else 219 else
245 p = (volatile unsigned short *)port2adr(port); 220 p = (volatile unsigned short *)port2adr(port);
246 while (count--) 221 while (count--)
@@ -251,11 +226,11 @@ void rts7751r2d_insl(unsigned long port, void *addr, unsigned long count)
251{ 226{
252 if (CHECK_AX88796L_PORT(port)) 227 if (CHECK_AX88796L_PORT(port))
253 maybebadio(port); 228 maybebadio(port);
254 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { 229 else if (is_pci_ioaddr(port) || shifted_port(port)) {
255 unsigned long a = (unsigned long)addr; 230 unsigned long a = (unsigned long)addr;
256 231
257 while (count--) { 232 while (count--) {
258 ctrl_outl(ctrl_inl(PCI_IOMAP(port)), a); 233 ctrl_outl(ctrl_inl(pci_ioaddr(port)), a);
259 a += 4; 234 a += 4;
260 } 235 }
261 } else 236 } else
@@ -275,8 +250,8 @@ void rts7751r2d_outsb(unsigned long port, const void *addr, unsigned long count)
275 } else if (PXSEG(port)) 250 } else if (PXSEG(port))
276 while (count--) 251 while (count--)
277 ctrl_outb(a++, port); 252 ctrl_outb(a++, port);
278 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { 253 else if (is_pci_ioaddr(port) || shifted_port(port)) {
279 bp = (__u8 *)PCI_IOMAP(port); 254 bp = (__u8 *)pci_ioaddr(port);
280 while (count--) 255 while (count--)
281 *bp = ctrl_inb(a++); 256 *bp = ctrl_inb(a++);
282 } else { 257 } else {
@@ -295,8 +270,8 @@ void rts7751r2d_outsw(unsigned long port, const void *addr, unsigned long count)
295 p = (volatile unsigned short *)port88796l(port, 1); 270 p = (volatile unsigned short *)port88796l(port, 1);
296 else if (PXSEG(port)) 271 else if (PXSEG(port))
297 p = (volatile unsigned short *)port; 272 p = (volatile unsigned short *)port;
298 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 273 else if (is_pci_ioaddr(port) || shifted_port(port))
299 p = (volatile unsigned short *)PCI_IOMAP(port); 274 p = (volatile unsigned short *)pci_ioaddr(port);
300 else 275 else
301 p = (volatile unsigned short *)port2adr(port); 276 p = (volatile unsigned short *)port2adr(port);
302 277
@@ -310,11 +285,11 @@ void rts7751r2d_outsl(unsigned long port, const void *addr, unsigned long count)
310{ 285{
311 if (CHECK_AX88796L_PORT(port)) 286 if (CHECK_AX88796L_PORT(port))
312 maybebadio(port); 287 maybebadio(port);
313 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { 288 else if (is_pci_ioaddr(port) || shifted_port(port)) {
314 unsigned long a = (unsigned long)addr; 289 unsigned long a = (unsigned long)addr;
315 290
316 while (count--) { 291 while (count--) {
317 ctrl_outl(ctrl_inl(a), PCI_IOMAP(port)); 292 ctrl_outl(ctrl_inl(a), pci_ioaddr(port));
318 a += 4; 293 a += 4;
319 } 294 }
320 } else 295 } else
diff --git a/arch/sh/boards/renesas/systemh/io.c b/arch/sh/boards/renesas/systemh/io.c
index 0befd4f9894c..cde6e5d192c4 100644
--- a/arch/sh/boards/renesas/systemh/io.c
+++ b/arch/sh/boards/renesas/systemh/io.c
@@ -5,36 +5,16 @@
5 * Based largely on io_se.c. 5 * Based largely on io_se.c.
6 * 6 *
7 * I/O routine for Hitachi 7751 Systemh. 7 * I/O routine for Hitachi 7751 Systemh.
8 *
9 */ 8 */
10
11#include <linux/kernel.h> 9#include <linux/kernel.h>
12#include <linux/types.h> 10#include <linux/types.h>
13#include <linux/pci.h> 11#include <linux/pci.h>
14#include <asm/systemh7751.h> 12#include <asm/systemh7751.h>
15#include <asm/addrspace.h> 13#include <asm/addrspace.h>
16#include <asm/io.h> 14#include <asm/io.h>
17#include "../../../drivers/pci/pci-sh7751.h"
18
19/*
20 * The 7751 SystemH Engine uses the built-in PCI controller (PCIC)
21 * of the 7751 processor, and has a SuperIO accessible on its memory
22 * bus.
23 */
24
25#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR)
26#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR)
27#define PCI_IO_AREA SH7751_PCI_IO_BASE
28#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE
29 15
30#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
31#define ETHER_IOMAP(adr) (0xB3000000 + (adr)) /*map to 16bits access area 16#define ETHER_IOMAP(adr) (0xB3000000 + (adr)) /*map to 16bits access area
32 of smc lan chip*/ 17 of smc lan chip*/
33static inline void delay(void)
34{
35 ctrl_inw(0xa0000000);
36}
37
38static inline volatile __u16 * 18static inline volatile __u16 *
39port2adr(unsigned int port) 19port2adr(unsigned int port)
40{ 20{
@@ -44,17 +24,6 @@ port2adr(unsigned int port)
44 return (volatile __u16*)port; 24 return (volatile __u16*)port;
45} 25}
46 26
47/* In case someone configures the kernel w/o PCI support: in that */
48/* scenario, don't ever bother to check for PCI-window addresses */
49
50/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */
51#if defined(CONFIG_PCI)
52#define CHECK_SH7751_PCIIO(port) \
53 ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
54#else
55#define CHECK_SH7751_PCIIO(port) (0)
56#endif
57
58/* 27/*
59 * General outline: remap really low stuff [eventually] to SuperIO, 28 * General outline: remap really low stuff [eventually] to SuperIO,
60 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO) 29 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
@@ -66,8 +35,8 @@ unsigned char sh7751systemh_inb(unsigned long port)
66{ 35{
67 if (PXSEG(port)) 36 if (PXSEG(port))
68 return *(volatile unsigned char *)port; 37 return *(volatile unsigned char *)port;
69 else if (CHECK_SH7751_PCIIO(port)) 38 else if (is_pci_ioaddr(port))
70 return *(volatile unsigned char *)PCI_IOMAP(port); 39 return *(volatile unsigned char *)pci_ioaddr(port);
71 else if (port <= 0x3F1) 40 else if (port <= 0x3F1)
72 return *(volatile unsigned char *)ETHER_IOMAP(port); 41 return *(volatile unsigned char *)ETHER_IOMAP(port);
73 else 42 else
@@ -80,13 +49,13 @@ unsigned char sh7751systemh_inb_p(unsigned long port)
80 49
81 if (PXSEG(port)) 50 if (PXSEG(port))
82 v = *(volatile unsigned char *)port; 51 v = *(volatile unsigned char *)port;
83 else if (CHECK_SH7751_PCIIO(port)) 52 else if (is_pci_ioaddr(port))
84 v = *(volatile unsigned char *)PCI_IOMAP(port); 53 v = *(volatile unsigned char *)pci_ioaddr(port);
85 else if (port <= 0x3F1) 54 else if (port <= 0x3F1)
86 v = *(volatile unsigned char *)ETHER_IOMAP(port); 55 v = *(volatile unsigned char *)ETHER_IOMAP(port);
87 else 56 else
88 v = (*port2adr(port))&0xff; 57 v = (*port2adr(port))&0xff;
89 delay(); 58 ctrl_delay();
90 return v; 59 return v;
91} 60}
92 61
@@ -94,8 +63,8 @@ unsigned short sh7751systemh_inw(unsigned long port)
94{ 63{
95 if (PXSEG(port)) 64 if (PXSEG(port))
96 return *(volatile unsigned short *)port; 65 return *(volatile unsigned short *)port;
97 else if (CHECK_SH7751_PCIIO(port)) 66 else if (is_pci_ioaddr(port))
98 return *(volatile unsigned short *)PCI_IOMAP(port); 67 return *(volatile unsigned short *)pci_ioaddr(port);
99 else if (port >= 0x2000) 68 else if (port >= 0x2000)
100 return *port2adr(port); 69 return *port2adr(port);
101 else if (port <= 0x3F1) 70 else if (port <= 0x3F1)
@@ -109,8 +78,8 @@ unsigned int sh7751systemh_inl(unsigned long port)
109{ 78{
110 if (PXSEG(port)) 79 if (PXSEG(port))
111 return *(volatile unsigned long *)port; 80 return *(volatile unsigned long *)port;
112 else if (CHECK_SH7751_PCIIO(port)) 81 else if (is_pci_ioaddr(port))
113 return *(volatile unsigned int *)PCI_IOMAP(port); 82 return *(volatile unsigned int *)pci_ioaddr(port);
114 else if (port >= 0x2000) 83 else if (port >= 0x2000)
115 return *port2adr(port); 84 return *port2adr(port);
116 else if (port <= 0x3F1) 85 else if (port <= 0x3F1)
@@ -125,8 +94,8 @@ void sh7751systemh_outb(unsigned char value, unsigned long port)
125 94
126 if (PXSEG(port)) 95 if (PXSEG(port))
127 *(volatile unsigned char *)port = value; 96 *(volatile unsigned char *)port = value;
128 else if (CHECK_SH7751_PCIIO(port)) 97 else if (is_pci_ioaddr(port))
129 *((unsigned char*)PCI_IOMAP(port)) = value; 98 *((unsigned char*)pci_ioaddr(port)) = value;
130 else if (port <= 0x3F1) 99 else if (port <= 0x3F1)
131 *(volatile unsigned char *)ETHER_IOMAP(port) = value; 100 *(volatile unsigned char *)ETHER_IOMAP(port) = value;
132 else 101 else
@@ -137,21 +106,21 @@ void sh7751systemh_outb_p(unsigned char value, unsigned long port)
137{ 106{
138 if (PXSEG(port)) 107 if (PXSEG(port))
139 *(volatile unsigned char *)port = value; 108 *(volatile unsigned char *)port = value;
140 else if (CHECK_SH7751_PCIIO(port)) 109 else if (is_pci_ioaddr(port))
141 *((unsigned char*)PCI_IOMAP(port)) = value; 110 *((unsigned char*)pci_ioaddr(port)) = value;
142 else if (port <= 0x3F1) 111 else if (port <= 0x3F1)
143 *(volatile unsigned char *)ETHER_IOMAP(port) = value; 112 *(volatile unsigned char *)ETHER_IOMAP(port) = value;
144 else 113 else
145 *(port2adr(port)) = value; 114 *(port2adr(port)) = value;
146 delay(); 115 ctrl_delay();
147} 116}
148 117
149void sh7751systemh_outw(unsigned short value, unsigned long port) 118void sh7751systemh_outw(unsigned short value, unsigned long port)
150{ 119{
151 if (PXSEG(port)) 120 if (PXSEG(port))
152 *(volatile unsigned short *)port = value; 121 *(volatile unsigned short *)port = value;
153 else if (CHECK_SH7751_PCIIO(port)) 122 else if (is_pci_ioaddr(port))
154 *((unsigned short *)PCI_IOMAP(port)) = value; 123 *((unsigned short *)pci_ioaddr(port)) = value;
155 else if (port >= 0x2000) 124 else if (port >= 0x2000)
156 *port2adr(port) = value; 125 *port2adr(port) = value;
157 else if (port <= 0x3F1) 126 else if (port <= 0x3F1)
@@ -164,8 +133,8 @@ void sh7751systemh_outl(unsigned int value, unsigned long port)
164{ 133{
165 if (PXSEG(port)) 134 if (PXSEG(port))
166 *(volatile unsigned long *)port = value; 135 *(volatile unsigned long *)port = value;
167 else if (CHECK_SH7751_PCIIO(port)) 136 else if (is_pci_ioaddr(port))
168 *((unsigned long*)PCI_IOMAP(port)) = value; 137 *((unsigned long*)pci_ioaddr(port)) = value;
169 else 138 else
170 maybebadio(port); 139 maybebadio(port);
171} 140}
diff --git a/arch/sh/boards/se/770x/io.c b/arch/sh/boards/se/770x/io.c
index 5102201c97ab..9941949331ab 100644
--- a/arch/sh/boards/se/770x/io.c
+++ b/arch/sh/boards/se/770x/io.c
@@ -1,4 +1,4 @@
1/* $Id: io.c,v 1.6 2006/01/04 17:53:54 lethal Exp $ 1/* $Id: io.c,v 1.7 2006/02/05 21:55:29 lethal Exp $
2 * 2 *
3 * linux/arch/sh/kernel/io_se.c 3 * linux/arch/sh/kernel/io_se.c
4 * 4 *
@@ -20,11 +20,6 @@ int sh_pcic_io_stop;
20int sh_pcic_io_type; 20int sh_pcic_io_type;
21int sh_pcic_io_dummy; 21int sh_pcic_io_dummy;
22 22
23static inline void delay(void)
24{
25 ctrl_inw(0xa0000000);
26}
27
28/* MS7750 requires special versions of in*, out* routines, since 23/* MS7750 requires special versions of in*, out* routines, since
29 PC-like io ports are located at upper half byte of 16-bit word which 24 PC-like io ports are located at upper half byte of 16-bit word which
30 can be accessed only with 16-bit wide. */ 25 can be accessed only with 16-bit wide. */
@@ -72,7 +67,7 @@ unsigned char se_inb_p(unsigned long port)
72 v = (*port2adr(port) >> 8); 67 v = (*port2adr(port) >> 8);
73 else 68 else
74 v = (*port2adr(port))&0xff; 69 v = (*port2adr(port))&0xff;
75 delay(); 70 ctrl_delay();
76 return v; 71 return v;
77} 72}
78 73
@@ -110,7 +105,7 @@ void se_outb_p(unsigned char value, unsigned long port)
110 *(port2adr(port)) = value << 8; 105 *(port2adr(port)) = value << 8;
111 else 106 else
112 *(port2adr(port)) = value; 107 *(port2adr(port)) = value;
113 delay(); 108 ctrl_delay();
114} 109}
115 110
116void se_outw(unsigned short value, unsigned long port) 111void se_outw(unsigned short value, unsigned long port)
diff --git a/arch/sh/boards/se/7751/io.c b/arch/sh/boards/se/7751/io.c
index 0e8a3ba48316..e8d846cec89d 100644
--- a/arch/sh/boards/se/7751/io.c
+++ b/arch/sh/boards/se/7751/io.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/sh/kernel/io_7751se.c
3 *
4 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel 2 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
5 * Based largely on io_se.c. 3 * Based largely on io_se.c.
6 * 4 *
@@ -10,55 +8,14 @@
10 * placeholder code from io_se.c left in with the 8 * placeholder code from io_se.c left in with the
11 * expectation of later SuperIO and PCMCIA access. 9 * expectation of later SuperIO and PCMCIA access.
12 */ 10 */
13
14#include <linux/kernel.h> 11#include <linux/kernel.h>
15#include <linux/types.h> 12#include <linux/types.h>
13#include <linux/pci.h>
16#include <asm/io.h> 14#include <asm/io.h>
17#include <asm/se7751.h> 15#include <asm/se7751.h>
18#include <asm/addrspace.h> 16#include <asm/addrspace.h>
19 17
20#include <linux/pci.h> 18static inline volatile u16 *port2adr(unsigned int port)
21#include "../../../drivers/pci/pci-sh7751.h"
22
23#if 0
24/******************************************************************
25 * Variables from io_se.c, related to PCMCIA (not PCI); we're not
26 * compiling them in, and have removed references from functions
27 * which follow. [Many checked for IO ports in the range bounded
28 * by sh_pcic_io_start/stop, and used sh_pcic_io_wbase as offset.
29 * As start/stop are uninitialized, only port 0x0 would match?]
30 * When used, remember to adjust names to avoid clash with io_se?
31 *****************************************************************/
32/* SH pcmcia io window base, start and end. */
33int sh_pcic_io_wbase = 0xb8400000;
34int sh_pcic_io_start;
35int sh_pcic_io_stop;
36int sh_pcic_io_type;
37int sh_pcic_io_dummy;
38/*************************************************************/
39#endif
40
41/*
42 * The 7751 Solution Engine uses the built-in PCI controller (PCIC)
43 * of the 7751 processor, and has a SuperIO accessible via the PCI.
44 * The board also includes a PCMCIA controller on its memory bus,
45 * like the other Solution Engine boards.
46 */
47
48#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR)
49#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR)
50#define PCI_IO_AREA SH7751_PCI_IO_BASE
51#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE
52
53#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
54
55static inline void delay(void)
56{
57 ctrl_inw(0xa0000000);
58}
59
60static inline volatile __u16 *
61port2adr(unsigned int port)
62{ 19{
63 if (port >= 0x2000) 20 if (port >= 0x2000)
64 return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000)); 21 return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
@@ -66,32 +23,6 @@ port2adr(unsigned int port)
66 return (volatile __u16*)port; 23 return (volatile __u16*)port;
67} 24}
68 25
69#if 0
70/* The 7751 Solution Engine seems to have everything hooked */
71/* up pretty normally (nothing on high-bytes only...) so this */
72/* shouldn't be needed */
73static inline int
74shifted_port(unsigned long port)
75{
76 /* For IDE registers, value is not shifted */
77 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
78 return 0;
79 else
80 return 1;
81}
82#endif
83
84/* In case someone configures the kernel w/o PCI support: in that */
85/* scenario, don't ever bother to check for PCI-window addresses */
86
87/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */
88#if defined(CONFIG_PCI)
89#define CHECK_SH7751_PCIIO(port) \
90 ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
91#else
92#define CHECK_SH7751_PCIIO(port) (0)
93#endif
94
95/* 26/*
96 * General outline: remap really low stuff [eventually] to SuperIO, 27 * General outline: remap really low stuff [eventually] to SuperIO,
97 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO) 28 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
@@ -103,10 +34,10 @@ unsigned char sh7751se_inb(unsigned long port)
103{ 34{
104 if (PXSEG(port)) 35 if (PXSEG(port))
105 return *(volatile unsigned char *)port; 36 return *(volatile unsigned char *)port;
106 else if (CHECK_SH7751_PCIIO(port)) 37 else if (is_pci_ioaddr(port))
107 return *(volatile unsigned char *)PCI_IOMAP(port); 38 return *(volatile unsigned char *)pci_ioaddr(port);
108 else 39 else
109 return (*port2adr(port))&0xff; 40 return (*port2adr(port)) & 0xff;
110} 41}
111 42
112unsigned char sh7751se_inb_p(unsigned long port) 43unsigned char sh7751se_inb_p(unsigned long port)
@@ -115,11 +46,11 @@ unsigned char sh7751se_inb_p(unsigned long port)
115 46
116 if (PXSEG(port)) 47 if (PXSEG(port))
117 v = *(volatile unsigned char *)port; 48 v = *(volatile unsigned char *)port;
118 else if (CHECK_SH7751_PCIIO(port)) 49 else if (is_pci_ioaddr(port))
119 v = *(volatile unsigned char *)PCI_IOMAP(port); 50 v = *(volatile unsigned char *)pci_ioaddr(port);
120 else 51 else
121 v = (*port2adr(port))&0xff; 52 v = (*port2adr(port)) & 0xff;
122 delay(); 53 ctrl_delay();
123 return v; 54 return v;
124} 55}
125 56
@@ -127,8 +58,8 @@ unsigned short sh7751se_inw(unsigned long port)
127{ 58{
128 if (PXSEG(port)) 59 if (PXSEG(port))
129 return *(volatile unsigned short *)port; 60 return *(volatile unsigned short *)port;
130 else if (CHECK_SH7751_PCIIO(port)) 61 else if (is_pci_ioaddr(port))
131 return *(volatile unsigned short *)PCI_IOMAP(port); 62 return *(volatile unsigned short *)pci_ioaddr(port);
132 else if (port >= 0x2000) 63 else if (port >= 0x2000)
133 return *port2adr(port); 64 return *port2adr(port);
134 else 65 else
@@ -140,8 +71,8 @@ unsigned int sh7751se_inl(unsigned long port)
140{ 71{
141 if (PXSEG(port)) 72 if (PXSEG(port))
142 return *(volatile unsigned long *)port; 73 return *(volatile unsigned long *)port;
143 else if (CHECK_SH7751_PCIIO(port)) 74 else if (is_pci_ioaddr(port))
144 return *(volatile unsigned int *)PCI_IOMAP(port); 75 return *(volatile unsigned int *)pci_ioaddr(port);
145 else if (port >= 0x2000) 76 else if (port >= 0x2000)
146 return *port2adr(port); 77 return *port2adr(port);
147 else 78 else
@@ -154,8 +85,8 @@ void sh7751se_outb(unsigned char value, unsigned long port)
154 85
155 if (PXSEG(port)) 86 if (PXSEG(port))
156 *(volatile unsigned char *)port = value; 87 *(volatile unsigned char *)port = value;
157 else if (CHECK_SH7751_PCIIO(port)) 88 else if (is_pci_ioaddr(port))
158 *((unsigned char*)PCI_IOMAP(port)) = value; 89 *((unsigned char*)pci_ioaddr(port)) = value;
159 else 90 else
160 *(port2adr(port)) = value; 91 *(port2adr(port)) = value;
161} 92}
@@ -164,19 +95,19 @@ void sh7751se_outb_p(unsigned char value, unsigned long port)
164{ 95{
165 if (PXSEG(port)) 96 if (PXSEG(port))
166 *(volatile unsigned char *)port = value; 97 *(volatile unsigned char *)port = value;
167 else if (CHECK_SH7751_PCIIO(port)) 98 else if (is_pci_ioaddr(port))
168 *((unsigned char*)PCI_IOMAP(port)) = value; 99 *((unsigned char*)pci_ioaddr(port)) = value;
169 else 100 else
170 *(port2adr(port)) = value; 101 *(port2adr(port)) = value;
171 delay(); 102 ctrl_delay();
172} 103}
173 104
174void sh7751se_outw(unsigned short value, unsigned long port) 105void sh7751se_outw(unsigned short value, unsigned long port)
175{ 106{
176 if (PXSEG(port)) 107 if (PXSEG(port))
177 *(volatile unsigned short *)port = value; 108 *(volatile unsigned short *)port = value;
178 else if (CHECK_SH7751_PCIIO(port)) 109 else if (is_pci_ioaddr(port))
179 *((unsigned short *)PCI_IOMAP(port)) = value; 110 *((unsigned short *)pci_ioaddr(port)) = value;
180 else if (port >= 0x2000) 111 else if (port >= 0x2000)
181 *port2adr(port) = value; 112 *port2adr(port) = value;
182 else 113 else
@@ -187,8 +118,8 @@ void sh7751se_outl(unsigned int value, unsigned long port)
187{ 118{
188 if (PXSEG(port)) 119 if (PXSEG(port))
189 *(volatile unsigned long *)port = value; 120 *(volatile unsigned long *)port = value;
190 else if (CHECK_SH7751_PCIIO(port)) 121 else if (is_pci_ioaddr(port))
191 *((unsigned long*)PCI_IOMAP(port)) = value; 122 *((unsigned long*)pci_ioaddr(port)) = value;
192 else 123 else
193 maybebadio(port); 124 maybebadio(port);
194} 125}
@@ -202,35 +133,3 @@ void sh7751se_outsl(unsigned long port, const void *addr, unsigned long count)
202{ 133{
203 maybebadio(port); 134 maybebadio(port);
204} 135}
205
206/* Map ISA bus address to the real address. Only for PCMCIA. */
207
208/* ISA page descriptor. */
209static __u32 sh_isa_memmap[256];
210
211#if 0
212static int
213sh_isa_mmap(__u32 start, __u32 length, __u32 offset)
214{
215 int idx;
216
217 if (start >= 0x100000 || (start & 0xfff) || (length != 0x1000))
218 return -1;
219
220 idx = start >> 12;
221 sh_isa_memmap[idx] = 0xb8000000 + (offset &~ 0xfff);
222 printk("sh_isa_mmap: start %x len %x offset %x (idx %x paddr %x)\n",
223 start, length, offset, idx, sh_isa_memmap[idx]);
224 return 0;
225}
226#endif
227
228unsigned long
229sh7751se_isa_port2addr(unsigned long offset)
230{
231 int idx;
232
233 idx = (offset >> 12) & 0xff;
234 offset &= 0xfff;
235 return sh_isa_memmap[idx] + offset;
236}
diff --git a/arch/sh/boards/sh03/setup.c b/arch/sh/boards/sh03/setup.c
index dab742a00c6f..7d31d6aed8a5 100644
--- a/arch/sh/boards/sh03/setup.c
+++ b/arch/sh/boards/sh03/setup.c
@@ -12,11 +12,10 @@
12#include <asm/sh03/io.h> 12#include <asm/sh03/io.h>
13#include <asm/sh03/sh03.h> 13#include <asm/sh03/sh03.h>
14#include <asm/addrspace.h> 14#include <asm/addrspace.h>
15#include "../../drivers/pci/pci-sh7751.h"
16 15
17const char *get_system_type(void) 16const char *get_system_type(void)
18{ 17{
19 return "Interface CTP/PCI-SH03)"; 18 return "Interface (CTP/PCI-SH03)";
20} 19}
21 20
22static void init_sh03_IRQ(void) 21static void init_sh03_IRQ(void)
@@ -39,7 +38,7 @@ static void __iomem *sh03_ioport_map(unsigned long port, unsigned int size)
39 if (((port >= 0x1f0) && (port <= 0x1f7)) || (port == 0x3f6)) 38 if (((port >= 0x1f0) && (port <= 0x1f7)) || (port == 0x3f6))
40 return (void __iomem *)((unsigned long)cf_io_base + port); 39 return (void __iomem *)((unsigned long)cf_io_base + port);
41 40
42 return (void __iomem *)(port + SH7751_PCI_IO_BASE); 41 return (void __iomem *)(port + PCI_IO_BASE);
43} 42}
44 43
45struct sh_machine_vector mv_sh03 __initmv = { 44struct sh_machine_vector mv_sh03 __initmv = {
@@ -51,7 +50,6 @@ struct sh_machine_vector mv_sh03 __initmv = {
51 .mv_heartbeat = heartbeat_sh03, 50 .mv_heartbeat = heartbeat_sh03,
52#endif 51#endif
53}; 52};
54
55ALIAS_MV(sh03) 53ALIAS_MV(sh03)
56 54
57/* arch/sh/boards/sh03/rtc.c */ 55/* arch/sh/boards/sh03/rtc.c */
diff --git a/arch/sh/boards/snapgear/io.c b/arch/sh/boards/snapgear/io.c
index 9f700b8392bb..0f4824264557 100644
--- a/arch/sh/boards/snapgear/io.c
+++ b/arch/sh/boards/snapgear/io.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/sh/kernel/io_7751se.c
3 *
4 * Copyright (C) 2002 David McCullough <davidm@snapgear.com> 2 * Copyright (C) 2002 David McCullough <davidm@snapgear.com>
5 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel 3 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
6 * Based largely on io_se.c. 4 * Based largely on io_se.c.
@@ -11,54 +9,22 @@
11 * placeholder code from io_se.c left in with the 9 * placeholder code from io_se.c left in with the
12 * expectation of later SuperIO and PCMCIA access. 10 * expectation of later SuperIO and PCMCIA access.
13 */ 11 */
14
15#include <linux/kernel.h> 12#include <linux/kernel.h>
16#include <linux/types.h> 13#include <linux/types.h>
17#include <linux/pci.h> 14#include <linux/pci.h>
18#include <asm/io.h> 15#include <asm/io.h>
19#include <asm/addrspace.h> 16#include <asm/addrspace.h>
20 17
21#include <asm/pci.h>
22#include "../../drivers/pci/pci-sh7751.h"
23
24#ifdef CONFIG_SH_SECUREEDGE5410 18#ifdef CONFIG_SH_SECUREEDGE5410
25unsigned short secureedge5410_ioport; 19unsigned short secureedge5410_ioport;
26#endif 20#endif
27 21
28/*
29 * The SnapGear uses the built-in PCI controller (PCIC)
30 * of the 7751 processor
31 */
32
33#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR)
34#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR)
35#define PCI_IO_AREA SH7751_PCI_IO_BASE
36#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE
37
38#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
39
40static inline void delay(void)
41{
42 ctrl_inw(0xa0000000);
43}
44
45static inline volatile __u16 *port2adr(unsigned int port) 22static inline volatile __u16 *port2adr(unsigned int port)
46{ 23{
47 maybebadio((unsigned long)port); 24 maybebadio((unsigned long)port);
48 return (volatile __u16*)port; 25 return (volatile __u16*)port;
49} 26}
50 27
51/* In case someone configures the kernel w/o PCI support: in that */
52/* scenario, don't ever bother to check for PCI-window addresses */
53
54/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */
55#if defined(CONFIG_PCI)
56#define CHECK_SH7751_PCIIO(port) \
57 ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
58#else
59#define CHECK_SH7751_PCIIO(port) (0)
60#endif
61
62/* 28/*
63 * General outline: remap really low stuff [eventually] to SuperIO, 29 * General outline: remap really low stuff [eventually] to SuperIO,
64 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO) 30 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
@@ -66,39 +32,36 @@ static inline volatile __u16 *port2adr(unsigned int port)
66 * should be way beyond the window, and is used w/o translation for 32 * should be way beyond the window, and is used w/o translation for
67 * compatibility. 33 * compatibility.
68 */ 34 */
69
70unsigned char snapgear_inb(unsigned long port) 35unsigned char snapgear_inb(unsigned long port)
71{ 36{
72 if (PXSEG(port)) 37 if (PXSEG(port))
73 return *(volatile unsigned char *)port; 38 return *(volatile unsigned char *)port;
74 else if (CHECK_SH7751_PCIIO(port)) 39 else if (is_pci_ioaddr(port))
75 return *(volatile unsigned char *)PCI_IOMAP(port); 40 return *(volatile unsigned char *)pci_ioaddr(port);
76 else 41 else
77 return (*port2adr(port))&0xff; 42 return (*port2adr(port)) & 0xff;
78} 43}
79 44
80
81unsigned char snapgear_inb_p(unsigned long port) 45unsigned char snapgear_inb_p(unsigned long port)
82{ 46{
83 unsigned char v; 47 unsigned char v;
84 48
85 if (PXSEG(port)) 49 if (PXSEG(port))
86 v = *(volatile unsigned char *)port; 50 v = *(volatile unsigned char *)port;
87 else if (CHECK_SH7751_PCIIO(port)) 51 else if (is_pci_ioaddr(port))
88 v = *(volatile unsigned char *)PCI_IOMAP(port); 52 v = *(volatile unsigned char *)pci_ioaddr(port);
89 else 53 else
90 v = (*port2adr(port))&0xff; 54 v = (*port2adr(port))&0xff;
91 delay(); 55 ctrl_delay();
92 return v; 56 return v;
93} 57}
94 58
95
96unsigned short snapgear_inw(unsigned long port) 59unsigned short snapgear_inw(unsigned long port)
97{ 60{
98 if (PXSEG(port)) 61 if (PXSEG(port))
99 return *(volatile unsigned short *)port; 62 return *(volatile unsigned short *)port;
100 else if (CHECK_SH7751_PCIIO(port)) 63 else if (is_pci_ioaddr(port))
101 return *(volatile unsigned short *)PCI_IOMAP(port); 64 return *(volatile unsigned short *)pci_ioaddr(port);
102 else if (port >= 0x2000) 65 else if (port >= 0x2000)
103 return *port2adr(port); 66 return *port2adr(port);
104 else 67 else
@@ -106,13 +69,12 @@ unsigned short snapgear_inw(unsigned long port)
106 return 0; 69 return 0;
107} 70}
108 71
109
110unsigned int snapgear_inl(unsigned long port) 72unsigned int snapgear_inl(unsigned long port)
111{ 73{
112 if (PXSEG(port)) 74 if (PXSEG(port))
113 return *(volatile unsigned long *)port; 75 return *(volatile unsigned long *)port;
114 else if (CHECK_SH7751_PCIIO(port)) 76 else if (is_pci_ioaddr(port))
115 return *(volatile unsigned int *)PCI_IOMAP(port); 77 return *(volatile unsigned int *)pci_ioaddr(port);
116 else if (port >= 0x2000) 78 else if (port >= 0x2000)
117 return *port2adr(port); 79 return *port2adr(port);
118 else 80 else
@@ -120,50 +82,46 @@ unsigned int snapgear_inl(unsigned long port)
120 return 0; 82 return 0;
121} 83}
122 84
123
124void snapgear_outb(unsigned char value, unsigned long port) 85void snapgear_outb(unsigned char value, unsigned long port)
125{ 86{
126 87
127 if (PXSEG(port)) 88 if (PXSEG(port))
128 *(volatile unsigned char *)port = value; 89 *(volatile unsigned char *)port = value;
129 else if (CHECK_SH7751_PCIIO(port)) 90 else if (is_pci_ioaddr(port))
130 *((unsigned char*)PCI_IOMAP(port)) = value; 91 *((unsigned char*)pci_ioaddr(port)) = value;
131 else 92 else
132 *(port2adr(port)) = value; 93 *(port2adr(port)) = value;
133} 94}
134 95
135
136void snapgear_outb_p(unsigned char value, unsigned long port) 96void snapgear_outb_p(unsigned char value, unsigned long port)
137{ 97{
138 if (PXSEG(port)) 98 if (PXSEG(port))
139 *(volatile unsigned char *)port = value; 99 *(volatile unsigned char *)port = value;
140 else if (CHECK_SH7751_PCIIO(port)) 100 else if (is_pci_ioaddr(port))
141 *((unsigned char*)PCI_IOMAP(port)) = value; 101 *((unsigned char*)pci_ioaddr(port)) = value;
142 else 102 else
143 *(port2adr(port)) = value; 103 *(port2adr(port)) = value;
144 delay(); 104 ctrl_delay();
145} 105}
146 106
147
148void snapgear_outw(unsigned short value, unsigned long port) 107void snapgear_outw(unsigned short value, unsigned long port)
149{ 108{
150 if (PXSEG(port)) 109 if (PXSEG(port))
151 *(volatile unsigned short *)port = value; 110 *(volatile unsigned short *)port = value;
152 else if (CHECK_SH7751_PCIIO(port)) 111 else if (is_pci_ioaddr(port))
153 *((unsigned short *)PCI_IOMAP(port)) = value; 112 *((unsigned short *)pci_ioaddr(port)) = value;
154 else if (port >= 0x2000) 113 else if (port >= 0x2000)
155 *port2adr(port) = value; 114 *port2adr(port) = value;
156 else 115 else
157 maybebadio(port); 116 maybebadio(port);
158} 117}
159 118
160
161void snapgear_outl(unsigned int value, unsigned long port) 119void snapgear_outl(unsigned int value, unsigned long port)
162{ 120{
163 if (PXSEG(port)) 121 if (PXSEG(port))
164 *(volatile unsigned long *)port = value; 122 *(volatile unsigned long *)port = value;
165 else if (CHECK_SH7751_PCIIO(port)) 123 else if (is_pci_ioaddr(port))
166 *((unsigned long*)PCI_IOMAP(port)) = value; 124 *((unsigned long*)pci_ioaddr(port)) = value;
167 else 125 else
168 maybebadio(port); 126 maybebadio(port);
169} 127}
diff --git a/arch/sh/boards/titan/io.c b/arch/sh/boards/titan/io.c
index 48f3494f55b1..4730c1dd697d 100644
--- a/arch/sh/boards/titan/io.c
+++ b/arch/sh/boards/titan/io.c
@@ -1,34 +1,11 @@
1/* 1/*
2 * I/O routines for Titan 2 * I/O routines for Titan
3 */ 3 */
4
5#include <linux/pci.h> 4#include <linux/pci.h>
6#include <asm/machvec.h> 5#include <asm/machvec.h>
7#include <asm/addrspace.h> 6#include <asm/addrspace.h>
8#include <asm/titan.h> 7#include <asm/titan.h>
9#include <asm/io.h> 8#include <asm/io.h>
10#include "../../drivers/pci/pci-sh7751.h"
11
12#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR)
13#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR)
14#define PCI_IO_AREA SH7751_PCI_IO_BASE
15#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE
16
17#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
18
19#if defined(CONFIG_PCI)
20#define CHECK_SH7751_PCIIO(port) \
21 ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
22#define CHECK_SH7751_PCIMEMIO(port) \
23 ((port >= PCIBIOS_MIN_MEM) && (port < (PCIBIOS_MIN_MEM + SH7751_PCI_MEM_SIZE)))
24#else
25#define CHECK_SH7751_PCIIO(port) (0)
26#endif
27
28static inline void delay(void)
29{
30 ctrl_inw(0xa0000000);
31}
32 9
33static inline unsigned int port2adr(unsigned int port) 10static inline unsigned int port2adr(unsigned int port)
34{ 11{
@@ -40,8 +17,8 @@ u8 titan_inb(unsigned long port)
40{ 17{
41 if (PXSEG(port)) 18 if (PXSEG(port))
42 return ctrl_inb(port); 19 return ctrl_inb(port);
43 else if (CHECK_SH7751_PCIIO(port)) 20 else if (is_pci_ioaddr(port))
44 return ctrl_inb(PCI_IOMAP(port)); 21 return ctrl_inb(pci_ioaddr(port));
45 return ctrl_inw(port2adr(port)) & 0xff; 22 return ctrl_inw(port2adr(port)) & 0xff;
46} 23}
47 24
@@ -51,11 +28,11 @@ u8 titan_inb_p(unsigned long port)
51 28
52 if (PXSEG(port)) 29 if (PXSEG(port))
53 v = ctrl_inb(port); 30 v = ctrl_inb(port);
54 else if (CHECK_SH7751_PCIIO(port)) 31 else if (is_pci_ioaddr(port))
55 v = ctrl_inb(PCI_IOMAP(port)); 32 v = ctrl_inb(pci_ioaddr(port));
56 else 33 else
57 v = ctrl_inw(port2adr(port)) & 0xff; 34 v = ctrl_inw(port2adr(port)) & 0xff;
58 delay(); 35 ctrl_delay();
59 return v; 36 return v;
60} 37}
61 38
@@ -63,8 +40,8 @@ u16 titan_inw(unsigned long port)
63{ 40{
64 if (PXSEG(port)) 41 if (PXSEG(port))
65 return ctrl_inw(port); 42 return ctrl_inw(port);
66 else if (CHECK_SH7751_PCIIO(port)) 43 else if (is_pci_ioaddr(port))
67 return ctrl_inw(PCI_IOMAP(port)); 44 return ctrl_inw(pci_ioaddr(port));
68 else if (port >= 0x2000) 45 else if (port >= 0x2000)
69 return ctrl_inw(port2adr(port)); 46 return ctrl_inw(port2adr(port));
70 else 47 else
@@ -76,8 +53,8 @@ u32 titan_inl(unsigned long port)
76{ 53{
77 if (PXSEG(port)) 54 if (PXSEG(port))
78 return ctrl_inl(port); 55 return ctrl_inl(port);
79 else if (CHECK_SH7751_PCIIO(port)) 56 else if (is_pci_ioaddr(port))
80 return ctrl_inl(PCI_IOMAP(port)); 57 return ctrl_inl(pci_ioaddr(port));
81 else if (port >= 0x2000) 58 else if (port >= 0x2000)
82 return ctrl_inw(port2adr(port)); 59 return ctrl_inw(port2adr(port));
83 else 60 else
@@ -89,8 +66,8 @@ void titan_outb(u8 value, unsigned long port)
89{ 66{
90 if (PXSEG(port)) 67 if (PXSEG(port))
91 ctrl_outb(value, port); 68 ctrl_outb(value, port);
92 else if (CHECK_SH7751_PCIIO(port)) 69 else if (is_pci_ioaddr(port))
93 ctrl_outb(value, PCI_IOMAP(port)); 70 ctrl_outb(value, pci_ioaddr(port));
94 else 71 else
95 ctrl_outw(value, port2adr(port)); 72 ctrl_outw(value, port2adr(port));
96} 73}
@@ -99,19 +76,19 @@ void titan_outb_p(u8 value, unsigned long port)
99{ 76{
100 if (PXSEG(port)) 77 if (PXSEG(port))
101 ctrl_outb(value, port); 78 ctrl_outb(value, port);
102 else if (CHECK_SH7751_PCIIO(port)) 79 else if (is_pci_ioaddr(port))
103 ctrl_outb(value, PCI_IOMAP(port)); 80 ctrl_outb(value, pci_ioaddr(port));
104 else 81 else
105 ctrl_outw(value, port2adr(port)); 82 ctrl_outw(value, port2adr(port));
106 delay(); 83 ctrl_delay();
107} 84}
108 85
109void titan_outw(u16 value, unsigned long port) 86void titan_outw(u16 value, unsigned long port)
110{ 87{
111 if (PXSEG(port)) 88 if (PXSEG(port))
112 ctrl_outw(value, port); 89 ctrl_outw(value, port);
113 else if (CHECK_SH7751_PCIIO(port)) 90 else if (is_pci_ioaddr(port))
114 ctrl_outw(value, PCI_IOMAP(port)); 91 ctrl_outw(value, pci_ioaddr(port));
115 else if (port >= 0x2000) 92 else if (port >= 0x2000)
116 ctrl_outw(value, port2adr(port)); 93 ctrl_outw(value, port2adr(port));
117 else 94 else
@@ -122,8 +99,8 @@ void titan_outl(u32 value, unsigned long port)
122{ 99{
123 if (PXSEG(port)) 100 if (PXSEG(port))
124 ctrl_outl(value, port); 101 ctrl_outl(value, port);
125 else if (CHECK_SH7751_PCIIO(port)) 102 else if (is_pci_ioaddr(port))
126 ctrl_outl(value, PCI_IOMAP(port)); 103 ctrl_outl(value, pci_ioaddr(port));
127 else 104 else
128 maybebadio(port); 105 maybebadio(port);
129} 106}
@@ -140,10 +117,10 @@ void titan_outsl(unsigned long port, const void *src, unsigned long count)
140 117
141void __iomem *titan_ioport_map(unsigned long port, unsigned int size) 118void __iomem *titan_ioport_map(unsigned long port, unsigned int size)
142{ 119{
143 if (PXSEG(port) || CHECK_SH7751_PCIMEMIO(port)) 120 if (PXSEG(port) || is_pci_memaddr(port))
144 return (void __iomem *)port; 121 return (void __iomem *)port;
145 else if (CHECK_SH7751_PCIIO(port)) 122 else if (is_pci_ioaddr(port))
146 return (void __iomem *)PCI_IOMAP(port); 123 return (void __iomem *)pci_ioaddr(port);
147 124
148 return (void __iomem *)port2adr(port); 125 return (void __iomem *)port2adr(port);
149} 126}