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authorLinus Torvalds <torvalds@linux-foundation.org>2010-10-25 10:51:49 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-10-25 10:51:49 -0400
commit1dfd166e93f98892aa4427069a23ed73259983c8 (patch)
treec70a347b963091b99bd16842537153fa36e5c0e9 /arch/sh/boards
parent8e775167d54e6521e7cdbc03ee7ec42a8c67b49a (diff)
parent8df399018df120d28f89fda6f2515cc6e096e43d (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (110 commits) sh: i2c-sh7760: Replase from ctrl_* to __raw_* sh: clkfwk: Shuffle around to match the intc split up. sh: clkfwk: modify for_each_frequency end condition sh: fix clk_get() error handling sh: clkfwk: Fix fault in frequency iterator. sh: clkfwk: Add a helper for rate rounding by divisor ranges. sh: clkfwk: Abstract rate rounding helper. sh: clkfwk: support clock remapping. sh: pci: Convert to upper/lower_32_bits() helpers. sh: mach-sdk7786: Add support for the FPGA SRAM. sh: Provide a generic SRAM pool for tiny memories. sh: pci: Support secondary FPGA-driven PCIe clocks on SDK7786. sh: pci: Support slot 4 routing on SDK7786. sh: Fix up PMB locking. sh: mach-sdk7786: Add support for fpga gpios. sh: use pr_fmt for clock framework, too. sh: remove name and id from struct clk sh: free-without-alloc fix for sh_mobile_lcdcfb sh: perf: Set up perf_max_events. sh: perf: Support SH-X3 hardware counters. ... Fix up trivial conflicts (perf_max_events got removed) in arch/sh/kernel/perf_event.c
Diffstat (limited to 'arch/sh/boards')
-rw-r--r--arch/sh/boards/Kconfig18
-rw-r--r--arch/sh/boards/Makefile2
-rw-r--r--arch/sh/boards/board-sh2007.c133
-rw-r--r--arch/sh/boards/board-sh7757lcr.c374
-rw-r--r--arch/sh/boards/mach-ecovec24/setup.c6
-rw-r--r--arch/sh/boards/mach-sdk7786/Makefile5
-rw-r--r--arch/sh/boards/mach-sdk7786/gpio.c49
-rw-r--r--arch/sh/boards/mach-sdk7786/setup.c54
-rw-r--r--arch/sh/boards/mach-sdk7786/sram.c72
-rw-r--r--arch/sh/boards/mach-x3proto/Makefile2
-rw-r--r--arch/sh/boards/mach-x3proto/gpio.c135
-rw-r--r--arch/sh/boards/mach-x3proto/ilsel.c18
-rw-r--r--arch/sh/boards/mach-x3proto/setup.c132
13 files changed, 978 insertions, 22 deletions
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index 07b35ca2f644..9c94711aa6ca 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -155,6 +155,8 @@ config SH_SDK7786
155 depends on CPU_SUBTYPE_SH7786 155 depends on CPU_SUBTYPE_SH7786
156 select SYS_SUPPORTS_PCI 156 select SYS_SUPPORTS_PCI
157 select NO_IOPORT if !PCI 157 select NO_IOPORT if !PCI
158 select ARCH_WANT_OPTIONAL_GPIOLIB
159 select HAVE_SRAM_POOL
158 help 160 help
159 Select SDK7786 if configuring for a Renesas Technology Europe 161 Select SDK7786 if configuring for a Renesas Technology Europe
160 SH7786-65nm board. 162 SH7786-65nm board.
@@ -165,6 +167,11 @@ config SH_HIGHLANDER
165 select SYS_SUPPORTS_PCI 167 select SYS_SUPPORTS_PCI
166 select IO_TRAPPED if MMU 168 select IO_TRAPPED if MMU
167 169
170config SH_SH7757LCR
171 bool "SH7757LCR"
172 depends on CPU_SUBTYPE_SH7757
173 select ARCH_REQUIRE_GPIOLIB
174
168config SH_SH7785LCR 175config SH_SH7785LCR
169 bool "SH7785LCR" 176 bool "SH7785LCR"
170 depends on CPU_SUBTYPE_SH7785 177 depends on CPU_SUBTYPE_SH7785
@@ -309,6 +316,17 @@ config SH_POLARIS
309 help 316 help
310 Select if configuring for an SMSC Polaris development board 317 Select if configuring for an SMSC Polaris development board
311 318
319config SH_SH2007
320 bool "SH-2007 board"
321 select NO_IOPORT
322 depends on CPU_SUBTYPE_SH7780
323 help
324 SH-2007 is a single-board computer based around SH7780 chip
325 intended for embedded applications.
326 It has an Ethernet interface (SMC9118), direct connected
327 Compact Flash socket, two serial ports and PC-104 bus.
328 More information at <http://sh2000.sh-linux.org>.
329
312endmenu 330endmenu
313 331
314source "arch/sh/boards/mach-r2d/Kconfig" 332source "arch/sh/boards/mach-r2d/Kconfig"
diff --git a/arch/sh/boards/Makefile b/arch/sh/boards/Makefile
index 4f90f9b7a922..38ef655cc0f0 100644
--- a/arch/sh/boards/Makefile
+++ b/arch/sh/boards/Makefile
@@ -2,6 +2,7 @@
2# Specific board support, not covered by a mach group. 2# Specific board support, not covered by a mach group.
3# 3#
4obj-$(CONFIG_SH_MAGIC_PANEL_R2) += board-magicpanelr2.o 4obj-$(CONFIG_SH_MAGIC_PANEL_R2) += board-magicpanelr2.o
5obj-$(CONFIG_SH_SH2007) += board-sh2007.o
5obj-$(CONFIG_SH_SH7785LCR) += board-sh7785lcr.o 6obj-$(CONFIG_SH_SH7785LCR) += board-sh7785lcr.o
6obj-$(CONFIG_SH_URQUELL) += board-urquell.o 7obj-$(CONFIG_SH_URQUELL) += board-urquell.o
7obj-$(CONFIG_SH_SHMIN) += board-shmin.o 8obj-$(CONFIG_SH_SHMIN) += board-shmin.o
@@ -9,3 +10,4 @@ obj-$(CONFIG_SH_EDOSK7760) += board-edosk7760.o
9obj-$(CONFIG_SH_ESPT) += board-espt.o 10obj-$(CONFIG_SH_ESPT) += board-espt.o
10obj-$(CONFIG_SH_POLARIS) += board-polaris.o 11obj-$(CONFIG_SH_POLARIS) += board-polaris.o
11obj-$(CONFIG_SH_TITAN) += board-titan.o 12obj-$(CONFIG_SH_TITAN) += board-titan.o
13obj-$(CONFIG_SH_SH7757LCR) += board-sh7757lcr.o
diff --git a/arch/sh/boards/board-sh2007.c b/arch/sh/boards/board-sh2007.c
new file mode 100644
index 000000000000..b90b78f6a829
--- /dev/null
+++ b/arch/sh/boards/board-sh2007.c
@@ -0,0 +1,133 @@
1/*
2 * SH-2007 board support.
3 *
4 * Copyright (C) 2003, 2004 SUGIOKA Toshinobu
5 * Copyright (C) 2010 Hitoshi Mitake <mitake@dcl.info.waseda.ac.jp>
6 */
7#include <linux/init.h>
8#include <linux/irq.h>
9#include <linux/smsc911x.h>
10#include <linux/platform_device.h>
11#include <linux/ata_platform.h>
12#include <linux/io.h>
13#include <asm/machvec.h>
14#include <mach/sh2007.h>
15
16struct smsc911x_platform_config smc911x_info = {
17 .flags = SMSC911X_USE_32BIT,
18 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
19 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
20};
21
22static struct resource smsc9118_0_resources[] = {
23 [0] = {
24 .start = SMC0_BASE,
25 .end = SMC0_BASE + 0xff,
26 .flags = IORESOURCE_MEM,
27 },
28 [1] = {
29 .start = evt2irq(0x240),
30 .end = evt2irq(0x240),
31 .flags = IORESOURCE_IRQ,
32 }
33};
34
35static struct resource smsc9118_1_resources[] = {
36 [0] = {
37 .start = SMC1_BASE,
38 .end = SMC1_BASE + 0xff,
39 .flags = IORESOURCE_MEM,
40 },
41 [1] = {
42 .start = evt2irq(0x280),
43 .end = evt2irq(0x280),
44 .flags = IORESOURCE_IRQ,
45 }
46};
47
48static struct platform_device smsc9118_0_device = {
49 .name = "smsc911x",
50 .id = 0,
51 .num_resources = ARRAY_SIZE(smsc9118_0_resources),
52 .resource = smsc9118_0_resources,
53 .dev = {
54 .platform_data = &smc911x_info,
55 },
56};
57
58static struct platform_device smsc9118_1_device = {
59 .name = "smsc911x",
60 .id = 1,
61 .num_resources = ARRAY_SIZE(smsc9118_1_resources),
62 .resource = smsc9118_1_resources,
63 .dev = {
64 .platform_data = &smc911x_info,
65 },
66};
67
68static struct resource cf_resources[] = {
69 [0] = {
70 .start = CF_BASE + CF_OFFSET,
71 .end = CF_BASE + CF_OFFSET + 0x0f,
72 .flags = IORESOURCE_MEM,
73 },
74 [1] = {
75 .start = CF_BASE + CF_OFFSET + 0x206,
76 .end = CF_BASE + CF_OFFSET + 0x20f,
77 .flags = IORESOURCE_MEM,
78 },
79 [2] = {
80 .start = evt2irq(0x2c0),
81 .end = evt2irq(0x2c0),
82 .flags = IORESOURCE_IRQ,
83 },
84};
85
86static struct platform_device cf_device = {
87 .name = "pata_platform",
88 .id = 0,
89 .num_resources = ARRAY_SIZE(cf_resources),
90 .resource = cf_resources,
91};
92
93static struct platform_device *sh2007_devices[] __initdata = {
94 &smsc9118_0_device,
95 &smsc9118_1_device,
96 &cf_device,
97};
98
99static int __init sh2007_io_init(void)
100{
101 platform_add_devices(sh2007_devices, ARRAY_SIZE(sh2007_devices));
102 return 0;
103}
104subsys_initcall(sh2007_io_init);
105
106static void __init sh2007_init_irq(void)
107{
108 plat_irq_setup_pins(IRQ_MODE_IRQ);
109}
110
111/*
112 * Initialize the board
113 */
114static void __init sh2007_setup(char **cmdline_p)
115{
116 printk(KERN_INFO "SH-2007 Setup...");
117
118 /* setup wait control registers for area 5 */
119 __raw_writel(CS5BCR_D, CS5BCR);
120 __raw_writel(CS5WCR_D, CS5WCR);
121 __raw_writel(CS5PCR_D, CS5PCR);
122
123 printk(KERN_INFO " done.\n");
124}
125
126/*
127 * The Machine Vector
128 */
129struct sh_machine_vector mv_sh2007 __initmv = {
130 .mv_setup = sh2007_setup,
131 .mv_name = "sh2007",
132 .mv_init_irq = sh2007_init_irq,
133};
diff --git a/arch/sh/boards/board-sh7757lcr.c b/arch/sh/boards/board-sh7757lcr.c
new file mode 100644
index 000000000000..c475f1056ab4
--- /dev/null
+++ b/arch/sh/boards/board-sh7757lcr.c
@@ -0,0 +1,374 @@
1/*
2 * Renesas R0P7757LC0012RL Support.
3 *
4 * Copyright (C) 2009 - 2010 Renesas Solutions Corp.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/init.h>
12#include <linux/platform_device.h>
13#include <linux/gpio.h>
14#include <linux/irq.h>
15#include <linux/spi/spi.h>
16#include <linux/spi/flash.h>
17#include <linux/io.h>
18#include <cpu/sh7757.h>
19#include <asm/sh_eth.h>
20#include <asm/heartbeat.h>
21
22static struct resource heartbeat_resource = {
23 .start = 0xffec005c, /* PUDR */
24 .end = 0xffec005c,
25 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
26};
27
28static unsigned char heartbeat_bit_pos[] = { 0, 1, 2, 3 };
29
30static struct heartbeat_data heartbeat_data = {
31 .bit_pos = heartbeat_bit_pos,
32 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
33 .flags = HEARTBEAT_INVERTED,
34};
35
36static struct platform_device heartbeat_device = {
37 .name = "heartbeat",
38 .id = -1,
39 .dev = {
40 .platform_data = &heartbeat_data,
41 },
42 .num_resources = 1,
43 .resource = &heartbeat_resource,
44};
45
46/* Fast Ethernet */
47static struct resource sh_eth0_resources[] = {
48 {
49 .start = 0xfef00000,
50 .end = 0xfef001ff,
51 .flags = IORESOURCE_MEM,
52 }, {
53 .start = 84,
54 .end = 84,
55 .flags = IORESOURCE_IRQ,
56 },
57};
58
59static struct sh_eth_plat_data sh7757_eth0_pdata = {
60 .phy = 1,
61 .edmac_endian = EDMAC_LITTLE_ENDIAN,
62};
63
64static struct platform_device sh7757_eth0_device = {
65 .name = "sh-eth",
66 .resource = sh_eth0_resources,
67 .id = 0,
68 .num_resources = ARRAY_SIZE(sh_eth0_resources),
69 .dev = {
70 .platform_data = &sh7757_eth0_pdata,
71 },
72};
73
74static struct resource sh_eth1_resources[] = {
75 {
76 .start = 0xfef00800,
77 .end = 0xfef009ff,
78 .flags = IORESOURCE_MEM,
79 }, {
80 .start = 84,
81 .end = 84,
82 .flags = IORESOURCE_IRQ,
83 },
84};
85
86static struct sh_eth_plat_data sh7757_eth1_pdata = {
87 .phy = 1,
88 .edmac_endian = EDMAC_LITTLE_ENDIAN,
89};
90
91static struct platform_device sh7757_eth1_device = {
92 .name = "sh-eth",
93 .resource = sh_eth1_resources,
94 .id = 1,
95 .num_resources = ARRAY_SIZE(sh_eth1_resources),
96 .dev = {
97 .platform_data = &sh7757_eth1_pdata,
98 },
99};
100
101static struct platform_device *sh7757lcr_devices[] __initdata = {
102 &heartbeat_device,
103 &sh7757_eth0_device,
104 &sh7757_eth1_device,
105};
106
107static int __init sh7757lcr_devices_setup(void)
108{
109 /* RGMII (PTA) */
110 gpio_request(GPIO_FN_ET0_MDC, NULL);
111 gpio_request(GPIO_FN_ET0_MDIO, NULL);
112 gpio_request(GPIO_FN_ET1_MDC, NULL);
113 gpio_request(GPIO_FN_ET1_MDIO, NULL);
114
115 /* ONFI (PTB, PTZ) */
116 gpio_request(GPIO_FN_ON_NRE, NULL);
117 gpio_request(GPIO_FN_ON_NWE, NULL);
118 gpio_request(GPIO_FN_ON_NWP, NULL);
119 gpio_request(GPIO_FN_ON_NCE0, NULL);
120 gpio_request(GPIO_FN_ON_R_B0, NULL);
121 gpio_request(GPIO_FN_ON_ALE, NULL);
122 gpio_request(GPIO_FN_ON_CLE, NULL);
123
124 gpio_request(GPIO_FN_ON_DQ7, NULL);
125 gpio_request(GPIO_FN_ON_DQ6, NULL);
126 gpio_request(GPIO_FN_ON_DQ5, NULL);
127 gpio_request(GPIO_FN_ON_DQ4, NULL);
128 gpio_request(GPIO_FN_ON_DQ3, NULL);
129 gpio_request(GPIO_FN_ON_DQ2, NULL);
130 gpio_request(GPIO_FN_ON_DQ1, NULL);
131 gpio_request(GPIO_FN_ON_DQ0, NULL);
132
133 /* IRQ8 to 0 (PTB, PTC) */
134 gpio_request(GPIO_FN_IRQ8, NULL);
135 gpio_request(GPIO_FN_IRQ7, NULL);
136 gpio_request(GPIO_FN_IRQ6, NULL);
137 gpio_request(GPIO_FN_IRQ5, NULL);
138 gpio_request(GPIO_FN_IRQ4, NULL);
139 gpio_request(GPIO_FN_IRQ3, NULL);
140 gpio_request(GPIO_FN_IRQ2, NULL);
141 gpio_request(GPIO_FN_IRQ1, NULL);
142 gpio_request(GPIO_FN_IRQ0, NULL);
143
144 /* SPI0 (PTD) */
145 gpio_request(GPIO_FN_SP0_MOSI, NULL);
146 gpio_request(GPIO_FN_SP0_MISO, NULL);
147 gpio_request(GPIO_FN_SP0_SCK, NULL);
148 gpio_request(GPIO_FN_SP0_SCK_FB, NULL);
149 gpio_request(GPIO_FN_SP0_SS0, NULL);
150 gpio_request(GPIO_FN_SP0_SS1, NULL);
151 gpio_request(GPIO_FN_SP0_SS2, NULL);
152 gpio_request(GPIO_FN_SP0_SS3, NULL);
153
154 /* RMII 0/1 (PTE, PTF) */
155 gpio_request(GPIO_FN_RMII0_CRS_DV, NULL);
156 gpio_request(GPIO_FN_RMII0_TXD1, NULL);
157 gpio_request(GPIO_FN_RMII0_TXD0, NULL);
158 gpio_request(GPIO_FN_RMII0_TXEN, NULL);
159 gpio_request(GPIO_FN_RMII0_REFCLK, NULL);
160 gpio_request(GPIO_FN_RMII0_RXD1, NULL);
161 gpio_request(GPIO_FN_RMII0_RXD0, NULL);
162 gpio_request(GPIO_FN_RMII0_RX_ER, NULL);
163 gpio_request(GPIO_FN_RMII1_CRS_DV, NULL);
164 gpio_request(GPIO_FN_RMII1_TXD1, NULL);
165 gpio_request(GPIO_FN_RMII1_TXD0, NULL);
166 gpio_request(GPIO_FN_RMII1_TXEN, NULL);
167 gpio_request(GPIO_FN_RMII1_REFCLK, NULL);
168 gpio_request(GPIO_FN_RMII1_RXD1, NULL);
169 gpio_request(GPIO_FN_RMII1_RXD0, NULL);
170 gpio_request(GPIO_FN_RMII1_RX_ER, NULL);
171
172 /* eMMC (PTG) */
173 gpio_request(GPIO_FN_MMCCLK, NULL);
174 gpio_request(GPIO_FN_MMCCMD, NULL);
175 gpio_request(GPIO_FN_MMCDAT7, NULL);
176 gpio_request(GPIO_FN_MMCDAT6, NULL);
177 gpio_request(GPIO_FN_MMCDAT5, NULL);
178 gpio_request(GPIO_FN_MMCDAT4, NULL);
179 gpio_request(GPIO_FN_MMCDAT3, NULL);
180 gpio_request(GPIO_FN_MMCDAT2, NULL);
181 gpio_request(GPIO_FN_MMCDAT1, NULL);
182 gpio_request(GPIO_FN_MMCDAT0, NULL);
183
184 /* LPC (PTG, PTH, PTQ, PTU) */
185 gpio_request(GPIO_FN_SERIRQ, NULL);
186 gpio_request(GPIO_FN_LPCPD, NULL);
187 gpio_request(GPIO_FN_LDRQ, NULL);
188 gpio_request(GPIO_FN_WP, NULL);
189 gpio_request(GPIO_FN_FMS0, NULL);
190 gpio_request(GPIO_FN_LAD3, NULL);
191 gpio_request(GPIO_FN_LAD2, NULL);
192 gpio_request(GPIO_FN_LAD1, NULL);
193 gpio_request(GPIO_FN_LAD0, NULL);
194 gpio_request(GPIO_FN_LFRAME, NULL);
195 gpio_request(GPIO_FN_LRESET, NULL);
196 gpio_request(GPIO_FN_LCLK, NULL);
197 gpio_request(GPIO_FN_LGPIO7, NULL);
198 gpio_request(GPIO_FN_LGPIO6, NULL);
199 gpio_request(GPIO_FN_LGPIO5, NULL);
200 gpio_request(GPIO_FN_LGPIO4, NULL);
201
202 /* SPI1 (PTH) */
203 gpio_request(GPIO_FN_SP1_MOSI, NULL);
204 gpio_request(GPIO_FN_SP1_MISO, NULL);
205 gpio_request(GPIO_FN_SP1_SCK, NULL);
206 gpio_request(GPIO_FN_SP1_SCK_FB, NULL);
207 gpio_request(GPIO_FN_SP1_SS0, NULL);
208 gpio_request(GPIO_FN_SP1_SS1, NULL);
209
210 /* SDHI (PTI) */
211 gpio_request(GPIO_FN_SD_WP, NULL);
212 gpio_request(GPIO_FN_SD_CD, NULL);
213 gpio_request(GPIO_FN_SD_CLK, NULL);
214 gpio_request(GPIO_FN_SD_CMD, NULL);
215 gpio_request(GPIO_FN_SD_D3, NULL);
216 gpio_request(GPIO_FN_SD_D2, NULL);
217 gpio_request(GPIO_FN_SD_D1, NULL);
218 gpio_request(GPIO_FN_SD_D0, NULL);
219
220 /* SCIF3/4 (PTJ, PTW) */
221 gpio_request(GPIO_FN_RTS3, NULL);
222 gpio_request(GPIO_FN_CTS3, NULL);
223 gpio_request(GPIO_FN_TXD3, NULL);
224 gpio_request(GPIO_FN_RXD3, NULL);
225 gpio_request(GPIO_FN_RTS4, NULL);
226 gpio_request(GPIO_FN_RXD4, NULL);
227 gpio_request(GPIO_FN_TXD4, NULL);
228 gpio_request(GPIO_FN_CTS4, NULL);
229
230 /* SERMUX (PTK, PTL, PTO, PTV) */
231 gpio_request(GPIO_FN_COM2_TXD, NULL);
232 gpio_request(GPIO_FN_COM2_RXD, NULL);
233 gpio_request(GPIO_FN_COM2_RTS, NULL);
234 gpio_request(GPIO_FN_COM2_CTS, NULL);
235 gpio_request(GPIO_FN_COM2_DTR, NULL);
236 gpio_request(GPIO_FN_COM2_DSR, NULL);
237 gpio_request(GPIO_FN_COM2_DCD, NULL);
238 gpio_request(GPIO_FN_COM2_RI, NULL);
239 gpio_request(GPIO_FN_RAC_RXD, NULL);
240 gpio_request(GPIO_FN_RAC_RTS, NULL);
241 gpio_request(GPIO_FN_RAC_CTS, NULL);
242 gpio_request(GPIO_FN_RAC_DTR, NULL);
243 gpio_request(GPIO_FN_RAC_DSR, NULL);
244 gpio_request(GPIO_FN_RAC_DCD, NULL);
245 gpio_request(GPIO_FN_RAC_TXD, NULL);
246 gpio_request(GPIO_FN_COM1_TXD, NULL);
247 gpio_request(GPIO_FN_COM1_RXD, NULL);
248 gpio_request(GPIO_FN_COM1_RTS, NULL);
249 gpio_request(GPIO_FN_COM1_CTS, NULL);
250
251 writeb(0x10, 0xfe470000); /* SMR0: SerMux mode 0 */
252
253 /* IIC (PTM, PTR, PTS) */
254 gpio_request(GPIO_FN_SDA7, NULL);
255 gpio_request(GPIO_FN_SCL7, NULL);
256 gpio_request(GPIO_FN_SDA6, NULL);
257 gpio_request(GPIO_FN_SCL6, NULL);
258 gpio_request(GPIO_FN_SDA5, NULL);
259 gpio_request(GPIO_FN_SCL5, NULL);
260 gpio_request(GPIO_FN_SDA4, NULL);
261 gpio_request(GPIO_FN_SCL4, NULL);
262 gpio_request(GPIO_FN_SDA3, NULL);
263 gpio_request(GPIO_FN_SCL3, NULL);
264 gpio_request(GPIO_FN_SDA2, NULL);
265 gpio_request(GPIO_FN_SCL2, NULL);
266 gpio_request(GPIO_FN_SDA1, NULL);
267 gpio_request(GPIO_FN_SCL1, NULL);
268 gpio_request(GPIO_FN_SDA0, NULL);
269 gpio_request(GPIO_FN_SCL0, NULL);
270
271 /* USB (PTN) */
272 gpio_request(GPIO_FN_VBUS_EN, NULL);
273 gpio_request(GPIO_FN_VBUS_OC, NULL);
274
275 /* SGPIO1/0 (PTN, PTO) */
276 gpio_request(GPIO_FN_SGPIO1_CLK, NULL);
277 gpio_request(GPIO_FN_SGPIO1_LOAD, NULL);
278 gpio_request(GPIO_FN_SGPIO1_DI, NULL);
279 gpio_request(GPIO_FN_SGPIO1_DO, NULL);
280 gpio_request(GPIO_FN_SGPIO0_CLK, NULL);
281 gpio_request(GPIO_FN_SGPIO0_LOAD, NULL);
282 gpio_request(GPIO_FN_SGPIO0_DI, NULL);
283 gpio_request(GPIO_FN_SGPIO0_DO, NULL);
284
285 /* WDT (PTN) */
286 gpio_request(GPIO_FN_SUB_CLKIN, NULL);
287
288 /* System (PTT) */
289 gpio_request(GPIO_FN_STATUS1, NULL);
290 gpio_request(GPIO_FN_STATUS0, NULL);
291
292 /* PWMX (PTT) */
293 gpio_request(GPIO_FN_PWMX1, NULL);
294 gpio_request(GPIO_FN_PWMX0, NULL);
295
296 /* R-SPI (PTV) */
297 gpio_request(GPIO_FN_R_SPI_MOSI, NULL);
298 gpio_request(GPIO_FN_R_SPI_MISO, NULL);
299 gpio_request(GPIO_FN_R_SPI_RSPCK, NULL);
300 gpio_request(GPIO_FN_R_SPI_SSL0, NULL);
301 gpio_request(GPIO_FN_R_SPI_SSL1, NULL);
302
303 /* EVC (PTV, PTW) */
304 gpio_request(GPIO_FN_EVENT7, NULL);
305 gpio_request(GPIO_FN_EVENT6, NULL);
306 gpio_request(GPIO_FN_EVENT5, NULL);
307 gpio_request(GPIO_FN_EVENT4, NULL);
308 gpio_request(GPIO_FN_EVENT3, NULL);
309 gpio_request(GPIO_FN_EVENT2, NULL);
310 gpio_request(GPIO_FN_EVENT1, NULL);
311 gpio_request(GPIO_FN_EVENT0, NULL);
312
313 /* LED for heartbeat */
314 gpio_request(GPIO_PTU3, NULL);
315 gpio_direction_output(GPIO_PTU3, 1);
316 gpio_request(GPIO_PTU2, NULL);
317 gpio_direction_output(GPIO_PTU2, 1);
318 gpio_request(GPIO_PTU1, NULL);
319 gpio_direction_output(GPIO_PTU1, 1);
320 gpio_request(GPIO_PTU0, NULL);
321 gpio_direction_output(GPIO_PTU0, 1);
322
323 /* control for MDIO of Gigabit Ethernet */
324 gpio_request(GPIO_PTT4, NULL);
325 gpio_direction_output(GPIO_PTT4, 1);
326
327 /* control for eMMC */
328 gpio_request(GPIO_PTT7, NULL); /* eMMC_RST# */
329 gpio_direction_output(GPIO_PTT7, 0);
330 gpio_request(GPIO_PTT6, NULL); /* eMMC_INDEX# */
331 gpio_direction_output(GPIO_PTT6, 0);
332 gpio_request(GPIO_PTT5, NULL); /* eMMC_PRST# */
333 gpio_direction_output(GPIO_PTT5, 1);
334
335 /* General platform */
336 return platform_add_devices(sh7757lcr_devices,
337 ARRAY_SIZE(sh7757lcr_devices));
338}
339arch_initcall(sh7757lcr_devices_setup);
340
341/* Initialize IRQ setting */
342void __init init_sh7757lcr_IRQ(void)
343{
344 plat_irq_setup_pins(IRQ_MODE_IRQ7654);
345 plat_irq_setup_pins(IRQ_MODE_IRQ3210);
346}
347
348/* Initialize the board */
349static void __init sh7757lcr_setup(char **cmdline_p)
350{
351 printk(KERN_INFO "Renesas R0P7757LC0012RL support.\n");
352}
353
354static int sh7757lcr_mode_pins(void)
355{
356 int value = 0;
357
358 /* These are the factory default settings of S3 (Low active).
359 * If you change these dip switches then you will need to
360 * adjust the values below as well.
361 */
362 value |= MODE_PIN0; /* Clock Mode: 1 */
363
364 return value;
365}
366
367/* The Machine Vector */
368static struct sh_machine_vector mv_sh7757lcr __initmv = {
369 .mv_name = "SH7757LCR",
370 .mv_setup = sh7757lcr_setup,
371 .mv_init_irq = init_sh7757lcr_IRQ,
372 .mv_mode_pins = sh7757lcr_mode_pins,
373};
374
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
index 1d7b495a7db4..71a3368ab1fc 100644
--- a/arch/sh/boards/mach-ecovec24/setup.c
+++ b/arch/sh/boards/mach-ecovec24/setup.c
@@ -1248,14 +1248,14 @@ static int __init arch_setup(void)
1248 1248
1249 /* set SPU2 clock to 83.4 MHz */ 1249 /* set SPU2 clock to 83.4 MHz */
1250 clk = clk_get(NULL, "spu_clk"); 1250 clk = clk_get(NULL, "spu_clk");
1251 if (clk) { 1251 if (!IS_ERR(clk)) {
1252 clk_set_rate(clk, clk_round_rate(clk, 83333333)); 1252 clk_set_rate(clk, clk_round_rate(clk, 83333333));
1253 clk_put(clk); 1253 clk_put(clk);
1254 } 1254 }
1255 1255
1256 /* change parent of FSI B */ 1256 /* change parent of FSI B */
1257 clk = clk_get(NULL, "fsib_clk"); 1257 clk = clk_get(NULL, "fsib_clk");
1258 if (clk) { 1258 if (!IS_ERR(clk)) {
1259 clk_register(&fsimckb_clk); 1259 clk_register(&fsimckb_clk);
1260 clk_set_parent(clk, &fsimckb_clk); 1260 clk_set_parent(clk, &fsimckb_clk);
1261 clk_set_rate(clk, 11000); 1261 clk_set_rate(clk, 11000);
@@ -1273,7 +1273,7 @@ static int __init arch_setup(void)
1273 1273
1274 /* set VPU clock to 166 MHz */ 1274 /* set VPU clock to 166 MHz */
1275 clk = clk_get(NULL, "vpu_clk"); 1275 clk = clk_get(NULL, "vpu_clk");
1276 if (clk) { 1276 if (!IS_ERR(clk)) {
1277 clk_set_rate(clk, clk_round_rate(clk, 166000000)); 1277 clk_set_rate(clk, clk_round_rate(clk, 166000000));
1278 clk_put(clk); 1278 clk_put(clk);
1279 } 1279 }
diff --git a/arch/sh/boards/mach-sdk7786/Makefile b/arch/sh/boards/mach-sdk7786/Makefile
index a29f19e85b63..23ff7d4ac491 100644
--- a/arch/sh/boards/mach-sdk7786/Makefile
+++ b/arch/sh/boards/mach-sdk7786/Makefile
@@ -1 +1,4 @@
1obj-y := setup.o fpga.o irq.o 1obj-y := fpga.o irq.o setup.o
2
3obj-$(CONFIG_GENERIC_GPIO) += gpio.o
4obj-$(CONFIG_HAVE_SRAM_POOL) += sram.o
diff --git a/arch/sh/boards/mach-sdk7786/gpio.c b/arch/sh/boards/mach-sdk7786/gpio.c
new file mode 100644
index 000000000000..f71ce09d4e15
--- /dev/null
+++ b/arch/sh/boards/mach-sdk7786/gpio.c
@@ -0,0 +1,49 @@
1/*
2 * SDK7786 FPGA USRGPIR Support.
3 *
4 * Copyright (C) 2010 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/init.h>
11#include <linux/interrupt.h>
12#include <linux/gpio.h>
13#include <linux/irq.h>
14#include <linux/kernel.h>
15#include <linux/spinlock.h>
16#include <linux/io.h>
17#include <mach/fpga.h>
18
19#define NR_FPGA_GPIOS 8
20
21static const char *usrgpir_gpio_names[NR_FPGA_GPIOS] = {
22 "in0", "in1", "in2", "in3", "in4", "in5", "in6", "in7",
23};
24
25static int usrgpir_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
26{
27 /* always in */
28 return 0;
29}
30
31static int usrgpir_gpio_get(struct gpio_chip *chip, unsigned gpio)
32{
33 return !!(fpga_read_reg(USRGPIR) & (1 << gpio));
34}
35
36static struct gpio_chip usrgpir_gpio_chip = {
37 .label = "sdk7786-fpga",
38 .names = usrgpir_gpio_names,
39 .direction_input = usrgpir_gpio_direction_input,
40 .get = usrgpir_gpio_get,
41 .base = -1, /* don't care */
42 .ngpio = NR_FPGA_GPIOS,
43};
44
45static int __init usrgpir_gpio_setup(void)
46{
47 return gpiochip_add(&usrgpir_gpio_chip);
48}
49device_initcall(usrgpir_gpio_setup);
diff --git a/arch/sh/boards/mach-sdk7786/setup.c b/arch/sh/boards/mach-sdk7786/setup.c
index 2ec1ea5cf8ef..7e0c4e3878e0 100644
--- a/arch/sh/boards/mach-sdk7786/setup.c
+++ b/arch/sh/boards/mach-sdk7786/setup.c
@@ -20,6 +20,8 @@
20#include <asm/machvec.h> 20#include <asm/machvec.h>
21#include <asm/heartbeat.h> 21#include <asm/heartbeat.h>
22#include <asm/sizes.h> 22#include <asm/sizes.h>
23#include <asm/clock.h>
24#include <asm/clkdev.h>
23#include <asm/reboot.h> 25#include <asm/reboot.h>
24#include <asm/smp-ops.h> 26#include <asm/smp-ops.h>
25 27
@@ -140,6 +142,45 @@ static int sdk7786_mode_pins(void)
140 return fpga_read_reg(MODSWR); 142 return fpga_read_reg(MODSWR);
141} 143}
142 144
145/*
146 * FPGA-driven PCIe clocks
147 *
148 * Historically these include the oscillator, clock B (slots 2/3/4) and
149 * clock A (slot 1 and the CPU clock). Newer revs of the PCB shove
150 * everything under a single PCIe clocks enable bit that happens to map
151 * to the same bit position as the oscillator bit for earlier FPGA
152 * versions.
153 *
154 * Given that the legacy clocks have the side-effect of shutting the CPU
155 * off through the FPGA along with the PCI slots, we simply leave them in
156 * their initial state and don't bother registering them with the clock
157 * framework.
158 */
159static int sdk7786_pcie_clk_enable(struct clk *clk)
160{
161 fpga_write_reg(fpga_read_reg(PCIECR) | PCIECR_CLKEN, PCIECR);
162 return 0;
163}
164
165static void sdk7786_pcie_clk_disable(struct clk *clk)
166{
167 fpga_write_reg(fpga_read_reg(PCIECR) & ~PCIECR_CLKEN, PCIECR);
168}
169
170static struct clk_ops sdk7786_pcie_clk_ops = {
171 .enable = sdk7786_pcie_clk_enable,
172 .disable = sdk7786_pcie_clk_disable,
173};
174
175static struct clk sdk7786_pcie_clk = {
176 .ops = &sdk7786_pcie_clk_ops,
177};
178
179static struct clk_lookup sdk7786_pcie_cl = {
180 .con_id = "pcie_plat_clk",
181 .clk = &sdk7786_pcie_clk,
182};
183
143static int sdk7786_clk_init(void) 184static int sdk7786_clk_init(void)
144{ 185{
145 struct clk *clk; 186 struct clk *clk;
@@ -158,7 +199,18 @@ static int sdk7786_clk_init(void)
158 ret = clk_set_rate(clk, 33333333); 199 ret = clk_set_rate(clk, 33333333);
159 clk_put(clk); 200 clk_put(clk);
160 201
161 return ret; 202 /*
203 * Setup the FPGA clocks.
204 */
205 ret = clk_register(&sdk7786_pcie_clk);
206 if (unlikely(ret)) {
207 pr_err("FPGA clock registration failed\n");
208 return ret;
209 }
210
211 clkdev_add(&sdk7786_pcie_cl);
212
213 return 0;
162} 214}
163 215
164static void sdk7786_restart(char *cmd) 216static void sdk7786_restart(char *cmd)
diff --git a/arch/sh/boards/mach-sdk7786/sram.c b/arch/sh/boards/mach-sdk7786/sram.c
new file mode 100644
index 000000000000..c81c3abbe01c
--- /dev/null
+++ b/arch/sh/boards/mach-sdk7786/sram.c
@@ -0,0 +1,72 @@
1/*
2 * SDK7786 FPGA SRAM Support.
3 *
4 * Copyright (C) 2010 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
11
12#include <linux/init.h>
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/io.h>
16#include <linux/string.h>
17#include <mach/fpga.h>
18#include <asm/sram.h>
19#include <asm/sizes.h>
20
21static int __init fpga_sram_init(void)
22{
23 unsigned long phys;
24 unsigned int area;
25 void __iomem *vaddr;
26 int ret;
27 u16 data;
28
29 /* Enable FPGA SRAM */
30 data = fpga_read_reg(LCLASR);
31 data |= LCLASR_FRAMEN;
32 fpga_write_reg(data, LCLASR);
33
34 /*
35 * FPGA_SEL determines the area mapping
36 */
37 area = (data & LCLASR_FPGA_SEL_MASK) >> LCLASR_FPGA_SEL_SHIFT;
38 if (unlikely(area == LCLASR_AREA_MASK)) {
39 pr_err("FPGA memory unmapped.\n");
40 return -ENXIO;
41 }
42
43 /*
44 * The memory itself occupies a 2KiB range at the top of the area
45 * immediately below the system registers.
46 */
47 phys = (area << 26) + SZ_64M - SZ_4K;
48
49 /*
50 * The FPGA SRAM resides in translatable physical space, so set
51 * up a mapping prior to inserting it in to the pool.
52 */
53 vaddr = ioremap(phys, SZ_2K);
54 if (unlikely(!vaddr)) {
55 pr_err("Failed remapping FPGA memory.\n");
56 return -ENXIO;
57 }
58
59 pr_info("Adding %dKiB of FPGA memory at 0x%08lx-0x%08lx "
60 "(area %d) to pool.\n",
61 SZ_2K >> 10, phys, phys + SZ_2K - 1, area);
62
63 ret = gen_pool_add(sram_pool, (unsigned long)vaddr, SZ_2K, -1);
64 if (unlikely(ret < 0)) {
65 pr_err("Failed adding memory\n");
66 iounmap(vaddr);
67 return ret;
68 }
69
70 return 0;
71}
72postcore_initcall(fpga_sram_init);
diff --git a/arch/sh/boards/mach-x3proto/Makefile b/arch/sh/boards/mach-x3proto/Makefile
index 983e4551fecf..708c21c919ff 100644
--- a/arch/sh/boards/mach-x3proto/Makefile
+++ b/arch/sh/boards/mach-x3proto/Makefile
@@ -1 +1,3 @@
1obj-y += setup.o ilsel.o 1obj-y += setup.o ilsel.o
2
3obj-$(CONFIG_GENERIC_GPIO) += gpio.o
diff --git a/arch/sh/boards/mach-x3proto/gpio.c b/arch/sh/boards/mach-x3proto/gpio.c
new file mode 100644
index 000000000000..594adf76e46a
--- /dev/null
+++ b/arch/sh/boards/mach-x3proto/gpio.c
@@ -0,0 +1,135 @@
1/*
2 * arch/sh/boards/mach-x3proto/gpio.c
3 *
4 * Renesas SH-X3 Prototype Baseboard GPIO Support.
5 *
6 * Copyright (C) 2010 Paul Mundt
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13
14#include <linux/init.h>
15#include <linux/interrupt.h>
16#include <linux/gpio.h>
17#include <linux/irq.h>
18#include <linux/kernel.h>
19#include <linux/spinlock.h>
20#include <linux/io.h>
21#include <mach/ilsel.h>
22#include <mach/hardware.h>
23
24#define KEYCTLR 0xb81c0000
25#define KEYOUTR 0xb81c0002
26#define KEYDETR 0xb81c0004
27
28static DEFINE_SPINLOCK(x3proto_gpio_lock);
29static unsigned int x3proto_gpio_irq_map[NR_BASEBOARD_GPIOS] = { 0, };
30
31static int x3proto_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
32{
33 unsigned long flags;
34 unsigned int data;
35
36 spin_lock_irqsave(&x3proto_gpio_lock, flags);
37 data = __raw_readw(KEYCTLR);
38 data |= (1 << gpio);
39 __raw_writew(data, KEYCTLR);
40 spin_unlock_irqrestore(&x3proto_gpio_lock, flags);
41
42 return 0;
43}
44
45static int x3proto_gpio_get(struct gpio_chip *chip, unsigned gpio)
46{
47 return !!(__raw_readw(KEYDETR) & (1 << gpio));
48}
49
50static int x3proto_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
51{
52 return x3proto_gpio_irq_map[gpio];
53}
54
55static void x3proto_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
56{
57 struct irq_chip *chip = get_irq_desc_chip(desc);
58 unsigned long mask;
59 int pin;
60
61 chip->mask_ack(irq);
62
63 mask = __raw_readw(KEYDETR);
64
65 for_each_set_bit(pin, &mask, NR_BASEBOARD_GPIOS)
66 generic_handle_irq(x3proto_gpio_to_irq(NULL, pin));
67
68 chip->unmask(irq);
69}
70
71struct gpio_chip x3proto_gpio_chip = {
72 .label = "x3proto-gpio",
73 .direction_input = x3proto_gpio_direction_input,
74 .get = x3proto_gpio_get,
75 .to_irq = x3proto_gpio_to_irq,
76 .base = -1,
77 .ngpio = NR_BASEBOARD_GPIOS,
78};
79
80int __init x3proto_gpio_setup(void)
81{
82 int ilsel;
83 int ret, i;
84
85 ilsel = ilsel_enable(ILSEL_KEY);
86 if (unlikely(ilsel < 0))
87 return ilsel;
88
89 ret = gpiochip_add(&x3proto_gpio_chip);
90 if (unlikely(ret))
91 goto err_gpio;
92
93 for (i = 0; i < NR_BASEBOARD_GPIOS; i++) {
94 unsigned long flags;
95 int irq = create_irq();
96
97 if (unlikely(irq < 0)) {
98 ret = -EINVAL;
99 goto err_irq;
100 }
101
102 spin_lock_irqsave(&x3proto_gpio_lock, flags);
103 x3proto_gpio_irq_map[i] = irq;
104 set_irq_chip_and_handler_name(irq, &dummy_irq_chip,
105 handle_simple_irq, "gpio");
106 spin_unlock_irqrestore(&x3proto_gpio_lock, flags);
107 }
108
109 pr_info("registering '%s' support, handling GPIOs %u -> %u, "
110 "bound to IRQ %u\n",
111 x3proto_gpio_chip.label, x3proto_gpio_chip.base,
112 x3proto_gpio_chip.base + x3proto_gpio_chip.ngpio,
113 ilsel);
114
115 set_irq_chained_handler(ilsel, x3proto_gpio_irq_handler);
116 set_irq_wake(ilsel, 1);
117
118 return 0;
119
120err_irq:
121 for (; i >= 0; --i)
122 if (x3proto_gpio_irq_map[i])
123 destroy_irq(x3proto_gpio_irq_map[i]);
124
125 ret = gpiochip_remove(&x3proto_gpio_chip);
126 if (unlikely(ret))
127 pr_err("Failed deregistering GPIO\n");
128
129err_gpio:
130 synchronize_irq(ilsel);
131
132 ilsel_disable(ILSEL_KEY);
133
134 return ret;
135}
diff --git a/arch/sh/boards/mach-x3proto/ilsel.c b/arch/sh/boards/mach-x3proto/ilsel.c
index 5c9842704c60..95e346139515 100644
--- a/arch/sh/boards/mach-x3proto/ilsel.c
+++ b/arch/sh/boards/mach-x3proto/ilsel.c
@@ -1,20 +1,22 @@
1/* 1/*
2 * arch/sh/boards/renesas/x3proto/ilsel.c 2 * arch/sh/boards/mach-x3proto/ilsel.c
3 * 3 *
4 * Helper routines for SH-X3 proto board ILSEL. 4 * Helper routines for SH-X3 proto board ILSEL.
5 * 5 *
6 * Copyright (C) 2007 Paul Mundt 6 * Copyright (C) 2007 - 2010 Paul Mundt
7 * 7 *
8 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details. 10 * for more details.
11 */ 11 */
12#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13
12#include <linux/init.h> 14#include <linux/init.h>
13#include <linux/kernel.h> 15#include <linux/kernel.h>
14#include <linux/module.h> 16#include <linux/module.h>
15#include <linux/bitmap.h> 17#include <linux/bitmap.h>
16#include <linux/io.h> 18#include <linux/io.h>
17#include <asm/ilsel.h> 19#include <mach/ilsel.h>
18 20
19/* 21/*
20 * ILSEL is split across: 22 * ILSEL is split across:
@@ -64,6 +66,8 @@ static void __ilsel_enable(ilsel_source_t set, unsigned int bit)
64 unsigned int tmp, shift; 66 unsigned int tmp, shift;
65 unsigned long addr; 67 unsigned long addr;
66 68
69 pr_notice("enabling ILSEL set %d\n", set);
70
67 addr = mk_ilsel_addr(bit); 71 addr = mk_ilsel_addr(bit);
68 shift = mk_ilsel_shift(bit); 72 shift = mk_ilsel_shift(bit);
69 73
@@ -92,8 +96,10 @@ int ilsel_enable(ilsel_source_t set)
92{ 96{
93 unsigned int bit; 97 unsigned int bit;
94 98
95 /* Aliased sources must use ilsel_enable_fixed() */ 99 if (unlikely(set > ILSEL_KEY)) {
96 BUG_ON(set > ILSEL_KEY); 100 pr_err("Aliased sources must use ilsel_enable_fixed()\n");
101 return -EINVAL;
102 }
97 103
98 do { 104 do {
99 bit = find_first_zero_bit(&ilsel_level_map, ILSEL_LEVELS); 105 bit = find_first_zero_bit(&ilsel_level_map, ILSEL_LEVELS);
@@ -140,6 +146,8 @@ void ilsel_disable(unsigned int irq)
140 unsigned long addr; 146 unsigned long addr;
141 unsigned int tmp; 147 unsigned int tmp;
142 148
149 pr_notice("disabling ILSEL set %d\n", irq);
150
143 addr = mk_ilsel_addr(irq); 151 addr = mk_ilsel_addr(irq);
144 152
145 tmp = __raw_readw(addr); 153 tmp = __raw_readw(addr);
diff --git a/arch/sh/boards/mach-x3proto/setup.c b/arch/sh/boards/mach-x3proto/setup.c
index 102bf56befb4..d682e2b6a856 100644
--- a/arch/sh/boards/mach-x3proto/setup.c
+++ b/arch/sh/boards/mach-x3proto/setup.c
@@ -1,9 +1,9 @@
1/* 1/*
2 * arch/sh/boards/renesas/x3proto/setup.c 2 * arch/sh/boards/mach-x3proto/setup.c
3 * 3 *
4 * Renesas SH-X3 Prototype Board Support. 4 * Renesas SH-X3 Prototype Board Support.
5 * 5 *
6 * Copyright (C) 2007 - 2008 Paul Mundt 6 * Copyright (C) 2007 - 2010 Paul Mundt
7 * 7 *
8 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
@@ -16,9 +16,13 @@
16#include <linux/smc91x.h> 16#include <linux/smc91x.h>
17#include <linux/irq.h> 17#include <linux/irq.h>
18#include <linux/interrupt.h> 18#include <linux/interrupt.h>
19#include <linux/input.h>
19#include <linux/usb/r8a66597.h> 20#include <linux/usb/r8a66597.h>
20#include <linux/usb/m66592.h> 21#include <linux/usb/m66592.h>
21#include <asm/ilsel.h> 22#include <linux/gpio.h>
23#include <linux/gpio_keys.h>
24#include <mach/ilsel.h>
25#include <mach/hardware.h>
22#include <asm/smp-ops.h> 26#include <asm/smp-ops.h>
23 27
24static struct resource heartbeat_resources[] = { 28static struct resource heartbeat_resources[] = {
@@ -122,15 +126,128 @@ static struct platform_device m66592_usb_peripheral_device = {
122 .resource = m66592_usb_peripheral_resources, 126 .resource = m66592_usb_peripheral_resources,
123}; 127};
124 128
129static struct gpio_keys_button baseboard_buttons[NR_BASEBOARD_GPIOS] = {
130 {
131 .desc = "key44",
132 .code = KEY_POWER,
133 .active_low = 1,
134 .wakeup = 1,
135 }, {
136 .desc = "key43",
137 .code = KEY_SUSPEND,
138 .active_low = 1,
139 .wakeup = 1,
140 }, {
141 .desc = "key42",
142 .code = KEY_KATAKANAHIRAGANA,
143 .active_low = 1,
144 }, {
145 .desc = "key41",
146 .code = KEY_SWITCHVIDEOMODE,
147 .active_low = 1,
148 }, {
149 .desc = "key34",
150 .code = KEY_F12,
151 .active_low = 1,
152 }, {
153 .desc = "key33",
154 .code = KEY_F11,
155 .active_low = 1,
156 }, {
157 .desc = "key32",
158 .code = KEY_F10,
159 .active_low = 1,
160 }, {
161 .desc = "key31",
162 .code = KEY_F9,
163 .active_low = 1,
164 }, {
165 .desc = "key24",
166 .code = KEY_F8,
167 .active_low = 1,
168 }, {
169 .desc = "key23",
170 .code = KEY_F7,
171 .active_low = 1,
172 }, {
173 .desc = "key22",
174 .code = KEY_F6,
175 .active_low = 1,
176 }, {
177 .desc = "key21",
178 .code = KEY_F5,
179 .active_low = 1,
180 }, {
181 .desc = "key14",
182 .code = KEY_F4,
183 .active_low = 1,
184 }, {
185 .desc = "key13",
186 .code = KEY_F3,
187 .active_low = 1,
188 }, {
189 .desc = "key12",
190 .code = KEY_F2,
191 .active_low = 1,
192 }, {
193 .desc = "key11",
194 .code = KEY_F1,
195 .active_low = 1,
196 },
197};
198
199static struct gpio_keys_platform_data baseboard_buttons_data = {
200 .buttons = baseboard_buttons,
201 .nbuttons = ARRAY_SIZE(baseboard_buttons),
202};
203
204static struct platform_device baseboard_buttons_device = {
205 .name = "gpio-keys",
206 .id = -1,
207 .dev = {
208 .platform_data = &baseboard_buttons_data,
209 },
210};
211
125static struct platform_device *x3proto_devices[] __initdata = { 212static struct platform_device *x3proto_devices[] __initdata = {
126 &heartbeat_device, 213 &heartbeat_device,
127 &smc91x_device, 214 &smc91x_device,
128 &r8a66597_usb_host_device, 215 &r8a66597_usb_host_device,
129 &m66592_usb_peripheral_device, 216 &m66592_usb_peripheral_device,
217 &baseboard_buttons_device,
130}; 218};
131 219
220static void __init x3proto_init_irq(void)
221{
222 plat_irq_setup_pins(IRQ_MODE_IRL3210);
223
224 /* Set ICR0.LVLMODE */
225 __raw_writel(__raw_readl(0xfe410000) | (1 << 21), 0xfe410000);
226}
227
132static int __init x3proto_devices_setup(void) 228static int __init x3proto_devices_setup(void)
133{ 229{
230 int ret, i;
231
232 /*
233 * IRLs are only needed for ILSEL mappings, so flip over the INTC
234 * pins at a later point to enable the GPIOs to settle.
235 */
236 x3proto_init_irq();
237
238 /*
239 * Now that ILSELs are available, set up the baseboard GPIOs.
240 */
241 ret = x3proto_gpio_setup();
242 if (unlikely(ret))
243 return ret;
244
245 /*
246 * Propagate dynamic GPIOs for the baseboard button device.
247 */
248 for (i = 0; i < ARRAY_SIZE(baseboard_buttons); i++)
249 baseboard_buttons[i].gpio = x3proto_gpio_chip.base + i;
250
134 r8a66597_usb_host_resources[1].start = 251 r8a66597_usb_host_resources[1].start =
135 r8a66597_usb_host_resources[1].end = ilsel_enable(ILSEL_USBH_I); 252 r8a66597_usb_host_resources[1].end = ilsel_enable(ILSEL_USBH_I);
136 253
@@ -145,14 +262,6 @@ static int __init x3proto_devices_setup(void)
145} 262}
146device_initcall(x3proto_devices_setup); 263device_initcall(x3proto_devices_setup);
147 264
148static void __init x3proto_init_irq(void)
149{
150 plat_irq_setup_pins(IRQ_MODE_IRL3210);
151
152 /* Set ICR0.LVLMODE */
153 __raw_writel(__raw_readl(0xfe410000) | (1 << 21), 0xfe410000);
154}
155
156static void __init x3proto_setup(char **cmdline_p) 265static void __init x3proto_setup(char **cmdline_p)
157{ 266{
158 register_smp_ops(&shx3_smp_ops); 267 register_smp_ops(&shx3_smp_ops);
@@ -161,5 +270,4 @@ static void __init x3proto_setup(char **cmdline_p)
161static struct sh_machine_vector mv_x3proto __initmv = { 270static struct sh_machine_vector mv_x3proto __initmv = {
162 .mv_name = "x3proto", 271 .mv_name = "x3proto",
163 .mv_setup = x3proto_setup, 272 .mv_setup = x3proto_setup,
164 .mv_init_irq = x3proto_init_irq,
165}; 273};
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-21 18:42:03 -0500