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authorPaul Mundt <lethal@linux-sh.org>2006-02-01 06:05:59 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2006-02-01 11:53:19 -0500
commit740172947b315fa97f8d29b0b9809b1ea1201642 (patch)
tree9bdf73dd629a1bca83d626a0d4cffd6b7842e789 /arch/sh/boards
parent4a41cdf9788f14bb120ad06d9ce17ca05fd72f03 (diff)
[PATCH] sh: SH4-202 microdev updates
A few trivial updates for the microdev board support code: - Update for __IO_PREFIX changes. - Consolidate headers into a single microdev.h. - Update the microdev_defconfig. - Add init values for the S1D13806 used by s1d13xxxfb. Signed-off-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/sh/boards')
-rw-r--r--arch/sh/boards/superh/microdev/io.c192
-rw-r--r--arch/sh/boards/superh/microdev/irq.c2
-rw-r--r--arch/sh/boards/superh/microdev/setup.c166
3 files changed, 250 insertions, 110 deletions
diff --git a/arch/sh/boards/superh/microdev/io.c b/arch/sh/boards/superh/microdev/io.c
index fe83b2c03076..1ed7f880b8c7 100644
--- a/arch/sh/boards/superh/microdev/io.c
+++ b/arch/sh/boards/superh/microdev/io.c
@@ -16,7 +16,7 @@
16#include <linux/pci.h> 16#include <linux/pci.h>
17#include <linux/wait.h> 17#include <linux/wait.h>
18#include <asm/io.h> 18#include <asm/io.h>
19#include <asm/mach/io.h> 19#include <asm/microdev.h>
20 20
21 /* 21 /*
22 * we need to have a 'safe' address to re-direct all I/O requests 22 * we need to have a 'safe' address to re-direct all I/O requests
@@ -52,8 +52,90 @@
52#define IO_ISP1161_PHYS 0xa7700000ul /* Physical address of Philips ISP1161x USB chip */ 52#define IO_ISP1161_PHYS 0xa7700000ul /* Physical address of Philips ISP1161x USB chip */
53#define IO_SUPERIO_PHYS 0xa7800000ul /* Physical address of SMSC FDC37C93xAPM SuperIO chip */ 53#define IO_SUPERIO_PHYS 0xa7800000ul /* Physical address of SMSC FDC37C93xAPM SuperIO chip */
54 54
55#define PORT2ADDR(x) (microdev_isa_port2addr(x)) 55/*
56 * map I/O ports to memory-mapped addresses
57 */
58static unsigned long microdev_isa_port2addr(unsigned long offset)
59{
60 unsigned long result;
61
62 if ((offset >= IO_LAN91C111_BASE) &&
63 (offset < IO_LAN91C111_BASE + IO_LAN91C111_EXTENT)) {
64 /*
65 * SMSC LAN91C111 Ethernet chip
66 */
67 result = IO_LAN91C111_PHYS + offset - IO_LAN91C111_BASE;
68 } else if ((offset >= IO_SUPERIO_BASE) &&
69 (offset < IO_SUPERIO_BASE + IO_SUPERIO_EXTENT)) {
70 /*
71 * SMSC FDC37C93xAPM SuperIO chip
72 *
73 * Configuration Registers
74 */
75 result = IO_SUPERIO_PHYS + (offset << 1);
76#if 0
77 } else if (offset == KBD_DATA_REG || offset == KBD_CNTL_REG ||
78 offset == KBD_STATUS_REG) {
79 /*
80 * SMSC FDC37C93xAPM SuperIO chip
81 *
82 * PS/2 Keyboard + Mouse (ports 0x60 and 0x64).
83 */
84 result = IO_SUPERIO_PHYS + (offset << 1);
85#endif
86 } else if (((offset >= IO_IDE1_BASE) &&
87 (offset < IO_IDE1_BASE + IO_IDE_EXTENT)) ||
88 (offset == IO_IDE1_MISC)) {
89 /*
90 * SMSC FDC37C93xAPM SuperIO chip
91 *
92 * IDE #1
93 */
94 result = IO_SUPERIO_PHYS + (offset << 1);
95 } else if (((offset >= IO_IDE2_BASE) &&
96 (offset < IO_IDE2_BASE + IO_IDE_EXTENT)) ||
97 (offset == IO_IDE2_MISC)) {
98 /*
99 * SMSC FDC37C93xAPM SuperIO chip
100 *
101 * IDE #2
102 */
103 result = IO_SUPERIO_PHYS + (offset << 1);
104 } else if ((offset >= IO_SERIAL1_BASE) &&
105 (offset < IO_SERIAL1_BASE + IO_SERIAL_EXTENT)) {
106 /*
107 * SMSC FDC37C93xAPM SuperIO chip
108 *
109 * Serial #1
110 */
111 result = IO_SUPERIO_PHYS + (offset << 1);
112 } else if ((offset >= IO_SERIAL2_BASE) &&
113 (offset < IO_SERIAL2_BASE + IO_SERIAL_EXTENT)) {
114 /*
115 * SMSC FDC37C93xAPM SuperIO chip
116 *
117 * Serial #2
118 */
119 result = IO_SUPERIO_PHYS + (offset << 1);
120 } else if ((offset >= IO_ISP1161_BASE) &&
121 (offset < IO_ISP1161_BASE + IO_ISP1161_EXTENT)) {
122 /*
123 * Philips USB ISP1161x chip
124 */
125 result = IO_ISP1161_PHYS + offset - IO_ISP1161_BASE;
126 } else {
127 /*
128 * safe default.
129 */
130 printk("Warning: unexpected port in %s( offset = 0x%lx )\n",
131 __FUNCTION__, offset);
132 result = PVR;
133 }
134
135 return result;
136}
56 137
138#define PORT2ADDR(x) (microdev_isa_port2addr(x))
57 139
58static inline void delay(void) 140static inline void delay(void)
59{ 141{
@@ -94,6 +176,17 @@ unsigned int microdev_inl(unsigned long port)
94 return *(volatile unsigned int*)PORT2ADDR(port); 176 return *(volatile unsigned int*)PORT2ADDR(port);
95} 177}
96 178
179void microdev_outw(unsigned short b, unsigned long port)
180{
181#ifdef CONFIG_PCI
182 if (port >= PCIBIOS_MIN_IO) {
183 microdev_pci_outw(b, port);
184 return;
185 }
186#endif
187 *(volatile unsigned short*)PORT2ADDR(port) = b;
188}
189
97void microdev_outb(unsigned char b, unsigned long port) 190void microdev_outb(unsigned char b, unsigned long port)
98{ 191{
99#ifdef CONFIG_PCI 192#ifdef CONFIG_PCI
@@ -158,17 +251,6 @@ void microdev_outb(unsigned char b, unsigned long port)
158 } 251 }
159} 252}
160 253
161void microdev_outw(unsigned short b, unsigned long port)
162{
163#ifdef CONFIG_PCI
164 if (port >= PCIBIOS_MIN_IO) {
165 microdev_pci_outw(b, port);
166 return;
167 }
168#endif
169 *(volatile unsigned short*)PORT2ADDR(port) = b;
170}
171
172void microdev_outl(unsigned int b, unsigned long port) 254void microdev_outl(unsigned int b, unsigned long port)
173{ 255{
174#ifdef CONFIG_PCI 256#ifdef CONFIG_PCI
@@ -284,87 +366,3 @@ void microdev_outsl(unsigned long port, const void *buffer, unsigned long count)
284 while (count--) 366 while (count--)
285 *port_addr = *buf++; 367 *port_addr = *buf++;
286} 368}
287
288/*
289 * map I/O ports to memory-mapped addresses
290 */
291unsigned long microdev_isa_port2addr(unsigned long offset)
292{
293 unsigned long result;
294
295 if ((offset >= IO_LAN91C111_BASE) &&
296 (offset < IO_LAN91C111_BASE + IO_LAN91C111_EXTENT)) {
297 /*
298 * SMSC LAN91C111 Ethernet chip
299 */
300 result = IO_LAN91C111_PHYS + offset - IO_LAN91C111_BASE;
301 } else if ((offset >= IO_SUPERIO_BASE) &&
302 (offset < IO_SUPERIO_BASE + IO_SUPERIO_EXTENT)) {
303 /*
304 * SMSC FDC37C93xAPM SuperIO chip
305 *
306 * Configuration Registers
307 */
308 result = IO_SUPERIO_PHYS + (offset << 1);
309#if 0
310 } else if (offset == KBD_DATA_REG || offset == KBD_CNTL_REG ||
311 offset == KBD_STATUS_REG) {
312 /*
313 * SMSC FDC37C93xAPM SuperIO chip
314 *
315 * PS/2 Keyboard + Mouse (ports 0x60 and 0x64).
316 */
317 result = IO_SUPERIO_PHYS + (offset << 1);
318#endif
319 } else if (((offset >= IO_IDE1_BASE) &&
320 (offset < IO_IDE1_BASE + IO_IDE_EXTENT)) ||
321 (offset == IO_IDE1_MISC)) {
322 /*
323 * SMSC FDC37C93xAPM SuperIO chip
324 *
325 * IDE #1
326 */
327 result = IO_SUPERIO_PHYS + (offset << 1);
328 } else if (((offset >= IO_IDE2_BASE) &&
329 (offset < IO_IDE2_BASE + IO_IDE_EXTENT)) ||
330 (offset == IO_IDE2_MISC)) {
331 /*
332 * SMSC FDC37C93xAPM SuperIO chip
333 *
334 * IDE #2
335 */
336 result = IO_SUPERIO_PHYS + (offset << 1);
337 } else if ((offset >= IO_SERIAL1_BASE) &&
338 (offset < IO_SERIAL1_BASE + IO_SERIAL_EXTENT)) {
339 /*
340 * SMSC FDC37C93xAPM SuperIO chip
341 *
342 * Serial #1
343 */
344 result = IO_SUPERIO_PHYS + (offset << 1);
345 } else if ((offset >= IO_SERIAL2_BASE) &&
346 (offset < IO_SERIAL2_BASE + IO_SERIAL_EXTENT)) {
347 /*
348 * SMSC FDC37C93xAPM SuperIO chip
349 *
350 * Serial #2
351 */
352 result = IO_SUPERIO_PHYS + (offset << 1);
353 } else if ((offset >= IO_ISP1161_BASE) &&
354 (offset < IO_ISP1161_BASE + IO_ISP1161_EXTENT)) {
355 /*
356 * Philips USB ISP1161x chip
357 */
358 result = IO_ISP1161_PHYS + offset - IO_ISP1161_BASE;
359 } else {
360 /*
361 * safe default.
362 */
363 printk("Warning: unexpected port in %s( offset = 0x%lx )\n",
364 __FUNCTION__, offset);
365 result = PVR;
366 }
367
368 return result;
369}
370
diff --git a/arch/sh/boards/superh/microdev/irq.c b/arch/sh/boards/superh/microdev/irq.c
index 1395c1e65da4..efcbd86b7cd2 100644
--- a/arch/sh/boards/superh/microdev/irq.c
+++ b/arch/sh/boards/superh/microdev/irq.c
@@ -15,7 +15,7 @@
15 15
16#include <asm/system.h> 16#include <asm/system.h>
17#include <asm/io.h> 17#include <asm/io.h>
18#include <asm/mach/irq.h> 18#include <asm/microdev.h>
19 19
20#define NUM_EXTERNAL_IRQS 16 /* IRL0 .. IRL15 */ 20#define NUM_EXTERNAL_IRQS 16 /* IRL0 .. IRL15 */
21 21
diff --git a/arch/sh/boards/superh/microdev/setup.c b/arch/sh/boards/superh/microdev/setup.c
index 1c1d65fb12df..892b14d31405 100644
--- a/arch/sh/boards/superh/microdev/setup.c
+++ b/arch/sh/boards/superh/microdev/setup.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com) 4 * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com)
5 * Copyright (C) 2003, 2004 SuperH, Inc. 5 * Copyright (C) 2003, 2004 SuperH, Inc.
6 * Copyright (C) 2004 Paul Mundt 6 * Copyright (C) 2004, 2005 Paul Mundt
7 * 7 *
8 * SuperH SH4-202 MicroDev board support. 8 * SuperH SH4-202 MicroDev board support.
9 * 9 *
@@ -15,11 +15,10 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/ioport.h> 17#include <linux/ioport.h>
18#include <video/s1d13xxxfb.h>
19#include <asm/microdev.h>
18#include <asm/io.h> 20#include <asm/io.h>
19#include <asm/mach/irq.h>
20#include <asm/mach/io.h>
21#include <asm/machvec.h> 21#include <asm/machvec.h>
22#include <asm/machvec_init.h>
23 22
24extern void microdev_heartbeat(void); 23extern void microdev_heartbeat(void);
25 24
@@ -51,8 +50,6 @@ struct sh_machine_vector mv_sh4202_microdev __initmv = {
51 .mv_outsw = microdev_outsw, 50 .mv_outsw = microdev_outsw,
52 .mv_outsl = microdev_outsl, 51 .mv_outsl = microdev_outsl,
53 52
54 .mv_isa_port2addr = microdev_isa_port2addr,
55
56 .mv_init_irq = init_microdev_irq, 53 .mv_init_irq = init_microdev_irq,
57 54
58#ifdef CONFIG_HEARTBEAT 55#ifdef CONFIG_HEARTBEAT
@@ -142,16 +139,161 @@ static struct platform_device smc91x_device = {
142 .resource = smc91x_resources, 139 .resource = smc91x_resources,
143}; 140};
144 141
145static int __init smc91x_setup(void) 142#ifdef CONFIG_FB_S1D13XXX
143static struct s1d13xxxfb_regval s1d13806_initregs[] = {
144 { S1DREG_MISC, 0x00 },
145 { S1DREG_COM_DISP_MODE, 0x00 },
146 { S1DREG_GPIO_CNF0, 0x00 },
147 { S1DREG_GPIO_CNF1, 0x00 },
148 { S1DREG_GPIO_CTL0, 0x00 },
149 { S1DREG_GPIO_CTL1, 0x00 },
150 { S1DREG_CLK_CNF, 0x02 },
151 { S1DREG_LCD_CLK_CNF, 0x01 },
152 { S1DREG_CRT_CLK_CNF, 0x03 },
153 { S1DREG_MPLUG_CLK_CNF, 0x03 },
154 { S1DREG_CPU2MEM_WST_SEL, 0x02 },
155 { S1DREG_SDRAM_REF_RATE, 0x03 },
156 { S1DREG_SDRAM_TC0, 0x00 },
157 { S1DREG_SDRAM_TC1, 0x01 },
158 { S1DREG_MEM_CNF, 0x80 },
159 { S1DREG_PANEL_TYPE, 0x25 },
160 { S1DREG_MOD_RATE, 0x00 },
161 { S1DREG_LCD_DISP_HWIDTH, 0x63 },
162 { S1DREG_LCD_NDISP_HPER, 0x1e },
163 { S1DREG_TFT_FPLINE_START, 0x06 },
164 { S1DREG_TFT_FPLINE_PWIDTH, 0x03 },
165 { S1DREG_LCD_DISP_VHEIGHT0, 0x57 },
166 { S1DREG_LCD_DISP_VHEIGHT1, 0x02 },
167 { S1DREG_LCD_NDISP_VPER, 0x00 },
168 { S1DREG_TFT_FPFRAME_START, 0x0a },
169 { S1DREG_TFT_FPFRAME_PWIDTH, 0x81 },
170 { S1DREG_LCD_DISP_MODE, 0x03 },
171 { S1DREG_LCD_MISC, 0x00 },
172 { S1DREG_LCD_DISP_START0, 0x00 },
173 { S1DREG_LCD_DISP_START1, 0x00 },
174 { S1DREG_LCD_DISP_START2, 0x00 },
175 { S1DREG_LCD_MEM_OFF0, 0x90 },
176 { S1DREG_LCD_MEM_OFF1, 0x01 },
177 { S1DREG_LCD_PIX_PAN, 0x00 },
178 { S1DREG_LCD_DISP_FIFO_HTC, 0x00 },
179 { S1DREG_LCD_DISP_FIFO_LTC, 0x00 },
180 { S1DREG_CRT_DISP_HWIDTH, 0x63 },
181 { S1DREG_CRT_NDISP_HPER, 0x1f },
182 { S1DREG_CRT_HRTC_START, 0x04 },
183 { S1DREG_CRT_HRTC_PWIDTH, 0x8f },
184 { S1DREG_CRT_DISP_VHEIGHT0, 0x57 },
185 { S1DREG_CRT_DISP_VHEIGHT1, 0x02 },
186 { S1DREG_CRT_NDISP_VPER, 0x1b },
187 { S1DREG_CRT_VRTC_START, 0x00 },
188 { S1DREG_CRT_VRTC_PWIDTH, 0x83 },
189 { S1DREG_TV_OUT_CTL, 0x10 },
190 { S1DREG_CRT_DISP_MODE, 0x05 },
191 { S1DREG_CRT_DISP_START0, 0x00 },
192 { S1DREG_CRT_DISP_START1, 0x00 },
193 { S1DREG_CRT_DISP_START2, 0x00 },
194 { S1DREG_CRT_MEM_OFF0, 0x20 },
195 { S1DREG_CRT_MEM_OFF1, 0x03 },
196 { S1DREG_CRT_PIX_PAN, 0x00 },
197 { S1DREG_CRT_DISP_FIFO_HTC, 0x00 },
198 { S1DREG_CRT_DISP_FIFO_LTC, 0x00 },
199 { S1DREG_LCD_CUR_CTL, 0x00 },
200 { S1DREG_LCD_CUR_START, 0x01 },
201 { S1DREG_LCD_CUR_XPOS0, 0x00 },
202 { S1DREG_LCD_CUR_XPOS1, 0x00 },
203 { S1DREG_LCD_CUR_YPOS0, 0x00 },
204 { S1DREG_LCD_CUR_YPOS1, 0x00 },
205 { S1DREG_LCD_CUR_BCTL0, 0x00 },
206 { S1DREG_LCD_CUR_GCTL0, 0x00 },
207 { S1DREG_LCD_CUR_RCTL0, 0x00 },
208 { S1DREG_LCD_CUR_BCTL1, 0x1f },
209 { S1DREG_LCD_CUR_GCTL1, 0x3f },
210 { S1DREG_LCD_CUR_RCTL1, 0x1f },
211 { S1DREG_LCD_CUR_FIFO_HTC, 0x00 },
212 { S1DREG_CRT_CUR_CTL, 0x00 },
213 { S1DREG_CRT_CUR_START, 0x01 },
214 { S1DREG_CRT_CUR_XPOS0, 0x00 },
215 { S1DREG_CRT_CUR_XPOS1, 0x00 },
216 { S1DREG_CRT_CUR_YPOS0, 0x00 },
217 { S1DREG_CRT_CUR_YPOS1, 0x00 },
218 { S1DREG_CRT_CUR_BCTL0, 0x00 },
219 { S1DREG_CRT_CUR_GCTL0, 0x00 },
220 { S1DREG_CRT_CUR_RCTL0, 0x00 },
221 { S1DREG_CRT_CUR_BCTL1, 0x1f },
222 { S1DREG_CRT_CUR_GCTL1, 0x3f },
223 { S1DREG_CRT_CUR_RCTL1, 0x1f },
224 { S1DREG_CRT_CUR_FIFO_HTC, 0x00 },
225 { S1DREG_BBLT_CTL0, 0x00 },
226 { S1DREG_BBLT_CTL1, 0x00 },
227 { S1DREG_BBLT_CC_EXP, 0x00 },
228 { S1DREG_BBLT_OP, 0x00 },
229 { S1DREG_BBLT_SRC_START0, 0x00 },
230 { S1DREG_BBLT_SRC_START1, 0x00 },
231 { S1DREG_BBLT_SRC_START2, 0x00 },
232 { S1DREG_BBLT_DST_START0, 0x00 },
233 { S1DREG_BBLT_DST_START1, 0x00 },
234 { S1DREG_BBLT_DST_START2, 0x00 },
235 { S1DREG_BBLT_MEM_OFF0, 0x00 },
236 { S1DREG_BBLT_MEM_OFF1, 0x00 },
237 { S1DREG_BBLT_WIDTH0, 0x00 },
238 { S1DREG_BBLT_WIDTH1, 0x00 },
239 { S1DREG_BBLT_HEIGHT0, 0x00 },
240 { S1DREG_BBLT_HEIGHT1, 0x00 },
241 { S1DREG_BBLT_BGC0, 0x00 },
242 { S1DREG_BBLT_BGC1, 0x00 },
243 { S1DREG_BBLT_FGC0, 0x00 },
244 { S1DREG_BBLT_FGC1, 0x00 },
245 { S1DREG_LKUP_MODE, 0x00 },
246 { S1DREG_LKUP_ADDR, 0x00 },
247 { S1DREG_PS_CNF, 0x10 },
248 { S1DREG_PS_STATUS, 0x00 },
249 { S1DREG_CPU2MEM_WDOGT, 0x00 },
250 { S1DREG_COM_DISP_MODE, 0x02 },
251};
252
253static struct s1d13xxxfb_pdata s1d13806_platform_data = {
254 .initregs = s1d13806_initregs,
255 .initregssize = ARRAY_SIZE(s1d13806_initregs),
256};
257
258static struct resource s1d13806_resources[] = {
259 [0] = {
260 .start = 0x07200000,
261 .end = 0x07200000 + 0x00200000 - 1,
262 .flags = IORESOURCE_MEM,
263 },
264 [1] = {
265 .start = 0x07000000,
266 .end = 0x07000000 + 0x00200000 - 1,
267 .flags = IORESOURCE_MEM,
268 },
269};
270
271static struct platform_device s1d13806_device = {
272 .name = "s1d13806fb",
273 .id = -1,
274 .num_resources = ARRAY_SIZE(s1d13806_resources),
275 .resource = s1d13806_resources,
276
277 .dev = {
278 .platform_data = &s1d13806_platform_data,
279 },
280};
281#endif
282
283static struct platform_device *microdev_devices[] __initdata = {
284 &smc91x_device,
285#ifdef CONFIG_FB_S1D13XXX
286 &s1d13806_device,
287#endif
288};
289
290static int __init microdev_devices_setup(void)
146{ 291{
147 return platform_device_register(&smc91x_device); 292 return platform_add_devices(microdev_devices, ARRAY_SIZE(microdev_devices));
148} 293}
149 294
150__initcall(smc91x_setup); 295__initcall(microdev_devices_setup);
151 296
152 /*
153 * Initialize the board
154 */
155void __init platform_setup(void) 297void __init platform_setup(void)
156{ 298{
157 int * const fpgaRevisionRegister = (int*)(MICRODEV_FPGA_GP_BASE + 0x8ul); 299 int * const fpgaRevisionRegister = (int*)(MICRODEV_FPGA_GP_BASE + 0x8ul);
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-28 03:29:37 -0400