sh: Titan board support.

Add support for the titan board.

Signed-off-by: Jamie Lenehan <lenehan@twibble.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

3 files changed, 221 insertions, 0 deletions

diff --git a/arch/sh/boards/titan/Makefile b/arch/sh/boards/titan/Makefile
new file mode 100644
index 000000000000..08d753700062
--- /dev/null
+++ b/arch/sh/boards/titan/Makefile
@@ -0,0 +1,5 @@
+#
+# Makefile for the Nimble Microsystems TITAN specific parts of the kernel
+#
+
+obj-y    := setup.o io.o
diff --git a/arch/sh/boards/titan/io.c b/arch/sh/boards/titan/io.c
new file mode 100644
index 000000000000..d66900c99a11
--- /dev/null
+++ b/arch/sh/boards/titan/io.c
@@ -0,0 +1,156 @@
+/*
+ *      I/O routines for Titan
+ */
+
+#include <linux/pci.h>
+#include <asm/machvec.h>
+#include <asm/addrspace.h>
+#include <asm/titan.h>
+#include <asm/io.h>
+#include "../../drivers/pci/pci-sh7751.h"
+
+#define PCIIOBR         (volatile long *)PCI_REG(SH7751_PCIIOBR)
+#define PCIMBR          (volatile long *)PCI_REG(SH7751_PCIMBR)
+#define PCI_IO_AREA     SH7751_PCI_IO_BASE
+#define PCI_MEM_AREA    SH7751_PCI_CONFIG_BASE
+
+#define PCI_IOMAP(adr)  (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
+
+#if defined(CONFIG_PCI)
+#define CHECK_SH7751_PCIIO(port) \
+  ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
+#define CHECK_SH7751_PCIMEMIO(port) \
+  ((port >= PCIBIOS_MIN_MEM) && (port < (PCIBIOS_MIN_MEM + SH7751_PCI_MEM_SIZE)))
+#else
+#define CHECK_SH7751_PCIIO(port) (0)
+#endif
+
+static inline void delay(void)
+{
+        ctrl_inw(0xa0000000);
+}
+
+static inline volatile u16 *port2adr(unsigned int port)
+{
+        maybebadio((unsigned long)port);
+        return (volatile u16*)port;
+}
+
+u8 titan_inb(unsigned long port)
+{
+        if (PXSEG(port))
+                return ctrl_inb(port);
+        else if (CHECK_SH7751_PCIIO(port))
+                return ctrl_inb(PCI_IOMAP(port));
+        return ctrl_inw(port2adr(port)) & 0xff;
+}
+
+u8 titan_inb_p(unsigned long port)
+{
+        u8 v;
+
+        if (PXSEG(port))
+                v = ctrl_inb(port);
+        else if (CHECK_SH7751_PCIIO(port))
+                v = ctrl_inb(PCI_IOMAP(port));
+        else
+                v = ctrl_inw(port2adr(port)) & 0xff;
+        delay();
+        return v;
+}
+
+u16 titan_inw(unsigned long port)
+{
+        if (PXSEG(port))
+                return ctrl_inw(port);
+        else if (CHECK_SH7751_PCIIO(port))
+                return ctrl_inw(PCI_IOMAP(port));
+        else if (port >= 0x2000)
+                return ctrl_inw(port2adr(port));
+        else
+                maybebadio(port);
+        return 0;
+}
+
+u32 titan_inl(unsigned long port)
+{
+        if (PXSEG(port))
+                return ctrl_inl(port);
+        else if (CHECK_SH7751_PCIIO(port))
+                return ctrl_inl(PCI_IOMAP(port));
+        else if (port >= 0x2000)
+                return ctrl_inw(port2adr(port));
+        else
+                maybebadio(port);
+        return 0;
+}
+
+void titan_outb(u8 value, unsigned long port)
+{
+        if (PXSEG(port))
+                ctrl_outb(value, port);
+        else if (CHECK_SH7751_PCIIO(port))
+                ctrl_outb(value, PCI_IOMAP(port));
+        else
+                ctrl_outw(value, port2adr(port));
+}
+
+void titan_outb_p(u8 value, unsigned long port)
+{
+        if (PXSEG(port))
+                ctrl_outb(value, port);
+        else if (CHECK_SH7751_PCIIO(port))
+                ctrl_outb(value, PCI_IOMAP(port));
+        else
+                ctrl_outw(value, port2adr(port));
+        delay();
+}
+
+void titan_outw(u16 value, unsigned long port)
+{
+        if (PXSEG(port))
+                ctrl_outw(value, port);
+        else if (CHECK_SH7751_PCIIO(port))
+                ctrl_outw(value, PCI_IOMAP(port));
+        else if (port >= 0x2000)
+                ctrl_outw(value, port2adr(port));
+        else
+                maybebadio(port);
+}
+
+void titan_outl(u32 value, unsigned long port)
+{
+        if (PXSEG(port))
+                ctrl_outl(value, port);
+        else if (CHECK_SH7751_PCIIO(port))
+                ctrl_outl(value, PCI_IOMAP(port));
+        else
+                maybebadio(port);
+}
+
+void titan_insl(unsigned long port, void *dst, unsigned long count)
+{
+        maybebadio(port);
+}
+
+void titan_outsl(unsigned long port, const void *src, unsigned long count)
+{
+        maybebadio(port);
+}
+
+void *titan_ioremap(unsigned long offset, unsigned long size) {
+        if (CHECK_SH7751_PCIIO(offset) || CHECK_SH7751_PCIMEMIO(offset))
+                return (void *)offset;
+}
+
+void __iomem *titan_ioport_map(unsigned long port, unsigned int size)
+{
+        if (PXSEG(port))
+                return (void __iomem *)port;
+        else if (CHECK_SH7751_PCIIO(port))
+                return (void __iomem *)PCI_IOMAP(port);
+
+        return (void __iomem *)port2adr(port);
+}
+
+EXPORT_SYMBOL(titan_ioremap);
diff --git a/arch/sh/boards/titan/setup.c b/arch/sh/boards/titan/setup.c
new file mode 100644
index 000000000000..6ac5c8d7b3fb
--- /dev/null
+++ b/arch/sh/boards/titan/setup.c
@@ -0,0 +1,60 @@
+/*
+ *      Setup for Titan
+ */
+
+#include <linux/init.h>
+#include <asm/irq.h>
+#include <asm/titan.h>
+#include <asm/io.h>
+
+extern void __init pcibios_init_platform(void);
+
+static void __init init_titan_irq(void)
+{
+        /* enable individual interrupt mode for externals */
+        ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
+
+        make_ipr_irq( TITAN_IRQ_WAN,   IRL0_IPR_ADDR, IRL0_IPR_POS, IRL0_PRIORITY); /* PCIRQ0 */
+        make_ipr_irq( TITAN_IRQ_LAN,   IRL1_IPR_ADDR, IRL1_IPR_POS, IRL1_PRIORITY); /* PCIRQ1 */
+        make_ipr_irq( TITAN_IRQ_MPCIA, IRL2_IPR_ADDR, IRL2_IPR_POS, IRL2_PRIORITY); /* PCIRQ2 */
+        make_ipr_irq( TITAN_IRQ_USB,   IRL3_IPR_ADDR, IRL3_IPR_POS, IRL3_PRIORITY); /* PCIRQ3 */
+}
+
+const char *get_system_type(void)
+{
+        return "Titan";
+}
+
+int __init platform_setup(void)
+{
+        printk("%s Platform Setup\n", get_system_type());
+        return 0;
+}
+
+struct sh_machine_vector mv_titan __initmv = {
+        .mv_nr_irqs =   NR_IRQS,
+
+        .mv_inb =       titan_inb,
+        .mv_inw =       titan_inw,
+        .mv_inl =       titan_inl,
+        .mv_outb =      titan_outb,
+        .mv_outw =      titan_outw,
+        .mv_outl =      titan_outl,
+
+        .mv_inb_p =     titan_inb_p,
+        .mv_inw_p =     titan_inw,
+        .mv_inl_p =     titan_inl,
+        .mv_outb_p =    titan_outb_p,
+        .mv_outw_p =    titan_outw,
+        .mv_outl_p =    titan_outl,
+
+        .mv_insl =      titan_insl,
+        .mv_outsl =     titan_outsl,
+
+        .mv_ioremap =   titan_ioremap,
+        .mv_ioport_map = titan_ioport_map,
+
+        .mv_init_irq =  init_titan_irq,
+        .mv_init_pci =  pcibios_init_platform,
+};
+ALIAS_MV(titan)