diff options
author | Magnus Damm <damm@igel.co.jp> | 2007-06-15 05:56:19 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2007-06-15 05:56:19 -0400 |
commit | 68abdbbb03476a60d932eeba0035dd5069afec38 (patch) | |
tree | de3854f76d6d9aec121c432a3cd276bb756003c9 /arch/sh/boards/shmin/setup.c | |
parent | 50f63f2518ee68bc132d357d2b6fdb7f60ef79e0 (diff) |
sh: rework ipr code
This patch reworks the ipr code by grouping the offset array together
with the ipr_data structure in a new data structure called ipr_desc.
This new structure also contains the name of the controller in struct
irq_chip. The idea behind putting struct irq_chip in there is that we
can use offsetof() to locate the base addresses in the irq_chip
callbacks. This strategy has much in common with the recently merged
intc2 code.
One logic change has been made - the original ipr code enabled the
interrupts by default but with this patch they are all disabled by
default.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/boards/shmin/setup.c')
-rw-r--r-- | arch/sh/boards/shmin/setup.c | 30 |
1 files changed, 23 insertions, 7 deletions
diff --git a/arch/sh/boards/shmin/setup.c b/arch/sh/boards/shmin/setup.c index 9c8bb51eb4bb..dfd124509f42 100644 --- a/arch/sh/boards/shmin/setup.c +++ b/arch/sh/boards/shmin/setup.c | |||
@@ -6,28 +6,44 @@ | |||
6 | * SHMIN Support. | 6 | * SHMIN Support. |
7 | */ | 7 | */ |
8 | #include <linux/init.h> | 8 | #include <linux/init.h> |
9 | #include <linux/irq.h> | ||
9 | #include <asm/machvec.h> | 10 | #include <asm/machvec.h> |
10 | #include <asm/shmin.h> | 11 | #include <asm/shmin.h> |
11 | #include <asm/clock.h> | 12 | #include <asm/clock.h> |
12 | #include <asm/irq.h> | ||
13 | #include <asm/io.h> | 13 | #include <asm/io.h> |
14 | 14 | ||
15 | #define PFC_PHCR 0xa400010eUL | 15 | #define PFC_PHCR 0xa400010eUL |
16 | #define INTC_ICR1 0xa4000010UL | 16 | #define INTC_ICR1 0xa4000010UL |
17 | #define INTC_IPRC 0xa4000016UL | 17 | #define INTC_IPRC 0xa4000016UL |
18 | 18 | ||
19 | static struct ipr_data shmin_ipr_map[] = { | 19 | static struct ipr_data ipr_irq_table[] = { |
20 | { .irq=32, .addr=INTC_IPRC, .shift= 0, .priority=0 }, | 20 | { 32, 0, 0, 0 }, |
21 | { .irq=33, .addr=INTC_IPRC, .shift= 4, .priority=0 }, | 21 | { 33, 0, 4, 0 }, |
22 | { .irq=34, .addr=INTC_IPRC, .shift= 8, .priority=8 }, | 22 | { 34, 0, 8, 8 }, |
23 | { .irq=35, .addr=INTC_IPRC, .shift=12, .priority=0 }, | 23 | { 35, 0, 12, 0 }, |
24 | }; | ||
25 | |||
26 | static unsigned long ipr_offsets[] = { | ||
27 | INTC_IPRC, | ||
28 | }; | ||
29 | |||
30 | static struct ipr_desc ipr_irq_desc = { | ||
31 | .ipr_offsets = ipr_offsets, | ||
32 | .nr_offsets = ARRAY_SIZE(ipr_offsets), | ||
33 | |||
34 | .ipr_data = ipr_irq_table, | ||
35 | .nr_irqs = ARRAY_SIZE(ipr_irq_table), | ||
36 | |||
37 | .chip = { | ||
38 | .name = "IPR-shmin", | ||
39 | }, | ||
24 | }; | 40 | }; |
25 | 41 | ||
26 | static void __init init_shmin_irq(void) | 42 | static void __init init_shmin_irq(void) |
27 | { | 43 | { |
28 | ctrl_outw(0x2a00, PFC_PHCR); // IRQ0-3=IRQ | 44 | ctrl_outw(0x2a00, PFC_PHCR); // IRQ0-3=IRQ |
29 | ctrl_outw(0x0aaa, INTC_ICR1); // IRQ0-3=IRQ-mode,Low-active. | 45 | ctrl_outw(0x0aaa, INTC_ICR1); // IRQ0-3=IRQ-mode,Low-active. |
30 | make_ipr_irq(shmin_ipr_map, ARRAY_SIZE(shmin_ipr_map)); | 46 | register_ipr_controller(&ipr_irq_desc); |
31 | } | 47 | } |
32 | 48 | ||
33 | static void __iomem *shmin_ioport_map(unsigned long port, unsigned int size) | 49 | static void __iomem *shmin_ioport_map(unsigned long port, unsigned int size) |