diff options
author | Paul Mundt <lethal@linux-sh.org> | 2006-09-27 03:43:28 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2006-09-27 03:43:28 -0400 |
commit | 959f85f8a3223c116bbe95dd8a9b207790b5d4d3 (patch) | |
tree | e7da9ccf292f860bfa0ff9cc8b2682cd1d6bad4d /arch/sh/boards/renesas/r7780rp | |
parent | e108b2ca2349f510ce7d7f910eda89f71d710d84 (diff) |
sh: Consolidated SH7751/SH7780 PCI support.
This cleans up quite a lot of the PCI mess that we
currently have, and attempts to consolidate the
duplication in the SH7780 and SH7751 PCI controllers.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/boards/renesas/r7780rp')
-rw-r--r-- | arch/sh/boards/renesas/r7780rp/io.c | 103 |
1 files changed, 33 insertions, 70 deletions
diff --git a/arch/sh/boards/renesas/r7780rp/io.c b/arch/sh/boards/renesas/r7780rp/io.c index f73ca3f0f5a1..db92d6e6ae99 100644 --- a/arch/sh/boards/renesas/r7780rp/io.c +++ b/arch/sh/boards/renesas/r7780rp/io.c | |||
@@ -1,6 +1,4 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/sh/kernel/io_r7780rp.c | ||
3 | * | ||
4 | * Copyright (C) 2001 Ian da Silva, Jeremy Siegel | 2 | * Copyright (C) 2001 Ian da Silva, Jeremy Siegel |
5 | * Based largely on io_se.c. | 3 | * Based largely on io_se.c. |
6 | * | 4 | * |
@@ -10,37 +8,13 @@ | |||
10 | * placeholder code from io_r7780rp.c left in with the | 8 | * placeholder code from io_r7780rp.c left in with the |
11 | * expectation of later SuperIO and PCMCIA access. | 9 | * expectation of later SuperIO and PCMCIA access. |
12 | */ | 10 | */ |
13 | 11 | #include <linux/pci.h> | |
14 | #include <linux/kernel.h> | 12 | #include <linux/kernel.h> |
15 | #include <linux/types.h> | 13 | #include <linux/types.h> |
16 | #include <asm/r7780rp/r7780rp.h> | 14 | #include <asm/r7780rp/r7780rp.h> |
17 | #include <asm/addrspace.h> | 15 | #include <asm/addrspace.h> |
18 | #include <asm/io.h> | 16 | #include <asm/io.h> |
19 | 17 | ||
20 | #include <linux/module.h> | ||
21 | #include <linux/pci.h> | ||
22 | #include "../../../drivers/pci/pci-sh7780.h" | ||
23 | |||
24 | /* | ||
25 | * The 7780 R7780RP-1 uses the built-in PCI controller (PCIC) | ||
26 | * of the 7780 processor, and has a SuperIO accessible via the PCI. | ||
27 | * The board also includes a PCMCIA controller on its memory bus, | ||
28 | * like the other Solution Engine boards. | ||
29 | */ | ||
30 | |||
31 | #define SH7780_PCIIOBR_MASK 0xFFFC0000 /* IO Space Mask */ | ||
32 | #define PCIIOBR (volatile long *)PCI_REG(SH7780_PCIIOBR) | ||
33 | #define PCIMBR (volatile long *)PCI_REG(SH7780_PCIMBR) | ||
34 | #define PCI_IO_AREA SH7780_PCI_IO_BASE | ||
35 | #define PCI_MEM_AREA SH7780_PCI_CONFIG_BASE | ||
36 | |||
37 | #define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7780_PCIIOBR_MASK)) | ||
38 | |||
39 | static inline void delay(void) | ||
40 | { | ||
41 | ctrl_inw(0xa0000000); | ||
42 | } | ||
43 | |||
44 | static inline unsigned long port2adr(unsigned int port) | 18 | static inline unsigned long port2adr(unsigned int port) |
45 | { | 19 | { |
46 | if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6) | 20 | if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6) |
@@ -78,17 +52,6 @@ static inline int shifted_port(unsigned long port) | |||
78 | return 1; | 52 | return 1; |
79 | } | 53 | } |
80 | 54 | ||
81 | /* In case someone configures the kernel w/o PCI support: in that */ | ||
82 | /* scenario, don't ever bother to check for PCI-window addresses */ | ||
83 | |||
84 | /* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */ | ||
85 | #if defined(CONFIG_PCI) | ||
86 | #define CHECK_SH7780_PCIIO(port) \ | ||
87 | ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7780_PCI_IO_SIZE))) | ||
88 | #else | ||
89 | #define CHECK_SH7780_PCIIO(port) (0) | ||
90 | #endif | ||
91 | |||
92 | #if defined(CONFIG_NE2000) || defined(CONFIG_NE2000_MODULE) | 55 | #if defined(CONFIG_NE2000) || defined(CONFIG_NE2000_MODULE) |
93 | #define CHECK_AX88796L_PORT(port) \ | 56 | #define CHECK_AX88796L_PORT(port) \ |
94 | ((port >= AX88796L_IO_BASE) && (port < (AX88796L_IO_BASE+0x20))) | 57 | ((port >= AX88796L_IO_BASE) && (port < (AX88796L_IO_BASE+0x20))) |
@@ -109,8 +72,8 @@ u8 r7780rp_inb(unsigned long port) | |||
109 | return ctrl_inw(port88796l(port, 0)) & 0xff; | 72 | return ctrl_inw(port88796l(port, 0)) & 0xff; |
110 | else if (PXSEG(port)) | 73 | else if (PXSEG(port)) |
111 | return ctrl_inb(port); | 74 | return ctrl_inb(port); |
112 | else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) | 75 | else if (is_pci_ioaddr(port) || shifted_port(port)) |
113 | return ctrl_inb(PCI_IOMAP(port)); | 76 | return ctrl_inb(pci_ioaddr(port)); |
114 | 77 | ||
115 | return ctrl_inw(port2adr(port)) & 0xff; | 78 | return ctrl_inw(port2adr(port)) & 0xff; |
116 | } | 79 | } |
@@ -123,12 +86,12 @@ u8 r7780rp_inb_p(unsigned long port) | |||
123 | v = ctrl_inw(port88796l(port, 0)) & 0xff; | 86 | v = ctrl_inw(port88796l(port, 0)) & 0xff; |
124 | else if (PXSEG(port)) | 87 | else if (PXSEG(port)) |
125 | v = ctrl_inb(port); | 88 | v = ctrl_inb(port); |
126 | else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) | 89 | else if (is_pci_ioaddr(port) || shifted_port(port)) |
127 | v = ctrl_inb(PCI_IOMAP(port)); | 90 | v = ctrl_inb(pci_ioaddr(port)); |
128 | else | 91 | else |
129 | v = ctrl_inw(port2adr(port)) & 0xff; | 92 | v = ctrl_inw(port2adr(port)) & 0xff; |
130 | 93 | ||
131 | delay(); | 94 | ctrl_delay(); |
132 | 95 | ||
133 | return v; | 96 | return v; |
134 | } | 97 | } |
@@ -139,8 +102,8 @@ u16 r7780rp_inw(unsigned long port) | |||
139 | maybebadio(port); | 102 | maybebadio(port); |
140 | else if (PXSEG(port)) | 103 | else if (PXSEG(port)) |
141 | return ctrl_inw(port); | 104 | return ctrl_inw(port); |
142 | else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) | 105 | else if (is_pci_ioaddr(port) || shifted_port(port)) |
143 | return ctrl_inw(PCI_IOMAP(port)); | 106 | return ctrl_inw(pci_ioaddr(port)); |
144 | else | 107 | else |
145 | maybebadio(port); | 108 | maybebadio(port); |
146 | 109 | ||
@@ -153,8 +116,8 @@ u32 r7780rp_inl(unsigned long port) | |||
153 | maybebadio(port); | 116 | maybebadio(port); |
154 | else if (PXSEG(port)) | 117 | else if (PXSEG(port)) |
155 | return ctrl_inl(port); | 118 | return ctrl_inl(port); |
156 | else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) | 119 | else if (is_pci_ioaddr(port) || shifted_port(port)) |
157 | return ctrl_inl(PCI_IOMAP(port)); | 120 | return ctrl_inl(pci_ioaddr(port)); |
158 | else | 121 | else |
159 | maybebadio(port); | 122 | maybebadio(port); |
160 | 123 | ||
@@ -167,8 +130,8 @@ void r7780rp_outb(u8 value, unsigned long port) | |||
167 | ctrl_outw(value, port88796l(port, 0)); | 130 | ctrl_outw(value, port88796l(port, 0)); |
168 | else if (PXSEG(port)) | 131 | else if (PXSEG(port)) |
169 | ctrl_outb(value, port); | 132 | ctrl_outb(value, port); |
170 | else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) | 133 | else if (is_pci_ioaddr(port) || shifted_port(port)) |
171 | ctrl_outb(value, PCI_IOMAP(port)); | 134 | ctrl_outb(value, pci_ioaddr(port)); |
172 | else | 135 | else |
173 | ctrl_outw(value, port2adr(port)); | 136 | ctrl_outw(value, port2adr(port)); |
174 | } | 137 | } |
@@ -179,12 +142,12 @@ void r7780rp_outb_p(u8 value, unsigned long port) | |||
179 | ctrl_outw(value, port88796l(port, 0)); | 142 | ctrl_outw(value, port88796l(port, 0)); |
180 | else if (PXSEG(port)) | 143 | else if (PXSEG(port)) |
181 | ctrl_outb(value, port); | 144 | ctrl_outb(value, port); |
182 | else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) | 145 | else if (is_pci_ioaddr(port) || shifted_port(port)) |
183 | ctrl_outb(value, PCI_IOMAP(port)); | 146 | ctrl_outb(value, pci_ioaddr(port)); |
184 | else | 147 | else |
185 | ctrl_outw(value, port2adr(port)); | 148 | ctrl_outw(value, port2adr(port)); |
186 | 149 | ||
187 | delay(); | 150 | ctrl_delay(); |
188 | } | 151 | } |
189 | 152 | ||
190 | void r7780rp_outw(u16 value, unsigned long port) | 153 | void r7780rp_outw(u16 value, unsigned long port) |
@@ -193,8 +156,8 @@ void r7780rp_outw(u16 value, unsigned long port) | |||
193 | maybebadio(port); | 156 | maybebadio(port); |
194 | else if (PXSEG(port)) | 157 | else if (PXSEG(port)) |
195 | ctrl_outw(value, port); | 158 | ctrl_outw(value, port); |
196 | else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) | 159 | else if (is_pci_ioaddr(port) || shifted_port(port)) |
197 | ctrl_outw(value, PCI_IOMAP(port)); | 160 | ctrl_outw(value, pci_ioaddr(port)); |
198 | else | 161 | else |
199 | maybebadio(port); | 162 | maybebadio(port); |
200 | } | 163 | } |
@@ -205,8 +168,8 @@ void r7780rp_outl(u32 value, unsigned long port) | |||
205 | maybebadio(port); | 168 | maybebadio(port); |
206 | else if (PXSEG(port)) | 169 | else if (PXSEG(port)) |
207 | ctrl_outl(value, port); | 170 | ctrl_outl(value, port); |
208 | else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) | 171 | else if (is_pci_ioaddr(port) || shifted_port(port)) |
209 | ctrl_outl(value, PCI_IOMAP(port)); | 172 | ctrl_outl(value, pci_ioaddr(port)); |
210 | else | 173 | else |
211 | maybebadio(port); | 174 | maybebadio(port); |
212 | } | 175 | } |
@@ -223,8 +186,8 @@ void r7780rp_insb(unsigned long port, void *dst, unsigned long count) | |||
223 | } else if (PXSEG(port)) { | 186 | } else if (PXSEG(port)) { |
224 | while (count--) | 187 | while (count--) |
225 | *buf++ = *(volatile u8 *)port; | 188 | *buf++ = *(volatile u8 *)port; |
226 | } else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) { | 189 | } else if (is_pci_ioaddr(port) || shifted_port(port)) { |
227 | volatile u8 *bp = (volatile u8 *)PCI_IOMAP(port); | 190 | volatile u8 *bp = (volatile u8 *)pci_ioaddr(port); |
228 | 191 | ||
229 | while (count--) | 192 | while (count--) |
230 | *buf++ = *bp; | 193 | *buf++ = *bp; |
@@ -244,8 +207,8 @@ void r7780rp_insw(unsigned long port, void *dst, unsigned long count) | |||
244 | p = (volatile u16 *)port88796l(port, 1); | 207 | p = (volatile u16 *)port88796l(port, 1); |
245 | else if (PXSEG(port)) | 208 | else if (PXSEG(port)) |
246 | p = (volatile u16 *)port; | 209 | p = (volatile u16 *)port; |
247 | else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) | 210 | else if (is_pci_ioaddr(port) || shifted_port(port)) |
248 | p = (volatile u16 *)PCI_IOMAP(port); | 211 | p = (volatile u16 *)pci_ioaddr(port); |
249 | else | 212 | else |
250 | p = (volatile u16 *)port2adr(port); | 213 | p = (volatile u16 *)port2adr(port); |
251 | 214 | ||
@@ -259,8 +222,8 @@ void r7780rp_insl(unsigned long port, void *dst, unsigned long count) | |||
259 | 222 | ||
260 | if (CHECK_AX88796L_PORT(port)) | 223 | if (CHECK_AX88796L_PORT(port)) |
261 | maybebadio(port); | 224 | maybebadio(port); |
262 | else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) { | 225 | else if (is_pci_ioaddr(port) || shifted_port(port)) { |
263 | volatile u32 *p = (volatile u32 *)PCI_IOMAP(port); | 226 | volatile u32 *p = (volatile u32 *)pci_ioaddr(port); |
264 | 227 | ||
265 | while (count--) | 228 | while (count--) |
266 | *buf++ = *p; | 229 | *buf++ = *p; |
@@ -280,8 +243,8 @@ void r7780rp_outsb(unsigned long port, const void *src, unsigned long count) | |||
280 | } else if (PXSEG(port)) | 243 | } else if (PXSEG(port)) |
281 | while (count--) | 244 | while (count--) |
282 | ctrl_outb(*buf++, port); | 245 | ctrl_outb(*buf++, port); |
283 | else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) { | 246 | else if (is_pci_ioaddr(port) || shifted_port(port)) { |
284 | volatile u8 *bp = (volatile u8 *)PCI_IOMAP(port); | 247 | volatile u8 *bp = (volatile u8 *)pci_ioaddr(port); |
285 | 248 | ||
286 | while (count--) | 249 | while (count--) |
287 | *bp = *buf++; | 250 | *bp = *buf++; |
@@ -301,8 +264,8 @@ void r7780rp_outsw(unsigned long port, const void *src, unsigned long count) | |||
301 | p = (volatile u16 *)port88796l(port, 1); | 264 | p = (volatile u16 *)port88796l(port, 1); |
302 | else if (PXSEG(port)) | 265 | else if (PXSEG(port)) |
303 | p = (volatile u16 *)port; | 266 | p = (volatile u16 *)port; |
304 | else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) | 267 | else if (is_pci_ioaddr(port) || shifted_port(port)) |
305 | p = (volatile u16 *)PCI_IOMAP(port); | 268 | p = (volatile u16 *)pci_ioaddr(port); |
306 | else | 269 | else |
307 | p = (volatile u16 *)port2adr(port); | 270 | p = (volatile u16 *)port2adr(port); |
308 | 271 | ||
@@ -316,8 +279,8 @@ void r7780rp_outsl(unsigned long port, const void *src, unsigned long count) | |||
316 | 279 | ||
317 | if (CHECK_AX88796L_PORT(port)) | 280 | if (CHECK_AX88796L_PORT(port)) |
318 | maybebadio(port); | 281 | maybebadio(port); |
319 | else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) { | 282 | else if (is_pci_ioaddr(port) || shifted_port(port)) { |
320 | volatile u32 *p = (volatile u32 *)PCI_IOMAP(port); | 283 | volatile u32 *p = (volatile u32 *)pci_ioaddr(port); |
321 | 284 | ||
322 | while (count--) | 285 | while (count--) |
323 | *p = *buf++; | 286 | *p = *buf++; |
@@ -331,8 +294,8 @@ void __iomem *r7780rp_ioport_map(unsigned long port, unsigned int size) | |||
331 | return (void __iomem *)port88796l(port, size > 1); | 294 | return (void __iomem *)port88796l(port, size > 1); |
332 | else if (PXSEG(port)) | 295 | else if (PXSEG(port)) |
333 | return (void __iomem *)port; | 296 | return (void __iomem *)port; |
334 | else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) | 297 | else if (is_pci_ioaddr(port) || shifted_port(port)) |
335 | return (void __iomem *)PCI_IOMAP(port); | 298 | return (void __iomem *)pci_ioaddr(port); |
336 | 299 | ||
337 | return (void __iomem *)port2adr(port); | 300 | return (void __iomem *)port2adr(port); |
338 | } | 301 | } |