aboutsummaryrefslogtreecommitdiffstats
path: root/arch/sh/boards/mach-se
diff options
context:
space:
mode:
authorPaul Mundt <lethal@linux-sh.org>2008-07-29 08:01:19 -0400
committerPaul Mundt <lethal@linux-sh.org>2008-07-29 08:01:19 -0400
commitda2014a2b080e7f3024a4eb6917d47069ad9620b (patch)
treecfde12c6d4b5baa222966b14a676f107992cf786 /arch/sh/boards/mach-se
parent71b8064e7df5698520d73b4c1566a3dbc98eb9ef (diff)
sh: Shuffle the board directories in to mach groups.
This flattens out the board directories in to individual mach groups, we will use this for getting rid of unneeded directories, simplifying the build system, and becoming more coherent with the refactored arch/sh/include topology. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/boards/mach-se')
-rw-r--r--arch/sh/boards/mach-se/7206/Makefile5
-rw-r--r--arch/sh/boards/mach-se/7206/io.c104
-rw-r--r--arch/sh/boards/mach-se/7206/irq.c146
-rw-r--r--arch/sh/boards/mach-se/7206/setup.c108
-rw-r--r--arch/sh/boards/mach-se/7343/Makefile5
-rw-r--r--arch/sh/boards/mach-se/7343/io.c273
-rw-r--r--arch/sh/boards/mach-se/7343/irq.c80
-rw-r--r--arch/sh/boards/mach-se/7343/setup.c152
-rw-r--r--arch/sh/boards/mach-se/7619/Makefile5
-rw-r--r--arch/sh/boards/mach-se/7619/setup.c21
-rw-r--r--arch/sh/boards/mach-se/770x/Makefile5
-rw-r--r--arch/sh/boards/mach-se/770x/io.c156
-rw-r--r--arch/sh/boards/mach-se/770x/irq.c108
-rw-r--r--arch/sh/boards/mach-se/770x/setup.c222
-rw-r--r--arch/sh/boards/mach-se/7721/Makefile1
-rw-r--r--arch/sh/boards/mach-se/7721/irq.c45
-rw-r--r--arch/sh/boards/mach-se/7721/setup.c99
-rw-r--r--arch/sh/boards/mach-se/7722/Makefile10
-rw-r--r--arch/sh/boards/mach-se/7722/irq.c76
-rw-r--r--arch/sh/boards/mach-se/7722/setup.c194
-rw-r--r--arch/sh/boards/mach-se/7751/Makefile7
-rw-r--r--arch/sh/boards/mach-se/7751/io.c135
-rw-r--r--arch/sh/boards/mach-se/7751/irq.c50
-rw-r--r--arch/sh/boards/mach-se/7751/pci.c147
-rw-r--r--arch/sh/boards/mach-se/7751/setup.c78
-rw-r--r--arch/sh/boards/mach-se/7780/Makefile10
-rw-r--r--arch/sh/boards/mach-se/7780/irq.c46
-rw-r--r--arch/sh/boards/mach-se/7780/setup.c124
28 files changed, 2412 insertions, 0 deletions
diff --git a/arch/sh/boards/mach-se/7206/Makefile b/arch/sh/boards/mach-se/7206/Makefile
new file mode 100644
index 000000000000..63e7ed699f39
--- /dev/null
+++ b/arch/sh/boards/mach-se/7206/Makefile
@@ -0,0 +1,5 @@
1#
2# Makefile for the 7206 SolutionEngine specific parts of the kernel
3#
4
5obj-y := setup.o io.o irq.o
diff --git a/arch/sh/boards/mach-se/7206/io.c b/arch/sh/boards/mach-se/7206/io.c
new file mode 100644
index 000000000000..1308e618e044
--- /dev/null
+++ b/arch/sh/boards/mach-se/7206/io.c
@@ -0,0 +1,104 @@
1/* $Id: io.c,v 1.5 2004/02/22 23:08:43 kkojima Exp $
2 *
3 * linux/arch/sh/boards/se/7206/io.c
4 *
5 * Copyright (C) 2006 Yoshinori Sato
6 *
7 * I/O routine for Hitachi 7206 SolutionEngine.
8 *
9 */
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <asm/io.h>
14#include <asm/se7206.h>
15
16
17static inline void delay(void)
18{
19 ctrl_inw(0x20000000); /* P2 ROM Area */
20}
21
22/* MS7750 requires special versions of in*, out* routines, since
23 PC-like io ports are located at upper half byte of 16-bit word which
24 can be accessed only with 16-bit wide. */
25
26static inline volatile __u16 *
27port2adr(unsigned int port)
28{
29 if (port >= 0x2000 && port < 0x2020)
30 return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
31 else if (port >= 0x300 && port < 0x310)
32 return (volatile __u16 *) (PA_SMSC + (port - 0x300));
33
34 return (volatile __u16 *)port;
35}
36
37unsigned char se7206_inb(unsigned long port)
38{
39 return (*port2adr(port)) & 0xff;
40}
41
42unsigned char se7206_inb_p(unsigned long port)
43{
44 unsigned long v;
45
46 v = (*port2adr(port)) & 0xff;
47 delay();
48 return v;
49}
50
51unsigned short se7206_inw(unsigned long port)
52{
53 return *port2adr(port);;
54}
55
56void se7206_outb(unsigned char value, unsigned long port)
57{
58 *(port2adr(port)) = value;
59}
60
61void se7206_outb_p(unsigned char value, unsigned long port)
62{
63 *(port2adr(port)) = value;
64 delay();
65}
66
67void se7206_outw(unsigned short value, unsigned long port)
68{
69 *port2adr(port) = value;
70}
71
72void se7206_insb(unsigned long port, void *addr, unsigned long count)
73{
74 volatile __u16 *p = port2adr(port);
75 __u8 *ap = addr;
76
77 while (count--)
78 *ap++ = *p;
79}
80
81void se7206_insw(unsigned long port, void *addr, unsigned long count)
82{
83 volatile __u16 *p = port2adr(port);
84 __u16 *ap = addr;
85 while (count--)
86 *ap++ = *p;
87}
88
89void se7206_outsb(unsigned long port, const void *addr, unsigned long count)
90{
91 volatile __u16 *p = port2adr(port);
92 const __u8 *ap = addr;
93
94 while (count--)
95 *p = *ap++;
96}
97
98void se7206_outsw(unsigned long port, const void *addr, unsigned long count)
99{
100 volatile __u16 *p = port2adr(port);
101 const __u16 *ap = addr;
102 while (count--)
103 *p = *ap++;
104}
diff --git a/arch/sh/boards/mach-se/7206/irq.c b/arch/sh/boards/mach-se/7206/irq.c
new file mode 100644
index 000000000000..9d5bfc77d0de
--- /dev/null
+++ b/arch/sh/boards/mach-se/7206/irq.c
@@ -0,0 +1,146 @@
1/*
2 * linux/arch/sh/boards/se/7206/irq.c
3 *
4 * Copyright (C) 2005,2006 Yoshinori Sato
5 *
6 * Hitachi SolutionEngine Support.
7 *
8 */
9#include <linux/init.h>
10#include <linux/irq.h>
11#include <linux/io.h>
12#include <linux/interrupt.h>
13#include <asm/se7206.h>
14
15#define INTSTS0 0x31800000
16#define INTSTS1 0x31800002
17#define INTMSK0 0x31800004
18#define INTMSK1 0x31800006
19#define INTSEL 0x31800008
20
21#define IRQ0_IRQ 64
22#define IRQ1_IRQ 65
23#define IRQ3_IRQ 67
24
25#define INTC_IPR01 0xfffe0818
26#define INTC_ICR1 0xfffe0802
27
28static void disable_se7206_irq(unsigned int irq)
29{
30 unsigned short val;
31 unsigned short mask = 0xffff ^ (0x0f << 4 * (3 - (IRQ0_IRQ - irq)));
32 unsigned short msk0,msk1;
33
34 /* Set the priority in IPR to 0 */
35 val = ctrl_inw(INTC_IPR01);
36 val &= mask;
37 ctrl_outw(val, INTC_IPR01);
38 /* FPGA mask set */
39 msk0 = ctrl_inw(INTMSK0);
40 msk1 = ctrl_inw(INTMSK1);
41
42 switch (irq) {
43 case IRQ0_IRQ:
44 msk0 |= 0x0010;
45 break;
46 case IRQ1_IRQ:
47 msk0 |= 0x000f;
48 break;
49 case IRQ3_IRQ:
50 msk0 |= 0x0f00;
51 msk1 |= 0x00ff;
52 break;
53 }
54 ctrl_outw(msk0, INTMSK0);
55 ctrl_outw(msk1, INTMSK1);
56}
57
58static void enable_se7206_irq(unsigned int irq)
59{
60 unsigned short val;
61 unsigned short value = (0x0001 << 4 * (3 - (IRQ0_IRQ - irq)));
62 unsigned short msk0,msk1;
63
64 /* Set priority in IPR back to original value */
65 val = ctrl_inw(INTC_IPR01);
66 val |= value;
67 ctrl_outw(val, INTC_IPR01);
68
69 /* FPGA mask reset */
70 msk0 = ctrl_inw(INTMSK0);
71 msk1 = ctrl_inw(INTMSK1);
72
73 switch (irq) {
74 case IRQ0_IRQ:
75 msk0 &= ~0x0010;
76 break;
77 case IRQ1_IRQ:
78 msk0 &= ~0x000f;
79 break;
80 case IRQ3_IRQ:
81 msk0 &= ~0x0f00;
82 msk1 &= ~0x00ff;
83 break;
84 }
85 ctrl_outw(msk0, INTMSK0);
86 ctrl_outw(msk1, INTMSK1);
87}
88
89static void eoi_se7206_irq(unsigned int irq)
90{
91 unsigned short sts0,sts1;
92
93 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
94 enable_se7206_irq(irq);
95 /* FPGA isr clear */
96 sts0 = ctrl_inw(INTSTS0);
97 sts1 = ctrl_inw(INTSTS1);
98
99 switch (irq) {
100 case IRQ0_IRQ:
101 sts0 &= ~0x0010;
102 break;
103 case IRQ1_IRQ:
104 sts0 &= ~0x000f;
105 break;
106 case IRQ3_IRQ:
107 sts0 &= ~0x0f00;
108 sts1 &= ~0x00ff;
109 break;
110 }
111 ctrl_outw(sts0, INTSTS0);
112 ctrl_outw(sts1, INTSTS1);
113}
114
115static struct irq_chip se7206_irq_chip __read_mostly = {
116 .name = "SE7206-FPGA",
117 .mask = disable_se7206_irq,
118 .unmask = enable_se7206_irq,
119 .mask_ack = disable_se7206_irq,
120 .eoi = eoi_se7206_irq,
121};
122
123static void make_se7206_irq(unsigned int irq)
124{
125 disable_irq_nosync(irq);
126 set_irq_chip_and_handler_name(irq, &se7206_irq_chip,
127 handle_level_irq, "level");
128 disable_se7206_irq(irq);
129}
130
131/*
132 * Initialize IRQ setting
133 */
134void __init init_se7206_IRQ(void)
135{
136 make_se7206_irq(IRQ0_IRQ); /* SMC91C111 */
137 make_se7206_irq(IRQ1_IRQ); /* ATA */
138 make_se7206_irq(IRQ3_IRQ); /* SLOT / PCM */
139 ctrl_outw(inw(INTC_ICR1) | 0x000b ,INTC_ICR1 ) ; /* ICR1 */
140
141 /* FPGA System register setup*/
142 ctrl_outw(0x0000,INTSTS0); /* Clear INTSTS0 */
143 ctrl_outw(0x0000,INTSTS1); /* Clear INTSTS1 */
144 /* IRQ0=LAN, IRQ1=ATA, IRQ3=SLT,PCM */
145 ctrl_outw(0x0001,INTSEL);
146}
diff --git a/arch/sh/boards/mach-se/7206/setup.c b/arch/sh/boards/mach-se/7206/setup.c
new file mode 100644
index 000000000000..4fe84cc08406
--- /dev/null
+++ b/arch/sh/boards/mach-se/7206/setup.c
@@ -0,0 +1,108 @@
1/*
2 *
3 * linux/arch/sh/boards/se/7206/setup.c
4 *
5 * Copyright (C) 2006 Yoshinori Sato
6 * Copyright (C) 2007 - 2008 Paul Mundt
7 *
8 * Hitachi 7206 SolutionEngine Support.
9 */
10#include <linux/init.h>
11#include <linux/platform_device.h>
12#include <linux/smc91x.h>
13#include <asm/se7206.h>
14#include <asm/io.h>
15#include <asm/machvec.h>
16#include <asm/heartbeat.h>
17
18static struct resource smc91x_resources[] = {
19 [0] = {
20 .name = "smc91x-regs",
21 .start = PA_SMSC + 0x300,
22 .end = PA_SMSC + 0x300 + 0x020 - 1,
23 .flags = IORESOURCE_MEM,
24 },
25 [1] = {
26 .start = 64,
27 .end = 64,
28 .flags = IORESOURCE_IRQ,
29 },
30};
31
32static struct smc91x_platdata smc91x_info = {
33 .flags = SMC91X_USE_16BIT,
34};
35
36static struct platform_device smc91x_device = {
37 .name = "smc91x",
38 .id = -1,
39 .dev = {
40 .dma_mask = NULL,
41 .coherent_dma_mask = 0xffffffff,
42 .platform_data = &smc91x_info,
43 },
44 .num_resources = ARRAY_SIZE(smc91x_resources),
45 .resource = smc91x_resources,
46};
47
48static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
49
50static struct heartbeat_data heartbeat_data = {
51 .bit_pos = heartbeat_bit_pos,
52 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
53 .regsize = 32,
54};
55
56static struct resource heartbeat_resources[] = {
57 [0] = {
58 .start = PA_LED,
59 .end = PA_LED,
60 .flags = IORESOURCE_MEM,
61 },
62};
63
64static struct platform_device heartbeat_device = {
65 .name = "heartbeat",
66 .id = -1,
67 .dev = {
68 .platform_data = &heartbeat_data,
69 },
70 .num_resources = ARRAY_SIZE(heartbeat_resources),
71 .resource = heartbeat_resources,
72};
73
74static struct platform_device *se7206_devices[] __initdata = {
75 &smc91x_device,
76 &heartbeat_device,
77};
78
79static int __init se7206_devices_setup(void)
80{
81 return platform_add_devices(se7206_devices, ARRAY_SIZE(se7206_devices));
82}
83__initcall(se7206_devices_setup);
84
85/*
86 * The Machine Vector
87 */
88
89static struct sh_machine_vector mv_se __initmv = {
90 .mv_name = "SolutionEngine",
91 .mv_nr_irqs = 256,
92 .mv_inb = se7206_inb,
93 .mv_inw = se7206_inw,
94 .mv_outb = se7206_outb,
95 .mv_outw = se7206_outw,
96
97 .mv_inb_p = se7206_inb_p,
98 .mv_inw_p = se7206_inw,
99 .mv_outb_p = se7206_outb_p,
100 .mv_outw_p = se7206_outw,
101
102 .mv_insb = se7206_insb,
103 .mv_insw = se7206_insw,
104 .mv_outsb = se7206_outsb,
105 .mv_outsw = se7206_outsw,
106
107 .mv_init_irq = init_se7206_IRQ,
108};
diff --git a/arch/sh/boards/mach-se/7343/Makefile b/arch/sh/boards/mach-se/7343/Makefile
new file mode 100644
index 000000000000..3024796c6203
--- /dev/null
+++ b/arch/sh/boards/mach-se/7343/Makefile
@@ -0,0 +1,5 @@
1#
2# Makefile for the 7343 SolutionEngine specific parts of the kernel
3#
4
5obj-y := setup.o io.o irq.o
diff --git a/arch/sh/boards/mach-se/7343/io.c b/arch/sh/boards/mach-se/7343/io.c
new file mode 100644
index 000000000000..e2fae32d27d7
--- /dev/null
+++ b/arch/sh/boards/mach-se/7343/io.c
@@ -0,0 +1,273 @@
1/*
2 * arch/sh/boards/se/7343/io.c
3 *
4 * I/O routine for SH-Mobile3AS 7343 SolutionEngine.
5 *
6 */
7#include <linux/kernel.h>
8#include <asm/io.h>
9#include <mach/se7343.h>
10
11#define badio(fn, a) panic("bad i/o operation %s for %08lx.", #fn, a)
12
13struct iop {
14 unsigned long start, end;
15 unsigned long base;
16 struct iop *(*check) (struct iop * p, unsigned long port);
17 unsigned char (*inb) (struct iop * p, unsigned long port);
18 unsigned short (*inw) (struct iop * p, unsigned long port);
19 void (*outb) (struct iop * p, unsigned char value, unsigned long port);
20 void (*outw) (struct iop * p, unsigned short value, unsigned long port);
21};
22
23struct iop *
24simple_check(struct iop *p, unsigned long port)
25{
26 static int count;
27
28 if (count < 100)
29 count++;
30
31 port &= 0xFFFF;
32
33 if ((p->start <= port) && (port <= p->end))
34 return p;
35 else
36 badio(check, port);
37}
38
39struct iop *
40ide_check(struct iop *p, unsigned long port)
41{
42 if (((0x1f0 <= port) && (port <= 0x1f7)) || (port == 0x3f7))
43 return p;
44 return NULL;
45}
46
47unsigned char
48simple_inb(struct iop *p, unsigned long port)
49{
50 return *(unsigned char *) (p->base + port);
51}
52
53unsigned short
54simple_inw(struct iop *p, unsigned long port)
55{
56 return *(unsigned short *) (p->base + port);
57}
58
59void
60simple_outb(struct iop *p, unsigned char value, unsigned long port)
61{
62 *(unsigned char *) (p->base + port) = value;
63}
64
65void
66simple_outw(struct iop *p, unsigned short value, unsigned long port)
67{
68 *(unsigned short *) (p->base + port) = value;
69}
70
71unsigned char
72pcc_inb(struct iop *p, unsigned long port)
73{
74 unsigned long addr = p->base + port + 0x40000;
75 unsigned long v;
76
77 if (port & 1)
78 addr += 0x00400000;
79 v = *(volatile unsigned char *) addr;
80 return v;
81}
82
83void
84pcc_outb(struct iop *p, unsigned char value, unsigned long port)
85{
86 unsigned long addr = p->base + port + 0x40000;
87
88 if (port & 1)
89 addr += 0x00400000;
90 *(volatile unsigned char *) addr = value;
91}
92
93unsigned char
94bad_inb(struct iop *p, unsigned long port)
95{
96 badio(inb, port);
97}
98
99void
100bad_outb(struct iop *p, unsigned char value, unsigned long port)
101{
102 badio(inw, port);
103}
104
105#ifdef CONFIG_SMC91X
106/* MSTLANEX01 LAN at 0xb400:0000 */
107static struct iop laniop = {
108 .start = 0x00,
109 .end = 0x0F,
110 .base = 0x04000000,
111 .check = simple_check,
112 .inb = simple_inb,
113 .inw = simple_inw,
114 .outb = simple_outb,
115 .outw = simple_outw,
116};
117#endif
118
119#ifdef CONFIG_NE2000
120/* NE2000 pc card NIC */
121static struct iop neiop = {
122 .start = 0x280,
123 .end = 0x29f,
124 .base = 0xb0600000 + 0x80, /* soft 0x280 -> hard 0x300 */
125 .check = simple_check,
126 .inb = pcc_inb,
127 .inw = simple_inw,
128 .outb = pcc_outb,
129 .outw = simple_outw,
130};
131#endif
132
133#ifdef CONFIG_IDE
134/* CF in CF slot */
135static struct iop cfiop = {
136 .base = 0xb0600000,
137 .check = ide_check,
138 .inb = pcc_inb,
139 .inw = simple_inw,
140 .outb = pcc_outb,
141 .outw = simple_outw,
142};
143#endif
144
145static __inline__ struct iop *
146port2iop(unsigned long port)
147{
148 if (0) ;
149#if defined(CONFIG_SMC91X)
150 else if (laniop.check(&laniop, port))
151 return &laniop;
152#endif
153#if defined(CONFIG_NE2000)
154 else if (neiop.check(&neiop, port))
155 return &neiop;
156#endif
157#if defined(CONFIG_IDE)
158 else if (cfiop.check(&cfiop, port))
159 return &cfiop;
160#endif
161 else
162 return NULL;
163}
164
165static inline void
166delay(void)
167{
168 ctrl_inw(0xac000000);
169 ctrl_inw(0xac000000);
170}
171
172unsigned char
173sh7343se_inb(unsigned long port)
174{
175 struct iop *p = port2iop(port);
176 return (p->inb) (p, port);
177}
178
179unsigned char
180sh7343se_inb_p(unsigned long port)
181{
182 unsigned char v = sh7343se_inb(port);
183 delay();
184 return v;
185}
186
187unsigned short
188sh7343se_inw(unsigned long port)
189{
190 struct iop *p = port2iop(port);
191 return (p->inw) (p, port);
192}
193
194unsigned int
195sh7343se_inl(unsigned long port)
196{
197 badio(inl, port);
198}
199
200void
201sh7343se_outb(unsigned char value, unsigned long port)
202{
203 struct iop *p = port2iop(port);
204 (p->outb) (p, value, port);
205}
206
207void
208sh7343se_outb_p(unsigned char value, unsigned long port)
209{
210 sh7343se_outb(value, port);
211 delay();
212}
213
214void
215sh7343se_outw(unsigned short value, unsigned long port)
216{
217 struct iop *p = port2iop(port);
218 (p->outw) (p, value, port);
219}
220
221void
222sh7343se_outl(unsigned int value, unsigned long port)
223{
224 badio(outl, port);
225}
226
227void
228sh7343se_insb(unsigned long port, void *addr, unsigned long count)
229{
230 unsigned char *a = addr;
231 struct iop *p = port2iop(port);
232 while (count--)
233 *a++ = (p->inb) (p, port);
234}
235
236void
237sh7343se_insw(unsigned long port, void *addr, unsigned long count)
238{
239 unsigned short *a = addr;
240 struct iop *p = port2iop(port);
241 while (count--)
242 *a++ = (p->inw) (p, port);
243}
244
245void
246sh7343se_insl(unsigned long port, void *addr, unsigned long count)
247{
248 badio(insl, port);
249}
250
251void
252sh7343se_outsb(unsigned long port, const void *addr, unsigned long count)
253{
254 unsigned char *a = (unsigned char *) addr;
255 struct iop *p = port2iop(port);
256 while (count--)
257 (p->outb) (p, *a++, port);
258}
259
260void
261sh7343se_outsw(unsigned long port, const void *addr, unsigned long count)
262{
263 unsigned short *a = (unsigned short *) addr;
264 struct iop *p = port2iop(port);
265 while (count--)
266 (p->outw) (p, *a++, port);
267}
268
269void
270sh7343se_outsl(unsigned long port, const void *addr, unsigned long count)
271{
272 badio(outsw, port);
273}
diff --git a/arch/sh/boards/mach-se/7343/irq.c b/arch/sh/boards/mach-se/7343/irq.c
new file mode 100644
index 000000000000..1112e86aa93a
--- /dev/null
+++ b/arch/sh/boards/mach-se/7343/irq.c
@@ -0,0 +1,80 @@
1/*
2 * linux/arch/sh/boards/se/7343/irq.c
3 *
4 * Copyright (C) 2008 Yoshihiro Shimoda
5 *
6 * Based on linux/arch/sh/boards/se/7722/irq.c
7 * Copyright (C) 2007 Nobuhiro Iwamatsu
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 */
13#include <linux/init.h>
14#include <linux/irq.h>
15#include <linux/interrupt.h>
16#include <asm/irq.h>
17#include <asm/io.h>
18#include <asm/se7343.h>
19
20static void disable_se7343_irq(unsigned int irq)
21{
22 unsigned int bit = irq - SE7343_FPGA_IRQ_BASE;
23 ctrl_outw(ctrl_inw(PA_CPLD_IMSK) | 1 << bit, PA_CPLD_IMSK);
24}
25
26static void enable_se7343_irq(unsigned int irq)
27{
28 unsigned int bit = irq - SE7343_FPGA_IRQ_BASE;
29 ctrl_outw(ctrl_inw(PA_CPLD_IMSK) & ~(1 << bit), PA_CPLD_IMSK);
30}
31
32static struct irq_chip se7343_irq_chip __read_mostly = {
33 .name = "SE7343-FPGA",
34 .mask = disable_se7343_irq,
35 .unmask = enable_se7343_irq,
36 .mask_ack = disable_se7343_irq,
37};
38
39static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc)
40{
41 unsigned short intv = ctrl_inw(PA_CPLD_ST);
42 struct irq_desc *ext_desc;
43 unsigned int ext_irq = SE7343_FPGA_IRQ_BASE;
44
45 intv &= (1 << SE7343_FPGA_IRQ_NR) - 1;
46
47 while (intv) {
48 if (intv & 1) {
49 ext_desc = irq_desc + ext_irq;
50 handle_level_irq(ext_irq, ext_desc);
51 }
52 intv >>= 1;
53 ext_irq++;
54 }
55}
56
57/*
58 * Initialize IRQ setting
59 */
60void __init init_7343se_IRQ(void)
61{
62 int i;
63
64 ctrl_outw(0, PA_CPLD_IMSK); /* disable all irqs */
65 ctrl_outw(0x2000, 0xb03fffec); /* mrshpc irq enable */
66
67 for (i = 0; i < SE7343_FPGA_IRQ_NR; i++)
68 set_irq_chip_and_handler_name(SE7343_FPGA_IRQ_BASE + i,
69 &se7343_irq_chip,
70 handle_level_irq, "level");
71
72 set_irq_chained_handler(IRQ0_IRQ, se7343_irq_demux);
73 set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
74 set_irq_chained_handler(IRQ1_IRQ, se7343_irq_demux);
75 set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW);
76 set_irq_chained_handler(IRQ4_IRQ, se7343_irq_demux);
77 set_irq_type(IRQ4_IRQ, IRQ_TYPE_LEVEL_LOW);
78 set_irq_chained_handler(IRQ5_IRQ, se7343_irq_demux);
79 set_irq_type(IRQ5_IRQ, IRQ_TYPE_LEVEL_LOW);
80}
diff --git a/arch/sh/boards/mach-se/7343/setup.c b/arch/sh/boards/mach-se/7343/setup.c
new file mode 100644
index 000000000000..59dc92e20f64
--- /dev/null
+++ b/arch/sh/boards/mach-se/7343/setup.c
@@ -0,0 +1,152 @@
1#include <linux/init.h>
2#include <linux/platform_device.h>
3#include <linux/mtd/physmap.h>
4#include <machvec.h>
5#include <mach/se7343.h>
6#include <asm/heartbeat.h>
7#include <asm/irq.h>
8#include <asm/io.h>
9
10static struct resource smc91x_resources[] = {
11 [0] = {
12 .start = 0x10000000,
13 .end = 0x1000000F,
14 .flags = IORESOURCE_MEM,
15 },
16 [1] = {
17 /*
18 * shared with other devices via externel
19 * interrupt controller in FPGA...
20 */
21 .start = SMC_IRQ,
22 .end = SMC_IRQ,
23 .flags = IORESOURCE_IRQ,
24 },
25};
26
27static struct platform_device smc91x_device = {
28 .name = "smc91x",
29 .id = 0,
30 .num_resources = ARRAY_SIZE(smc91x_resources),
31 .resource = smc91x_resources,
32};
33
34static struct resource heartbeat_resources[] = {
35 [0] = {
36 .start = PA_LED,
37 .end = PA_LED,
38 .flags = IORESOURCE_MEM,
39 },
40};
41
42static struct heartbeat_data heartbeat_data = {
43 .regsize = 16,
44};
45
46static struct platform_device heartbeat_device = {
47 .name = "heartbeat",
48 .id = -1,
49 .dev = {
50 .platform_data = &heartbeat_data,
51 },
52 .num_resources = ARRAY_SIZE(heartbeat_resources),
53 .resource = heartbeat_resources,
54};
55
56static struct mtd_partition nor_flash_partitions[] = {
57 {
58 .name = "loader",
59 .offset = 0x00000000,
60 .size = 128 * 1024,
61 },
62 {
63 .name = "rootfs",
64 .offset = MTDPART_OFS_APPEND,
65 .size = 31 * 1024 * 1024,
66 },
67 {
68 .name = "data",
69 .offset = MTDPART_OFS_APPEND,
70 .size = MTDPART_SIZ_FULL,
71 },
72};
73
74static struct physmap_flash_data nor_flash_data = {
75 .width = 2,
76 .parts = nor_flash_partitions,
77 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
78};
79
80static struct resource nor_flash_resources[] = {
81 [0] = {
82 .start = 0x00000000,
83 .end = 0x01ffffff,
84 .flags = IORESOURCE_MEM,
85 }
86};
87
88static struct platform_device nor_flash_device = {
89 .name = "physmap-flash",
90 .dev = {
91 .platform_data = &nor_flash_data,
92 },
93 .num_resources = ARRAY_SIZE(nor_flash_resources),
94 .resource = nor_flash_resources,
95};
96
97static struct platform_device *sh7343se_platform_devices[] __initdata = {
98 &smc91x_device,
99 &heartbeat_device,
100 &nor_flash_device,
101};
102
103static int __init sh7343se_devices_setup(void)
104{
105 return platform_add_devices(sh7343se_platform_devices,
106 ARRAY_SIZE(sh7343se_platform_devices));
107}
108device_initcall(sh7343se_devices_setup);
109
110/*
111 * Initialize the board
112 */
113static void __init sh7343se_setup(char **cmdline_p)
114{
115 ctrl_outw(0xf900, FPGA_OUT); /* FPGA */
116
117 ctrl_outw(0x0002, PORT_PECR); /* PORT E 1 = IRQ5 */
118 ctrl_outw(0x0020, PORT_PSELD);
119
120 printk(KERN_INFO "MS7343CP01 Setup...done\n");
121}
122
123/*
124 * The Machine Vector
125 */
126static struct sh_machine_vector mv_7343se __initmv = {
127 .mv_name = "SolutionEngine 7343",
128 .mv_setup = sh7343se_setup,
129 .mv_nr_irqs = 108,
130 .mv_inb = sh7343se_inb,
131 .mv_inw = sh7343se_inw,
132 .mv_inl = sh7343se_inl,
133 .mv_outb = sh7343se_outb,
134 .mv_outw = sh7343se_outw,
135 .mv_outl = sh7343se_outl,
136
137 .mv_inb_p = sh7343se_inb_p,
138 .mv_inw_p = sh7343se_inw,
139 .mv_inl_p = sh7343se_inl,
140 .mv_outb_p = sh7343se_outb_p,
141 .mv_outw_p = sh7343se_outw,
142 .mv_outl_p = sh7343se_outl,
143
144 .mv_insb = sh7343se_insb,
145 .mv_insw = sh7343se_insw,
146 .mv_insl = sh7343se_insl,
147 .mv_outsb = sh7343se_outsb,
148 .mv_outsw = sh7343se_outsw,
149 .mv_outsl = sh7343se_outsl,
150
151 .mv_init_irq = init_7343se_IRQ,
152};
diff --git a/arch/sh/boards/mach-se/7619/Makefile b/arch/sh/boards/mach-se/7619/Makefile
new file mode 100644
index 000000000000..d21775c28cda
--- /dev/null
+++ b/arch/sh/boards/mach-se/7619/Makefile
@@ -0,0 +1,5 @@
1#
2# Makefile for the 7619 SolutionEngine specific parts of the kernel
3#
4
5obj-y := setup.o
diff --git a/arch/sh/boards/mach-se/7619/setup.c b/arch/sh/boards/mach-se/7619/setup.c
new file mode 100644
index 000000000000..1d0ef7faa10d
--- /dev/null
+++ b/arch/sh/boards/mach-se/7619/setup.c
@@ -0,0 +1,21 @@
1/*
2 * arch/sh/boards/se/7619/setup.c
3 *
4 * Copyright (C) 2006 Yoshinori Sato
5 *
6 * Hitachi SH7619 SolutionEngine Support.
7 */
8
9#include <linux/init.h>
10#include <linux/platform_device.h>
11#include <asm/io.h>
12#include <asm/machvec.h>
13
14/*
15 * The Machine Vector
16 */
17
18static struct sh_machine_vector mv_se __initmv = {
19 .mv_name = "SolutionEngine",
20 .mv_nr_irqs = 108,
21};
diff --git a/arch/sh/boards/mach-se/770x/Makefile b/arch/sh/boards/mach-se/770x/Makefile
new file mode 100644
index 000000000000..8e624b06d5ea
--- /dev/null
+++ b/arch/sh/boards/mach-se/770x/Makefile
@@ -0,0 +1,5 @@
1#
2# Makefile for the 770x SolutionEngine specific parts of the kernel
3#
4
5obj-y := setup.o io.o irq.o
diff --git a/arch/sh/boards/mach-se/770x/io.c b/arch/sh/boards/mach-se/770x/io.c
new file mode 100644
index 000000000000..b1ec085b8673
--- /dev/null
+++ b/arch/sh/boards/mach-se/770x/io.c
@@ -0,0 +1,156 @@
1/*
2 * Copyright (C) 2000 Kazumoto Kojima
3 *
4 * I/O routine for Hitachi SolutionEngine.
5 */
6#include <linux/kernel.h>
7#include <linux/types.h>
8#include <asm/io.h>
9#include <asm/se.h>
10
11/* MS7750 requires special versions of in*, out* routines, since
12 PC-like io ports are located at upper half byte of 16-bit word which
13 can be accessed only with 16-bit wide. */
14
15static inline volatile __u16 *
16port2adr(unsigned int port)
17{
18 if (port & 0xff000000)
19 return ( volatile __u16 *) port;
20 if (port >= 0x2000)
21 return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
22 else if (port >= 0x1000)
23 return (volatile __u16 *) (PA_83902 + (port << 1));
24 else
25 return (volatile __u16 *) (PA_SUPERIO + (port << 1));
26}
27
28static inline int
29shifted_port(unsigned long port)
30{
31 /* For IDE registers, value is not shifted */
32 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
33 return 0;
34 else
35 return 1;
36}
37
38unsigned char se_inb(unsigned long port)
39{
40 if (shifted_port(port))
41 return (*port2adr(port) >> 8);
42 else
43 return (*port2adr(port))&0xff;
44}
45
46unsigned char se_inb_p(unsigned long port)
47{
48 unsigned long v;
49
50 if (shifted_port(port))
51 v = (*port2adr(port) >> 8);
52 else
53 v = (*port2adr(port))&0xff;
54 ctrl_delay();
55 return v;
56}
57
58unsigned short se_inw(unsigned long port)
59{
60 if (port >= 0x2000)
61 return *port2adr(port);
62 else
63 maybebadio(port);
64 return 0;
65}
66
67unsigned int se_inl(unsigned long port)
68{
69 maybebadio(port);
70 return 0;
71}
72
73void se_outb(unsigned char value, unsigned long port)
74{
75 if (shifted_port(port))
76 *(port2adr(port)) = value << 8;
77 else
78 *(port2adr(port)) = value;
79}
80
81void se_outb_p(unsigned char value, unsigned long port)
82{
83 if (shifted_port(port))
84 *(port2adr(port)) = value << 8;
85 else
86 *(port2adr(port)) = value;
87 ctrl_delay();
88}
89
90void se_outw(unsigned short value, unsigned long port)
91{
92 if (port >= 0x2000)
93 *port2adr(port) = value;
94 else
95 maybebadio(port);
96}
97
98void se_outl(unsigned int value, unsigned long port)
99{
100 maybebadio(port);
101}
102
103void se_insb(unsigned long port, void *addr, unsigned long count)
104{
105 volatile __u16 *p = port2adr(port);
106 __u8 *ap = addr;
107
108 if (shifted_port(port)) {
109 while (count--)
110 *ap++ = *p >> 8;
111 } else {
112 while (count--)
113 *ap++ = *p;
114 }
115}
116
117void se_insw(unsigned long port, void *addr, unsigned long count)
118{
119 volatile __u16 *p = port2adr(port);
120 __u16 *ap = addr;
121 while (count--)
122 *ap++ = *p;
123}
124
125void se_insl(unsigned long port, void *addr, unsigned long count)
126{
127 maybebadio(port);
128}
129
130void se_outsb(unsigned long port, const void *addr, unsigned long count)
131{
132 volatile __u16 *p = port2adr(port);
133 const __u8 *ap = addr;
134
135 if (shifted_port(port)) {
136 while (count--)
137 *p = *ap++ << 8;
138 } else {
139 while (count--)
140 *p = *ap++;
141 }
142}
143
144void se_outsw(unsigned long port, const void *addr, unsigned long count)
145{
146 volatile __u16 *p = port2adr(port);
147 const __u16 *ap = addr;
148
149 while (count--)
150 *p = *ap++;
151}
152
153void se_outsl(unsigned long port, const void *addr, unsigned long count)
154{
155 maybebadio(port);
156}
diff --git a/arch/sh/boards/mach-se/770x/irq.c b/arch/sh/boards/mach-se/770x/irq.c
new file mode 100644
index 000000000000..cdb0807928a5
--- /dev/null
+++ b/arch/sh/boards/mach-se/770x/irq.c
@@ -0,0 +1,108 @@
1/*
2 * linux/arch/sh/boards/se/770x/irq.c
3 *
4 * Copyright (C) 2000 Kazumoto Kojima
5 * Copyright (C) 2006 Nobuhiro Iwamatsu
6 *
7 * Hitachi SolutionEngine Support.
8 *
9 */
10
11#include <linux/init.h>
12#include <linux/interrupt.h>
13#include <linux/irq.h>
14#include <asm/irq.h>
15#include <asm/io.h>
16#include <asm/se.h>
17
18static struct ipr_data ipr_irq_table[] = {
19 /*
20 * Super I/O (Just mimic PC):
21 * 1: keyboard
22 * 3: serial 0
23 * 4: serial 1
24 * 5: printer
25 * 6: floppy
26 * 8: rtc
27 * 12: mouse
28 * 14: ide0
29 */
30#if defined(CONFIG_CPU_SUBTYPE_SH7705)
31 /* This is default value */
32 { 13, 0, 8, 0x0f-13, },
33 { 5 , 0, 4, 0x0f- 5, },
34 { 10, 1, 0, 0x0f-10, },
35 { 7 , 2, 4, 0x0f- 7, },
36 { 3 , 2, 0, 0x0f- 3, },
37 { 1 , 3, 12, 0x0f- 1, },
38 { 12, 3, 4, 0x0f-12, }, /* LAN */
39 { 2 , 4, 8, 0x0f- 2, }, /* PCIRQ2 */
40 { 6 , 4, 4, 0x0f- 6, }, /* PCIRQ1 */
41 { 14, 4, 0, 0x0f-14, }, /* PCIRQ0 */
42 { 0 , 5, 12, 0x0f , },
43 { 4 , 5, 4, 0x0f- 4, },
44 { 8 , 6, 12, 0x0f- 8, },
45 { 9 , 6, 8, 0x0f- 9, },
46 { 11, 6, 4, 0x0f-11, },
47#else
48 { 14, 0, 8, 0x0f-14, },
49 { 12, 0, 4, 0x0f-12, },
50 { 8, 1, 4, 0x0f- 8, },
51 { 6, 2, 12, 0x0f- 6, },
52 { 5, 2, 8, 0x0f- 5, },
53 { 4, 2, 4, 0x0f- 4, },
54 { 3, 2, 0, 0x0f- 3, },
55 { 1, 3, 12, 0x0f- 1, },
56#if defined(CONFIG_STNIC)
57 /* ST NIC */
58 { 10, 3, 4, 0x0f-10, }, /* LAN */
59#endif
60 /* MRSHPC IRQs setting */
61 { 0, 4, 12, 0x0f- 0, }, /* PCIRQ3 */
62 { 11, 4, 8, 0x0f-11, }, /* PCIRQ2 */
63 { 9, 4, 4, 0x0f- 9, }, /* PCIRQ1 */
64 { 7, 4, 0, 0x0f- 7, }, /* PCIRQ0 */
65 /* #2, #13 are allocated for SLOT IRQ #1 and #2 (for now) */
66 /* NOTE: #2 and #13 are not used on PC */
67 { 13, 6, 4, 0x0f-13, }, /* SLOTIRQ2 */
68 { 2, 6, 0, 0x0f- 2, }, /* SLOTIRQ1 */
69#endif
70};
71
72static unsigned long ipr_offsets[] = {
73 BCR_ILCRA,
74 BCR_ILCRB,
75 BCR_ILCRC,
76 BCR_ILCRD,
77 BCR_ILCRE,
78 BCR_ILCRF,
79 BCR_ILCRG,
80};
81
82static struct ipr_desc ipr_irq_desc = {
83 .ipr_offsets = ipr_offsets,
84 .nr_offsets = ARRAY_SIZE(ipr_offsets),
85
86 .ipr_data = ipr_irq_table,
87 .nr_irqs = ARRAY_SIZE(ipr_irq_table),
88 .chip = {
89 .name = "IPR-se770x",
90 },
91};
92
93/*
94 * Initialize IRQ setting
95 */
96void __init init_se_IRQ(void)
97{
98 /* Disable all interrupts */
99 ctrl_outw(0, BCR_ILCRA);
100 ctrl_outw(0, BCR_ILCRB);
101 ctrl_outw(0, BCR_ILCRC);
102 ctrl_outw(0, BCR_ILCRD);
103 ctrl_outw(0, BCR_ILCRE);
104 ctrl_outw(0, BCR_ILCRF);
105 ctrl_outw(0, BCR_ILCRG);
106
107 register_ipr_controller(&ipr_irq_desc);
108}
diff --git a/arch/sh/boards/mach-se/770x/setup.c b/arch/sh/boards/mach-se/770x/setup.c
new file mode 100644
index 000000000000..6c64d774da3a
--- /dev/null
+++ b/arch/sh/boards/mach-se/770x/setup.c
@@ -0,0 +1,222 @@
1/*
2 * linux/arch/sh/boards/se/770x/setup.c
3 *
4 * Copyright (C) 2000 Kazumoto Kojima
5 *
6 * Hitachi SolutionEngine Support.
7 *
8 */
9#include <linux/init.h>
10#include <linux/platform_device.h>
11#include <asm/machvec.h>
12#include <asm/se.h>
13#include <asm/io.h>
14#include <asm/smc37c93x.h>
15#include <asm/heartbeat.h>
16
17/*
18 * Configure the Super I/O chip
19 */
20static void __init smsc_config(int index, int data)
21{
22 outb_p(index, INDEX_PORT);
23 outb_p(data, DATA_PORT);
24}
25
26/* XXX: Another candidate for a more generic cchip machine vector */
27static void __init smsc_setup(char **cmdline_p)
28{
29 outb_p(CONFIG_ENTER, CONFIG_PORT);
30 outb_p(CONFIG_ENTER, CONFIG_PORT);
31
32 /* FDC */
33 smsc_config(CURRENT_LDN_INDEX, LDN_FDC);
34 smsc_config(ACTIVATE_INDEX, 0x01);
35 smsc_config(IRQ_SELECT_INDEX, 6); /* IRQ6 */
36
37 /* AUXIO (GPIO): to use IDE1 */
38 smsc_config(CURRENT_LDN_INDEX, LDN_AUXIO);
39 smsc_config(GPIO46_INDEX, 0x00); /* nIOROP */
40 smsc_config(GPIO47_INDEX, 0x00); /* nIOWOP */
41
42 /* COM1 */
43 smsc_config(CURRENT_LDN_INDEX, LDN_COM1);
44 smsc_config(ACTIVATE_INDEX, 0x01);
45 smsc_config(IO_BASE_HI_INDEX, 0x03);
46 smsc_config(IO_BASE_LO_INDEX, 0xf8);
47 smsc_config(IRQ_SELECT_INDEX, 4); /* IRQ4 */
48
49 /* COM2 */
50 smsc_config(CURRENT_LDN_INDEX, LDN_COM2);
51 smsc_config(ACTIVATE_INDEX, 0x01);
52 smsc_config(IO_BASE_HI_INDEX, 0x02);
53 smsc_config(IO_BASE_LO_INDEX, 0xf8);
54 smsc_config(IRQ_SELECT_INDEX, 3); /* IRQ3 */
55
56 /* RTC */
57 smsc_config(CURRENT_LDN_INDEX, LDN_RTC);
58 smsc_config(ACTIVATE_INDEX, 0x01);
59 smsc_config(IRQ_SELECT_INDEX, 8); /* IRQ8 */
60
61 /* XXX: PARPORT, KBD, and MOUSE will come here... */
62 outb_p(CONFIG_EXIT, CONFIG_PORT);
63}
64
65
66static struct resource cf_ide_resources[] = {
67 [0] = {
68 .start = PA_MRSHPC_IO + 0x1f0,
69 .end = PA_MRSHPC_IO + 0x1f0 + 8,
70 .flags = IORESOURCE_MEM,
71 },
72 [1] = {
73 .start = PA_MRSHPC_IO + 0x1f0 + 0x206,
74 .end = PA_MRSHPC_IO + 0x1f0 + 8 + 0x206 + 8,
75 .flags = IORESOURCE_MEM,
76 },
77 [2] = {
78 .start = IRQ_CFCARD,
79 .flags = IORESOURCE_IRQ,
80 },
81};
82
83static struct platform_device cf_ide_device = {
84 .name = "pata_platform",
85 .id = -1,
86 .num_resources = ARRAY_SIZE(cf_ide_resources),
87 .resource = cf_ide_resources,
88};
89
90static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
91
92static struct heartbeat_data heartbeat_data = {
93 .bit_pos = heartbeat_bit_pos,
94 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
95 .regsize = 16,
96};
97
98static struct resource heartbeat_resources[] = {
99 [0] = {
100 .start = PA_LED,
101 .end = PA_LED,
102 .flags = IORESOURCE_MEM,
103 },
104};
105
106static struct platform_device heartbeat_device = {
107 .name = "heartbeat",
108 .id = -1,
109 .dev = {
110 .platform_data = &heartbeat_data,
111 },
112 .num_resources = ARRAY_SIZE(heartbeat_resources),
113 .resource = heartbeat_resources,
114};
115
116#if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\
117 defined(CONFIG_CPU_SUBTYPE_SH7712)
118/* SH771X Ethernet driver */
119static struct resource sh_eth0_resources[] = {
120 [0] = {
121 .start = SH_ETH0_BASE,
122 .end = SH_ETH0_BASE + 0x1B8,
123 .flags = IORESOURCE_MEM,
124 },
125 [1] = {
126 .start = SH_ETH0_IRQ,
127 .end = SH_ETH0_IRQ,
128 .flags = IORESOURCE_IRQ,
129 },
130};
131
132static struct platform_device sh_eth0_device = {
133 .name = "sh-eth",
134 .id = 0,
135 .dev = {
136 .platform_data = PHY_ID,
137 },
138 .num_resources = ARRAY_SIZE(sh_eth0_resources),
139 .resource = sh_eth0_resources,
140};
141
142static struct resource sh_eth1_resources[] = {
143 [0] = {
144 .start = SH_ETH1_BASE,
145 .end = SH_ETH1_BASE + 0x1B8,
146 .flags = IORESOURCE_MEM,
147 },
148 [1] = {
149 .start = SH_ETH1_IRQ,
150 .end = SH_ETH1_IRQ,
151 .flags = IORESOURCE_IRQ,
152 },
153};
154
155static struct platform_device sh_eth1_device = {
156 .name = "sh-eth",
157 .id = 1,
158 .dev = {
159 .platform_data = PHY_ID,
160 },
161 .num_resources = ARRAY_SIZE(sh_eth1_resources),
162 .resource = sh_eth1_resources,
163};
164#endif
165
166static struct platform_device *se_devices[] __initdata = {
167 &heartbeat_device,
168 &cf_ide_device,
169#if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\
170 defined(CONFIG_CPU_SUBTYPE_SH7712)
171 &sh_eth0_device,
172 &sh_eth1_device,
173#endif
174};
175
176static int __init se_devices_setup(void)
177{
178 return platform_add_devices(se_devices, ARRAY_SIZE(se_devices));
179}
180device_initcall(se_devices_setup);
181
182/*
183 * The Machine Vector
184 */
185static struct sh_machine_vector mv_se __initmv = {
186 .mv_name = "SolutionEngine",
187 .mv_setup = smsc_setup,
188#if defined(CONFIG_CPU_SH4)
189 .mv_nr_irqs = 48,
190#elif defined(CONFIG_CPU_SUBTYPE_SH7708)
191 .mv_nr_irqs = 32,
192#elif defined(CONFIG_CPU_SUBTYPE_SH7709)
193 .mv_nr_irqs = 61,
194#elif defined(CONFIG_CPU_SUBTYPE_SH7705)
195 .mv_nr_irqs = 86,
196#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
197 .mv_nr_irqs = 104,
198#endif
199
200 .mv_inb = se_inb,
201 .mv_inw = se_inw,
202 .mv_inl = se_inl,
203 .mv_outb = se_outb,
204 .mv_outw = se_outw,
205 .mv_outl = se_outl,
206
207 .mv_inb_p = se_inb_p,
208 .mv_inw_p = se_inw,
209 .mv_inl_p = se_inl,
210 .mv_outb_p = se_outb_p,
211 .mv_outw_p = se_outw,
212 .mv_outl_p = se_outl,
213
214 .mv_insb = se_insb,
215 .mv_insw = se_insw,
216 .mv_insl = se_insl,
217 .mv_outsb = se_outsb,
218 .mv_outsw = se_outsw,
219 .mv_outsl = se_outsl,
220
221 .mv_init_irq = init_se_IRQ,
222};
diff --git a/arch/sh/boards/mach-se/7721/Makefile b/arch/sh/boards/mach-se/7721/Makefile
new file mode 100644
index 000000000000..7f09030980b3
--- /dev/null
+++ b/arch/sh/boards/mach-se/7721/Makefile
@@ -0,0 +1 @@
obj-y := setup.o irq.o
diff --git a/arch/sh/boards/mach-se/7721/irq.c b/arch/sh/boards/mach-se/7721/irq.c
new file mode 100644
index 000000000000..c4fdd622bf8b
--- /dev/null
+++ b/arch/sh/boards/mach-se/7721/irq.c
@@ -0,0 +1,45 @@
1/*
2 * linux/arch/sh/boards/se/7721/irq.c
3 *
4 * Copyright (C) 2008 Renesas Solutions Corp.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/init.h>
11#include <linux/irq.h>
12#include <linux/interrupt.h>
13#include <linux/io.h>
14#include <asm/se7721.h>
15
16enum {
17 UNUSED = 0,
18
19 /* board specific interrupt sources */
20 MRSHPC,
21};
22
23static struct intc_vect vectors[] __initdata = {
24 INTC_IRQ(MRSHPC, MRSHPC_IRQ0),
25};
26
27static struct intc_prio_reg prio_registers[] __initdata = {
28 { FPGA_ILSR6, 0, 8, 4, /* IRLMSK */
29 { 0, MRSHPC } },
30};
31
32static DECLARE_INTC_DESC(intc_desc, "SE7721", vectors,
33 NULL, NULL, prio_registers, NULL);
34
35/*
36 * Initialize IRQ setting
37 */
38void __init init_se7721_IRQ(void)
39{
40 /* PPCR */
41 ctrl_outw(ctrl_inw(0xa4050118) & ~0x00ff, 0xa4050118);
42
43 register_intc_controller(&intc_desc);
44 intc_set_priority(MRSHPC_IRQ0, 0xf - MRSHPC_IRQ0);
45}
diff --git a/arch/sh/boards/mach-se/7721/setup.c b/arch/sh/boards/mach-se/7721/setup.c
new file mode 100644
index 000000000000..1be3e92752f7
--- /dev/null
+++ b/arch/sh/boards/mach-se/7721/setup.c
@@ -0,0 +1,99 @@
1/*
2 * linux/arch/sh/boards/se/7721/setup.c
3 *
4 * Copyright (C) 2008 Renesas Solutions Corp.
5 *
6 * Hitachi UL SolutionEngine 7721 Support.
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 *
12 */
13#include <linux/init.h>
14#include <linux/platform_device.h>
15#include <asm/machvec.h>
16#include <asm/se7721.h>
17#include <asm/io.h>
18#include <asm/heartbeat.h>
19
20static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
21
22static struct heartbeat_data heartbeat_data = {
23 .bit_pos = heartbeat_bit_pos,
24 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
25 .regsize = 16,
26};
27
28static struct resource heartbeat_resources[] = {
29 [0] = {
30 .start = PA_LED,
31 .end = PA_LED,
32 .flags = IORESOURCE_MEM,
33 },
34};
35
36static struct platform_device heartbeat_device = {
37 .name = "heartbeat",
38 .id = -1,
39 .dev = {
40 .platform_data = &heartbeat_data,
41 },
42 .num_resources = ARRAY_SIZE(heartbeat_resources),
43 .resource = heartbeat_resources,
44};
45
46static struct resource cf_ide_resources[] = {
47 [0] = {
48 .start = PA_MRSHPC_IO + 0x1f0,
49 .end = PA_MRSHPC_IO + 0x1f0 + 8 ,
50 .flags = IORESOURCE_IO,
51 },
52 [1] = {
53 .start = PA_MRSHPC_IO + 0x1f0 + 0x206,
54 .end = PA_MRSHPC_IO + 0x1f0 + 8 + 0x206 + 8,
55 .flags = IORESOURCE_IO,
56 },
57 [2] = {
58 .start = MRSHPC_IRQ0,
59 .flags = IORESOURCE_IRQ,
60 },
61};
62
63static struct platform_device cf_ide_device = {
64 .name = "pata_platform",
65 .id = -1,
66 .num_resources = ARRAY_SIZE(cf_ide_resources),
67 .resource = cf_ide_resources,
68};
69
70static struct platform_device *se7721_devices[] __initdata = {
71 &cf_ide_device,
72 &heartbeat_device
73};
74
75static int __init se7721_devices_setup(void)
76{
77 return platform_add_devices(se7721_devices,
78 ARRAY_SIZE(se7721_devices));
79}
80device_initcall(se7721_devices_setup);
81
82static void __init se7721_setup(char **cmdline_p)
83{
84 /* for USB */
85 ctrl_outw(0x0000, 0xA405010C); /* PGCR */
86 ctrl_outw(0x0000, 0xA405010E); /* PHCR */
87 ctrl_outw(0x00AA, 0xA4050118); /* PPCR */
88 ctrl_outw(0x0000, 0xA4050124); /* PSELA */
89}
90
91/*
92 * The Machine Vector
93 */
94struct sh_machine_vector mv_se7721 __initmv = {
95 .mv_name = "Solution Engine 7721",
96 .mv_setup = se7721_setup,
97 .mv_nr_irqs = 109,
98 .mv_init_irq = init_se7721_IRQ,
99};
diff --git a/arch/sh/boards/mach-se/7722/Makefile b/arch/sh/boards/mach-se/7722/Makefile
new file mode 100644
index 000000000000..8694373389e5
--- /dev/null
+++ b/arch/sh/boards/mach-se/7722/Makefile
@@ -0,0 +1,10 @@
1#
2# Makefile for the HITACHI UL SolutionEngine 7722 specific parts of the kernel
3#
4# This file is subject to the terms and conditions of the GNU General Public
5# License. See the file "COPYING" in the main directory of this archive
6# for more details.
7#
8#
9
10obj-y := setup.o irq.o
diff --git a/arch/sh/boards/mach-se/7722/irq.c b/arch/sh/boards/mach-se/7722/irq.c
new file mode 100644
index 000000000000..0b03f3f610b8
--- /dev/null
+++ b/arch/sh/boards/mach-se/7722/irq.c
@@ -0,0 +1,76 @@
1/*
2 * linux/arch/sh/boards/se/7722/irq.c
3 *
4 * Copyright (C) 2007 Nobuhiro Iwamatsu
5 *
6 * Hitachi UL SolutionEngine 7722 Support.
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/init.h>
13#include <linux/irq.h>
14#include <linux/interrupt.h>
15#include <asm/irq.h>
16#include <asm/io.h>
17#include <asm/se7722.h>
18
19static void disable_se7722_irq(unsigned int irq)
20{
21 unsigned int bit = irq - SE7722_FPGA_IRQ_BASE;
22 ctrl_outw(ctrl_inw(IRQ01_MASK) | 1 << bit, IRQ01_MASK);
23}
24
25static void enable_se7722_irq(unsigned int irq)
26{
27 unsigned int bit = irq - SE7722_FPGA_IRQ_BASE;
28 ctrl_outw(ctrl_inw(IRQ01_MASK) & ~(1 << bit), IRQ01_MASK);
29}
30
31static struct irq_chip se7722_irq_chip __read_mostly = {
32 .name = "SE7722-FPGA",
33 .mask = disable_se7722_irq,
34 .unmask = enable_se7722_irq,
35 .mask_ack = disable_se7722_irq,
36};
37
38static void se7722_irq_demux(unsigned int irq, struct irq_desc *desc)
39{
40 unsigned short intv = ctrl_inw(IRQ01_STS);
41 struct irq_desc *ext_desc;
42 unsigned int ext_irq = SE7722_FPGA_IRQ_BASE;
43
44 intv &= (1 << SE7722_FPGA_IRQ_NR) - 1;
45
46 while (intv) {
47 if (intv & 1) {
48 ext_desc = irq_desc + ext_irq;
49 handle_level_irq(ext_irq, ext_desc);
50 }
51 intv >>= 1;
52 ext_irq++;
53 }
54}
55
56/*
57 * Initialize IRQ setting
58 */
59void __init init_se7722_IRQ(void)
60{
61 int i;
62
63 ctrl_outw(0, IRQ01_MASK); /* disable all irqs */
64 ctrl_outw(0x2000, 0xb03fffec); /* mrshpc irq enable */
65
66 for (i = 0; i < SE7722_FPGA_IRQ_NR; i++)
67 set_irq_chip_and_handler_name(SE7722_FPGA_IRQ_BASE + i,
68 &se7722_irq_chip,
69 handle_level_irq, "level");
70
71 set_irq_chained_handler(IRQ0_IRQ, se7722_irq_demux);
72 set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
73
74 set_irq_chained_handler(IRQ1_IRQ, se7722_irq_demux);
75 set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW);
76}
diff --git a/arch/sh/boards/mach-se/7722/setup.c b/arch/sh/boards/mach-se/7722/setup.c
new file mode 100644
index 000000000000..6e228ea59788
--- /dev/null
+++ b/arch/sh/boards/mach-se/7722/setup.c
@@ -0,0 +1,194 @@
1/*
2 * linux/arch/sh/boards/se/7722/setup.c
3 *
4 * Copyright (C) 2007 Nobuhiro Iwamatsu
5 *
6 * Hitachi UL SolutionEngine 7722 Support.
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 *
12 */
13#include <linux/init.h>
14#include <linux/platform_device.h>
15#include <linux/ata_platform.h>
16#include <linux/input.h>
17#include <linux/smc91x.h>
18#include <asm/machvec.h>
19#include <asm/clock.h>
20#include <asm/se7722.h>
21#include <asm/io.h>
22#include <asm/heartbeat.h>
23#include <asm/sh_keysc.h>
24
25/* Heartbeat */
26static struct heartbeat_data heartbeat_data = {
27 .regsize = 16,
28};
29
30static struct resource heartbeat_resources[] = {
31 [0] = {
32 .start = PA_LED,
33 .end = PA_LED,
34 .flags = IORESOURCE_MEM,
35 },
36};
37
38static struct platform_device heartbeat_device = {
39 .name = "heartbeat",
40 .id = -1,
41 .dev = {
42 .platform_data = &heartbeat_data,
43 },
44 .num_resources = ARRAY_SIZE(heartbeat_resources),
45 .resource = heartbeat_resources,
46};
47
48/* SMC91x */
49static struct smc91x_platdata smc91x_info = {
50 .flags = SMC91X_USE_16BIT,
51};
52
53static struct resource smc91x_eth_resources[] = {
54 [0] = {
55 .name = "smc91x-regs" ,
56 .start = PA_LAN + 0x300,
57 .end = PA_LAN + 0x300 + 0x10 ,
58 .flags = IORESOURCE_MEM,
59 },
60 [1] = {
61 .start = SMC_IRQ,
62 .end = SMC_IRQ,
63 .flags = IORESOURCE_IRQ,
64 },
65};
66
67static struct platform_device smc91x_eth_device = {
68 .name = "smc91x",
69 .id = 0,
70 .dev = {
71 .dma_mask = NULL, /* don't use dma */
72 .coherent_dma_mask = 0xffffffff,
73 .platform_data = &smc91x_info,
74 },
75 .num_resources = ARRAY_SIZE(smc91x_eth_resources),
76 .resource = smc91x_eth_resources,
77};
78
79static struct resource cf_ide_resources[] = {
80 [0] = {
81 .start = PA_MRSHPC_IO + 0x1f0,
82 .end = PA_MRSHPC_IO + 0x1f0 + 8 ,
83 .flags = IORESOURCE_IO,
84 },
85 [1] = {
86 .start = PA_MRSHPC_IO + 0x1f0 + 0x206,
87 .end = PA_MRSHPC_IO + 0x1f0 +8 + 0x206 + 8,
88 .flags = IORESOURCE_IO,
89 },
90 [2] = {
91 .start = MRSHPC_IRQ0,
92 .end = MRSHPC_IRQ0,
93 .flags = IORESOURCE_IRQ,
94 },
95};
96
97static struct platform_device cf_ide_device = {
98 .name = "pata_platform",
99 .id = -1,
100 .num_resources = ARRAY_SIZE(cf_ide_resources),
101 .resource = cf_ide_resources,
102};
103
104static struct sh_keysc_info sh_keysc_info = {
105 .mode = SH_KEYSC_MODE_1, /* KEYOUT0->5, KEYIN0->4 */
106 .scan_timing = 3,
107 .delay = 5,
108 .keycodes = { /* SW1 -> SW30 */
109 KEY_A, KEY_B, KEY_C, KEY_D, KEY_E,
110 KEY_F, KEY_G, KEY_H, KEY_I, KEY_J,
111 KEY_K, KEY_L, KEY_M, KEY_N, KEY_O,
112 KEY_P, KEY_Q, KEY_R, KEY_S, KEY_T,
113 KEY_U, KEY_V, KEY_W, KEY_X, KEY_Y,
114 KEY_Z,
115 KEY_HOME, KEY_SLEEP, KEY_WAKEUP, KEY_COFFEE, /* life */
116 },
117};
118
119static struct resource sh_keysc_resources[] = {
120 [0] = {
121 .start = 0x044b0000,
122 .end = 0x044b000f,
123 .flags = IORESOURCE_MEM,
124 },
125 [1] = {
126 .start = 79,
127 .flags = IORESOURCE_IRQ,
128 },
129};
130
131static struct platform_device sh_keysc_device = {
132 .name = "sh_keysc",
133 .num_resources = ARRAY_SIZE(sh_keysc_resources),
134 .resource = sh_keysc_resources,
135 .dev = {
136 .platform_data = &sh_keysc_info,
137 },
138};
139
140static struct platform_device *se7722_devices[] __initdata = {
141 &heartbeat_device,
142 &smc91x_eth_device,
143 &cf_ide_device,
144 &sh_keysc_device,
145};
146
147static int __init se7722_devices_setup(void)
148{
149 clk_always_enable("mstp214"); /* KEYSC */
150
151 return platform_add_devices(se7722_devices,
152 ARRAY_SIZE(se7722_devices));
153}
154device_initcall(se7722_devices_setup);
155
156static void __init se7722_setup(char **cmdline_p)
157{
158 ctrl_outw(0x010D, FPGA_OUT); /* FPGA */
159
160 ctrl_outw(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */
161 ctrl_outw(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */
162
163 /* LCDC I/O */
164 ctrl_outw(0x0020, PORT_PSELD);
165
166 /* SIOF1*/
167 ctrl_outw(0x0003, PORT_PSELB);
168 ctrl_outw(0xe000, PORT_PSELC);
169 ctrl_outw(0x0000, PORT_PKCR);
170
171 /* LCDC */
172 ctrl_outw(0x4020, PORT_PHCR);
173 ctrl_outw(0x0000, PORT_PLCR);
174 ctrl_outw(0x0000, PORT_PMCR);
175 ctrl_outw(0x0002, PORT_PRCR);
176 ctrl_outw(0x0000, PORT_PXCR); /* LCDC,CS6A */
177
178 /* KEYSC */
179 ctrl_outw(0x0A10, PORT_PSELA); /* BS,SHHID2 */
180 ctrl_outw(0x0000, PORT_PYCR);
181 ctrl_outw(0x0000, PORT_PZCR);
182 ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
183 ctrl_outw(ctrl_inw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
184}
185
186/*
187 * The Machine Vector
188 */
189static struct sh_machine_vector mv_se7722 __initmv = {
190 .mv_name = "Solution Engine 7722" ,
191 .mv_setup = se7722_setup ,
192 .mv_nr_irqs = SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_NR,
193 .mv_init_irq = init_se7722_IRQ,
194};
diff --git a/arch/sh/boards/mach-se/7751/Makefile b/arch/sh/boards/mach-se/7751/Makefile
new file mode 100644
index 000000000000..dbc29f3a9de5
--- /dev/null
+++ b/arch/sh/boards/mach-se/7751/Makefile
@@ -0,0 +1,7 @@
1#
2# Makefile for the 7751 SolutionEngine specific parts of the kernel
3#
4
5obj-y := setup.o io.o irq.o
6
7obj-$(CONFIG_PCI) += pci.o
diff --git a/arch/sh/boards/mach-se/7751/io.c b/arch/sh/boards/mach-se/7751/io.c
new file mode 100644
index 000000000000..e8d846cec89d
--- /dev/null
+++ b/arch/sh/boards/mach-se/7751/io.c
@@ -0,0 +1,135 @@
1/*
2 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
3 * Based largely on io_se.c.
4 *
5 * I/O routine for Hitachi 7751 SolutionEngine.
6 *
7 * Initial version only to support LAN access; some
8 * placeholder code from io_se.c left in with the
9 * expectation of later SuperIO and PCMCIA access.
10 */
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/pci.h>
14#include <asm/io.h>
15#include <asm/se7751.h>
16#include <asm/addrspace.h>
17
18static inline volatile u16 *port2adr(unsigned int port)
19{
20 if (port >= 0x2000)
21 return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
22 maybebadio((unsigned long)port);
23 return (volatile __u16*)port;
24}
25
26/*
27 * General outline: remap really low stuff [eventually] to SuperIO,
28 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
29 * is mapped through the PCI IO window. Stuff with high bits (PXSEG)
30 * should be way beyond the window, and is used w/o translation for
31 * compatibility.
32 */
33unsigned char sh7751se_inb(unsigned long port)
34{
35 if (PXSEG(port))
36 return *(volatile unsigned char *)port;
37 else if (is_pci_ioaddr(port))
38 return *(volatile unsigned char *)pci_ioaddr(port);
39 else
40 return (*port2adr(port)) & 0xff;
41}
42
43unsigned char sh7751se_inb_p(unsigned long port)
44{
45 unsigned char v;
46
47 if (PXSEG(port))
48 v = *(volatile unsigned char *)port;
49 else if (is_pci_ioaddr(port))
50 v = *(volatile unsigned char *)pci_ioaddr(port);
51 else
52 v = (*port2adr(port)) & 0xff;
53 ctrl_delay();
54 return v;
55}
56
57unsigned short sh7751se_inw(unsigned long port)
58{
59 if (PXSEG(port))
60 return *(volatile unsigned short *)port;
61 else if (is_pci_ioaddr(port))
62 return *(volatile unsigned short *)pci_ioaddr(port);
63 else if (port >= 0x2000)
64 return *port2adr(port);
65 else
66 maybebadio(port);
67 return 0;
68}
69
70unsigned int sh7751se_inl(unsigned long port)
71{
72 if (PXSEG(port))
73 return *(volatile unsigned long *)port;
74 else if (is_pci_ioaddr(port))
75 return *(volatile unsigned int *)pci_ioaddr(port);
76 else if (port >= 0x2000)
77 return *port2adr(port);
78 else
79 maybebadio(port);
80 return 0;
81}
82
83void sh7751se_outb(unsigned char value, unsigned long port)
84{
85
86 if (PXSEG(port))
87 *(volatile unsigned char *)port = value;
88 else if (is_pci_ioaddr(port))
89 *((unsigned char*)pci_ioaddr(port)) = value;
90 else
91 *(port2adr(port)) = value;
92}
93
94void sh7751se_outb_p(unsigned char value, unsigned long port)
95{
96 if (PXSEG(port))
97 *(volatile unsigned char *)port = value;
98 else if (is_pci_ioaddr(port))
99 *((unsigned char*)pci_ioaddr(port)) = value;
100 else
101 *(port2adr(port)) = value;
102 ctrl_delay();
103}
104
105void sh7751se_outw(unsigned short value, unsigned long port)
106{
107 if (PXSEG(port))
108 *(volatile unsigned short *)port = value;
109 else if (is_pci_ioaddr(port))
110 *((unsigned short *)pci_ioaddr(port)) = value;
111 else if (port >= 0x2000)
112 *port2adr(port) = value;
113 else
114 maybebadio(port);
115}
116
117void sh7751se_outl(unsigned int value, unsigned long port)
118{
119 if (PXSEG(port))
120 *(volatile unsigned long *)port = value;
121 else if (is_pci_ioaddr(port))
122 *((unsigned long*)pci_ioaddr(port)) = value;
123 else
124 maybebadio(port);
125}
126
127void sh7751se_insl(unsigned long port, void *addr, unsigned long count)
128{
129 maybebadio(port);
130}
131
132void sh7751se_outsl(unsigned long port, const void *addr, unsigned long count)
133{
134 maybebadio(port);
135}
diff --git a/arch/sh/boards/mach-se/7751/irq.c b/arch/sh/boards/mach-se/7751/irq.c
new file mode 100644
index 000000000000..c3d12590e5db
--- /dev/null
+++ b/arch/sh/boards/mach-se/7751/irq.c
@@ -0,0 +1,50 @@
1/*
2 * linux/arch/sh/boards/se/7751/irq.c
3 *
4 * Copyright (C) 2000 Kazumoto Kojima
5 *
6 * Hitachi SolutionEngine Support.
7 *
8 * Modified for 7751 Solution Engine by
9 * Ian da Silva and Jeremy Siegel, 2001.
10 */
11
12#include <linux/init.h>
13#include <linux/irq.h>
14#include <asm/irq.h>
15#include <asm/se7751.h>
16
17static struct ipr_data ipr_irq_table[] = {
18 { 13, 3, 3, 2 },
19 /* Add additional entries here as drivers are added and tested. */
20};
21
22static unsigned long ipr_offsets[] = {
23 BCR_ILCRA,
24 BCR_ILCRB,
25 BCR_ILCRC,
26 BCR_ILCRD,
27 BCR_ILCRE,
28 BCR_ILCRF,
29 BCR_ILCRG,
30};
31
32static struct ipr_desc ipr_irq_desc = {
33 .ipr_offsets = ipr_offsets,
34 .nr_offsets = ARRAY_SIZE(ipr_offsets),
35
36 .ipr_data = ipr_irq_table,
37 .nr_irqs = ARRAY_SIZE(ipr_irq_table),
38
39 .chip = {
40 .name = "IPR-se7751",
41 },
42};
43
44/*
45 * Initialize IRQ setting
46 */
47void __init init_7751se_IRQ(void)
48{
49 register_ipr_controller(&ipr_irq_desc);
50}
diff --git a/arch/sh/boards/mach-se/7751/pci.c b/arch/sh/boards/mach-se/7751/pci.c
new file mode 100644
index 000000000000..203b2923fe7f
--- /dev/null
+++ b/arch/sh/boards/mach-se/7751/pci.c
@@ -0,0 +1,147 @@
1/*
2 * linux/arch/sh/boards/se/7751/pci.c
3 *
4 * Author: Ian DaSilva (idasilva@mvista.com)
5 *
6 * Highly leveraged from pci-bigsur.c, written by Dustin McIntire.
7 *
8 * May be copied or modified under the terms of the GNU General Public
9 * License. See linux/COPYING for more information.
10 *
11 * PCI initialization for the Hitachi SH7751 Solution Engine board (MS7751SE01)
12 */
13
14#include <linux/kernel.h>
15#include <linux/types.h>
16#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/pci.h>
19
20#include <asm/io.h>
21#include "../../../drivers/pci/pci-sh7751.h"
22
23#define PCIMCR_MRSET_OFF 0xBFFFFFFF
24#define PCIMCR_RFSH_OFF 0xFFFFFFFB
25
26/*
27 * Only long word accesses of the PCIC's internal local registers and the
28 * configuration registers from the CPU is supported.
29 */
30#define PCIC_WRITE(x,v) writel((v), PCI_REG(x))
31#define PCIC_READ(x) readl(PCI_REG(x))
32
33/*
34 * Description: This function sets up and initializes the pcic, sets
35 * up the BARS, maps the DRAM into the address space etc, etc.
36 */
37int __init pcibios_init_platform(void)
38{
39 unsigned long bcr1, wcr1, wcr2, wcr3, mcr;
40 unsigned short bcr2;
41
42 /*
43 * Initialize the slave bus controller on the pcic. The values used
44 * here should not be hardcoded, but they should be taken from the bsc
45 * on the processor, to make this function as generic as possible.
46 * (i.e. Another sbc may usr different SDRAM timing settings -- in order
47 * for the pcic to work, its settings need to be exactly the same.)
48 */
49 bcr1 = (*(volatile unsigned long*)(SH7751_BCR1));
50 bcr2 = (*(volatile unsigned short*)(SH7751_BCR2));
51 wcr1 = (*(volatile unsigned long*)(SH7751_WCR1));
52 wcr2 = (*(volatile unsigned long*)(SH7751_WCR2));
53 wcr3 = (*(volatile unsigned long*)(SH7751_WCR3));
54 mcr = (*(volatile unsigned long*)(SH7751_MCR));
55
56 bcr1 = bcr1 | 0x00080000; /* Enable Bit 19, BREQEN */
57 (*(volatile unsigned long*)(SH7751_BCR1)) = bcr1;
58
59 bcr1 = bcr1 | 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
60 PCIC_WRITE(SH7751_PCIBCR1, bcr1); /* PCIC BCR1 */
61 PCIC_WRITE(SH7751_PCIBCR2, bcr2); /* PCIC BCR2 */
62 PCIC_WRITE(SH7751_PCIWCR1, wcr1); /* PCIC WCR1 */
63 PCIC_WRITE(SH7751_PCIWCR2, wcr2); /* PCIC WCR2 */
64 PCIC_WRITE(SH7751_PCIWCR3, wcr3); /* PCIC WCR3 */
65 mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
66 PCIC_WRITE(SH7751_PCIMCR, mcr); /* PCIC MCR */
67
68
69 /* Enable all interrupts, so we know what to fix */
70 PCIC_WRITE(SH7751_PCIINTM, 0x0000c3ff);
71 PCIC_WRITE(SH7751_PCIAINTM, 0x0000380f);
72
73 /* Set up standard PCI config registers */
74 PCIC_WRITE(SH7751_PCICONF1, 0xF39000C7); /* Bus Master, Mem & I/O access */
75 PCIC_WRITE(SH7751_PCICONF2, 0x00000000); /* PCI Class code & Revision ID */
76 PCIC_WRITE(SH7751_PCICONF4, 0xab000001); /* PCI I/O address (local regs) */
77 PCIC_WRITE(SH7751_PCICONF5, 0x0c000000); /* PCI MEM address (local RAM) */
78 PCIC_WRITE(SH7751_PCICONF6, 0xd0000000); /* PCI MEM address (unused) */
79 PCIC_WRITE(SH7751_PCICONF11, 0x35051054); /* PCI Subsystem ID & Vendor ID */
80 PCIC_WRITE(SH7751_PCILSR0, 0x03f00000); /* MEM (full 64M exposed) */
81 PCIC_WRITE(SH7751_PCILSR1, 0x00000000); /* MEM (unused) */
82 PCIC_WRITE(SH7751_PCILAR0, 0x0c000000); /* MEM (direct map from PCI) */
83 PCIC_WRITE(SH7751_PCILAR1, 0x00000000); /* MEM (unused) */
84
85 /* Now turn it on... */
86 PCIC_WRITE(SH7751_PCICR, 0xa5000001);
87
88 /*
89 * Set PCIMBR and PCIIOBR here, assuming a single window
90 * (16M MEM, 256K IO) is enough. If a larger space is
91 * needed, the readx/writex and inx/outx functions will
92 * have to do more (e.g. setting registers for each call).
93 */
94
95 /*
96 * Set the MBR so PCI address is one-to-one with window,
97 * meaning all calls go straight through... use BUG_ON to
98 * catch erroneous assumption.
99 */
100 BUG_ON(PCIBIOS_MIN_MEM != SH7751_PCI_MEMORY_BASE);
101
102 PCIC_WRITE(SH7751_PCIMBR, PCIBIOS_MIN_MEM);
103
104 /* Set IOBR for window containing area specified in pci.h */
105 PCIC_WRITE(SH7751_PCIIOBR, (PCIBIOS_MIN_IO & SH7751_PCIIOBR_MASK));
106
107 /* All done, may as well say so... */
108 printk("SH7751 PCI: Finished initialization of the PCI controller\n");
109
110 return 1;
111}
112
113int __init pcibios_map_platform_irq(u8 slot, u8 pin)
114{
115 switch (slot) {
116 case 0: return 13;
117 case 1: return 13; /* AMD Ethernet controller */
118 case 2: return -1;
119 case 3: return -1;
120 case 4: return -1;
121 default:
122 printk("PCI: Bad IRQ mapping request for slot %d\n", slot);
123 return -1;
124 }
125}
126
127static struct resource sh7751_io_resource = {
128 .name = "SH7751 IO",
129 .start = SH7751_PCI_IO_BASE,
130 .end = SH7751_PCI_IO_BASE + SH7751_PCI_IO_SIZE - 1,
131 .flags = IORESOURCE_IO
132};
133
134static struct resource sh7751_mem_resource = {
135 .name = "SH7751 mem",
136 .start = SH7751_PCI_MEMORY_BASE,
137 .end = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1,
138 .flags = IORESOURCE_MEM
139};
140
141extern struct pci_ops sh7751_pci_ops;
142
143struct pci_channel board_pci_channels[] = {
144 { &sh7751_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
145 { NULL, NULL, NULL, 0, 0 },
146};
147
diff --git a/arch/sh/boards/mach-se/7751/setup.c b/arch/sh/boards/mach-se/7751/setup.c
new file mode 100644
index 000000000000..deefbfd92591
--- /dev/null
+++ b/arch/sh/boards/mach-se/7751/setup.c
@@ -0,0 +1,78 @@
1/*
2 * linux/arch/sh/boards/se/7751/setup.c
3 *
4 * Copyright (C) 2000 Kazumoto Kojima
5 *
6 * Hitachi SolutionEngine Support.
7 *
8 * Modified for 7751 Solution Engine by
9 * Ian da Silva and Jeremy Siegel, 2001.
10 */
11#include <linux/init.h>
12#include <linux/platform_device.h>
13#include <asm/machvec.h>
14#include <asm/se7751.h>
15#include <asm/io.h>
16#include <asm/heartbeat.h>
17
18static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
19
20static struct heartbeat_data heartbeat_data = {
21 .bit_pos = heartbeat_bit_pos,
22 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
23};
24
25static struct resource heartbeat_resources[] = {
26 [0] = {
27 .start = PA_LED,
28 .end = PA_LED,
29 .flags = IORESOURCE_MEM,
30 },
31};
32
33static struct platform_device heartbeat_device = {
34 .name = "heartbeat",
35 .id = -1,
36 .dev = {
37 .platform_data = &heartbeat_data,
38 },
39 .num_resources = ARRAY_SIZE(heartbeat_resources),
40 .resource = heartbeat_resources,
41};
42
43static struct platform_device *se7751_devices[] __initdata = {
44 &heartbeat_device,
45};
46
47static int __init se7751_devices_setup(void)
48{
49 return platform_add_devices(se7751_devices, ARRAY_SIZE(se7751_devices));
50}
51__initcall(se7751_devices_setup);
52
53/*
54 * The Machine Vector
55 */
56static struct sh_machine_vector mv_7751se __initmv = {
57 .mv_name = "7751 SolutionEngine",
58 .mv_nr_irqs = 72,
59
60 .mv_inb = sh7751se_inb,
61 .mv_inw = sh7751se_inw,
62 .mv_inl = sh7751se_inl,
63 .mv_outb = sh7751se_outb,
64 .mv_outw = sh7751se_outw,
65 .mv_outl = sh7751se_outl,
66
67 .mv_inb_p = sh7751se_inb_p,
68 .mv_inw_p = sh7751se_inw,
69 .mv_inl_p = sh7751se_inl,
70 .mv_outb_p = sh7751se_outb_p,
71 .mv_outw_p = sh7751se_outw,
72 .mv_outl_p = sh7751se_outl,
73
74 .mv_insl = sh7751se_insl,
75 .mv_outsl = sh7751se_outsl,
76
77 .mv_init_irq = init_7751se_IRQ,
78};
diff --git a/arch/sh/boards/mach-se/7780/Makefile b/arch/sh/boards/mach-se/7780/Makefile
new file mode 100644
index 000000000000..6b88adae3ecc
--- /dev/null
+++ b/arch/sh/boards/mach-se/7780/Makefile
@@ -0,0 +1,10 @@
1#
2# Makefile for the HITACHI UL SolutionEngine 7780 specific parts of the kernel
3#
4# This file is subject to the terms and conditions of the GNU General Public
5# License. See the file "COPYING" in the main directory of this archive
6# for more details.
7#
8#
9
10obj-y := setup.o irq.o
diff --git a/arch/sh/boards/mach-se/7780/irq.c b/arch/sh/boards/mach-se/7780/irq.c
new file mode 100644
index 000000000000..6bd70da6bb47
--- /dev/null
+++ b/arch/sh/boards/mach-se/7780/irq.c
@@ -0,0 +1,46 @@
1/*
2 * linux/arch/sh/boards/se/7780/irq.c
3 *
4 * Copyright (C) 2006,2007 Nobuhiro Iwamatsu
5 *
6 * Hitachi UL SolutionEngine 7780 Support.
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/init.h>
13#include <linux/irq.h>
14#include <linux/interrupt.h>
15#include <asm/irq.h>
16#include <asm/io.h>
17#include <asm/se7780.h>
18
19/*
20 * Initialize IRQ setting
21 */
22void __init init_se7780_IRQ(void)
23{
24 /* enable all interrupt at FPGA */
25 ctrl_outw(0, FPGA_INTMSK1);
26 /* mask SM501 interrupt */
27 ctrl_outw((ctrl_inw(FPGA_INTMSK1) | 0x0002), FPGA_INTMSK1);
28 /* enable all interrupt at FPGA */
29 ctrl_outw(0, FPGA_INTMSK2);
30
31 /* set FPGA INTSEL register */
32 /* FPGA + 0x06 */
33 ctrl_outw( ((IRQPIN_SM501 << IRQPOS_SM501) |
34 (IRQPIN_SMC91CX << IRQPOS_SMC91CX)), FPGA_INTSEL1);
35
36 /* FPGA + 0x08 */
37 ctrl_outw(((IRQPIN_EXTINT4 << IRQPOS_EXTINT4) |
38 (IRQPIN_EXTINT3 << IRQPOS_EXTINT3) |
39 (IRQPIN_EXTINT2 << IRQPOS_EXTINT2) |
40 (IRQPIN_EXTINT1 << IRQPOS_EXTINT1)), FPGA_INTSEL2);
41
42 /* FPGA + 0x0A */
43 ctrl_outw((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3);
44
45 plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-7 */
46}
diff --git a/arch/sh/boards/mach-se/7780/setup.c b/arch/sh/boards/mach-se/7780/setup.c
new file mode 100644
index 000000000000..0f08ab3b2bec
--- /dev/null
+++ b/arch/sh/boards/mach-se/7780/setup.c
@@ -0,0 +1,124 @@
1/*
2 * linux/arch/sh/boards/se/7780/setup.c
3 *
4 * Copyright (C) 2006,2007 Nobuhiro Iwamatsu
5 *
6 * Hitachi UL SolutionEngine 7780 Support.
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <asm/machvec.h>
15#include <asm/se7780.h>
16#include <asm/io.h>
17#include <asm/heartbeat.h>
18
19/* Heartbeat */
20static struct heartbeat_data heartbeat_data = {
21 .regsize = 16,
22};
23
24static struct resource heartbeat_resources[] = {
25 [0] = {
26 .start = PA_LED,
27 .end = PA_LED,
28 .flags = IORESOURCE_MEM,
29 },
30};
31
32static struct platform_device heartbeat_device = {
33 .name = "heartbeat",
34 .id = -1,
35 .dev = {
36 .platform_data = &heartbeat_data,
37 },
38 .num_resources = ARRAY_SIZE(heartbeat_resources),
39 .resource = heartbeat_resources,
40};
41
42/* SMC91x */
43static struct resource smc91x_eth_resources[] = {
44 [0] = {
45 .name = "smc91x-regs" ,
46 .start = PA_LAN + 0x300,
47 .end = PA_LAN + 0x300 + 0x10 ,
48 .flags = IORESOURCE_MEM,
49 },
50 [1] = {
51 .start = SMC_IRQ,
52 .end = SMC_IRQ,
53 .flags = IORESOURCE_IRQ,
54 },
55};
56
57static struct platform_device smc91x_eth_device = {
58 .name = "smc91x",
59 .id = 0,
60 .dev = {
61 .dma_mask = NULL, /* don't use dma */
62 .coherent_dma_mask = 0xffffffff,
63 },
64 .num_resources = ARRAY_SIZE(smc91x_eth_resources),
65 .resource = smc91x_eth_resources,
66};
67
68static struct platform_device *se7780_devices[] __initdata = {
69 &heartbeat_device,
70 &smc91x_eth_device,
71};
72
73static int __init se7780_devices_setup(void)
74{
75 return platform_add_devices(se7780_devices,
76 ARRAY_SIZE(se7780_devices));
77}
78device_initcall(se7780_devices_setup);
79
80#define GPIO_PHCR 0xFFEA000E
81#define GPIO_PMSELR 0xFFEA0080
82#define GPIO_PECR 0xFFEA0008
83
84static void __init se7780_setup(char **cmdline_p)
85{
86 /* "SH-Linux" on LED Display */
87 ctrl_outw( 'S' , PA_LED_DISP + (DISP_SEL0_ADDR << 1) );
88 ctrl_outw( 'H' , PA_LED_DISP + (DISP_SEL1_ADDR << 1) );
89 ctrl_outw( '-' , PA_LED_DISP + (DISP_SEL2_ADDR << 1) );
90 ctrl_outw( 'L' , PA_LED_DISP + (DISP_SEL3_ADDR << 1) );
91 ctrl_outw( 'i' , PA_LED_DISP + (DISP_SEL4_ADDR << 1) );
92 ctrl_outw( 'n' , PA_LED_DISP + (DISP_SEL5_ADDR << 1) );
93 ctrl_outw( 'u' , PA_LED_DISP + (DISP_SEL6_ADDR << 1) );
94 ctrl_outw( 'x' , PA_LED_DISP + (DISP_SEL7_ADDR << 1) );
95
96 printk(KERN_INFO "Hitachi UL Solutions Engine 7780SE03 support.\n");
97
98 /*
99 * PCI REQ/GNT setting
100 * REQ0/GNT0 -> USB
101 * REQ1/GNT1 -> PC Card
102 * REQ2/GNT2 -> Serial ATA
103 * REQ3/GNT3 -> PCI slot
104 */
105 ctrl_outw(0x0213, FPGA_REQSEL);
106
107 /* GPIO setting */
108 ctrl_outw(0x0000, GPIO_PECR);
109 ctrl_outw(ctrl_inw(GPIO_PHCR)&0xfff3, GPIO_PHCR);
110 ctrl_outw(0x0c00, GPIO_PMSELR);
111
112 /* iVDR Power ON */
113 ctrl_outw(0x0001, FPGA_IVDRPW);
114}
115
116/*
117 * The Machine Vector
118 */
119static struct sh_machine_vector mv_se7780 __initmv = {
120 .mv_name = "Solution Engine 7780" ,
121 .mv_setup = se7780_setup ,
122 .mv_nr_irqs = 111 ,
123 .mv_init_irq = init_se7780_IRQ,
124};
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-26 21:21:54 -0500