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authorPaul Mundt <lethal@linux-sh.org>2008-07-29 08:01:19 -0400
committerPaul Mundt <lethal@linux-sh.org>2008-07-29 08:01:19 -0400
commitda2014a2b080e7f3024a4eb6917d47069ad9620b (patch)
treecfde12c6d4b5baa222966b14a676f107992cf786 /arch/sh/boards/mach-se/770x
parent71b8064e7df5698520d73b4c1566a3dbc98eb9ef (diff)
sh: Shuffle the board directories in to mach groups.
This flattens out the board directories in to individual mach groups, we will use this for getting rid of unneeded directories, simplifying the build system, and becoming more coherent with the refactored arch/sh/include topology. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/boards/mach-se/770x')
-rw-r--r--arch/sh/boards/mach-se/770x/Makefile5
-rw-r--r--arch/sh/boards/mach-se/770x/io.c156
-rw-r--r--arch/sh/boards/mach-se/770x/irq.c108
-rw-r--r--arch/sh/boards/mach-se/770x/setup.c222
4 files changed, 491 insertions, 0 deletions
diff --git a/arch/sh/boards/mach-se/770x/Makefile b/arch/sh/boards/mach-se/770x/Makefile
new file mode 100644
index 000000000000..8e624b06d5ea
--- /dev/null
+++ b/arch/sh/boards/mach-se/770x/Makefile
@@ -0,0 +1,5 @@
1#
2# Makefile for the 770x SolutionEngine specific parts of the kernel
3#
4
5obj-y := setup.o io.o irq.o
diff --git a/arch/sh/boards/mach-se/770x/io.c b/arch/sh/boards/mach-se/770x/io.c
new file mode 100644
index 000000000000..b1ec085b8673
--- /dev/null
+++ b/arch/sh/boards/mach-se/770x/io.c
@@ -0,0 +1,156 @@
1/*
2 * Copyright (C) 2000 Kazumoto Kojima
3 *
4 * I/O routine for Hitachi SolutionEngine.
5 */
6#include <linux/kernel.h>
7#include <linux/types.h>
8#include <asm/io.h>
9#include <asm/se.h>
10
11/* MS7750 requires special versions of in*, out* routines, since
12 PC-like io ports are located at upper half byte of 16-bit word which
13 can be accessed only with 16-bit wide. */
14
15static inline volatile __u16 *
16port2adr(unsigned int port)
17{
18 if (port & 0xff000000)
19 return ( volatile __u16 *) port;
20 if (port >= 0x2000)
21 return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
22 else if (port >= 0x1000)
23 return (volatile __u16 *) (PA_83902 + (port << 1));
24 else
25 return (volatile __u16 *) (PA_SUPERIO + (port << 1));
26}
27
28static inline int
29shifted_port(unsigned long port)
30{
31 /* For IDE registers, value is not shifted */
32 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
33 return 0;
34 else
35 return 1;
36}
37
38unsigned char se_inb(unsigned long port)
39{
40 if (shifted_port(port))
41 return (*port2adr(port) >> 8);
42 else
43 return (*port2adr(port))&0xff;
44}
45
46unsigned char se_inb_p(unsigned long port)
47{
48 unsigned long v;
49
50 if (shifted_port(port))
51 v = (*port2adr(port) >> 8);
52 else
53 v = (*port2adr(port))&0xff;
54 ctrl_delay();
55 return v;
56}
57
58unsigned short se_inw(unsigned long port)
59{
60 if (port >= 0x2000)
61 return *port2adr(port);
62 else
63 maybebadio(port);
64 return 0;
65}
66
67unsigned int se_inl(unsigned long port)
68{
69 maybebadio(port);
70 return 0;
71}
72
73void se_outb(unsigned char value, unsigned long port)
74{
75 if (shifted_port(port))
76 *(port2adr(port)) = value << 8;
77 else
78 *(port2adr(port)) = value;
79}
80
81void se_outb_p(unsigned char value, unsigned long port)
82{
83 if (shifted_port(port))
84 *(port2adr(port)) = value << 8;
85 else
86 *(port2adr(port)) = value;
87 ctrl_delay();
88}
89
90void se_outw(unsigned short value, unsigned long port)
91{
92 if (port >= 0x2000)
93 *port2adr(port) = value;
94 else
95 maybebadio(port);
96}
97
98void se_outl(unsigned int value, unsigned long port)
99{
100 maybebadio(port);
101}
102
103void se_insb(unsigned long port, void *addr, unsigned long count)
104{
105 volatile __u16 *p = port2adr(port);
106 __u8 *ap = addr;
107
108 if (shifted_port(port)) {
109 while (count--)
110 *ap++ = *p >> 8;
111 } else {
112 while (count--)
113 *ap++ = *p;
114 }
115}
116
117void se_insw(unsigned long port, void *addr, unsigned long count)
118{
119 volatile __u16 *p = port2adr(port);
120 __u16 *ap = addr;
121 while (count--)
122 *ap++ = *p;
123}
124
125void se_insl(unsigned long port, void *addr, unsigned long count)
126{
127 maybebadio(port);
128}
129
130void se_outsb(unsigned long port, const void *addr, unsigned long count)
131{
132 volatile __u16 *p = port2adr(port);
133 const __u8 *ap = addr;
134
135 if (shifted_port(port)) {
136 while (count--)
137 *p = *ap++ << 8;
138 } else {
139 while (count--)
140 *p = *ap++;
141 }
142}
143
144void se_outsw(unsigned long port, const void *addr, unsigned long count)
145{
146 volatile __u16 *p = port2adr(port);
147 const __u16 *ap = addr;
148
149 while (count--)
150 *p = *ap++;
151}
152
153void se_outsl(unsigned long port, const void *addr, unsigned long count)
154{
155 maybebadio(port);
156}
diff --git a/arch/sh/boards/mach-se/770x/irq.c b/arch/sh/boards/mach-se/770x/irq.c
new file mode 100644
index 000000000000..cdb0807928a5
--- /dev/null
+++ b/arch/sh/boards/mach-se/770x/irq.c
@@ -0,0 +1,108 @@
1/*
2 * linux/arch/sh/boards/se/770x/irq.c
3 *
4 * Copyright (C) 2000 Kazumoto Kojima
5 * Copyright (C) 2006 Nobuhiro Iwamatsu
6 *
7 * Hitachi SolutionEngine Support.
8 *
9 */
10
11#include <linux/init.h>
12#include <linux/interrupt.h>
13#include <linux/irq.h>
14#include <asm/irq.h>
15#include <asm/io.h>
16#include <asm/se.h>
17
18static struct ipr_data ipr_irq_table[] = {
19 /*
20 * Super I/O (Just mimic PC):
21 * 1: keyboard
22 * 3: serial 0
23 * 4: serial 1
24 * 5: printer
25 * 6: floppy
26 * 8: rtc
27 * 12: mouse
28 * 14: ide0
29 */
30#if defined(CONFIG_CPU_SUBTYPE_SH7705)
31 /* This is default value */
32 { 13, 0, 8, 0x0f-13, },
33 { 5 , 0, 4, 0x0f- 5, },
34 { 10, 1, 0, 0x0f-10, },
35 { 7 , 2, 4, 0x0f- 7, },
36 { 3 , 2, 0, 0x0f- 3, },
37 { 1 , 3, 12, 0x0f- 1, },
38 { 12, 3, 4, 0x0f-12, }, /* LAN */
39 { 2 , 4, 8, 0x0f- 2, }, /* PCIRQ2 */
40 { 6 , 4, 4, 0x0f- 6, }, /* PCIRQ1 */
41 { 14, 4, 0, 0x0f-14, }, /* PCIRQ0 */
42 { 0 , 5, 12, 0x0f , },
43 { 4 , 5, 4, 0x0f- 4, },
44 { 8 , 6, 12, 0x0f- 8, },
45 { 9 , 6, 8, 0x0f- 9, },
46 { 11, 6, 4, 0x0f-11, },
47#else
48 { 14, 0, 8, 0x0f-14, },
49 { 12, 0, 4, 0x0f-12, },
50 { 8, 1, 4, 0x0f- 8, },
51 { 6, 2, 12, 0x0f- 6, },
52 { 5, 2, 8, 0x0f- 5, },
53 { 4, 2, 4, 0x0f- 4, },
54 { 3, 2, 0, 0x0f- 3, },
55 { 1, 3, 12, 0x0f- 1, },
56#if defined(CONFIG_STNIC)
57 /* ST NIC */
58 { 10, 3, 4, 0x0f-10, }, /* LAN */
59#endif
60 /* MRSHPC IRQs setting */
61 { 0, 4, 12, 0x0f- 0, }, /* PCIRQ3 */
62 { 11, 4, 8, 0x0f-11, }, /* PCIRQ2 */
63 { 9, 4, 4, 0x0f- 9, }, /* PCIRQ1 */
64 { 7, 4, 0, 0x0f- 7, }, /* PCIRQ0 */
65 /* #2, #13 are allocated for SLOT IRQ #1 and #2 (for now) */
66 /* NOTE: #2 and #13 are not used on PC */
67 { 13, 6, 4, 0x0f-13, }, /* SLOTIRQ2 */
68 { 2, 6, 0, 0x0f- 2, }, /* SLOTIRQ1 */
69#endif
70};
71
72static unsigned long ipr_offsets[] = {
73 BCR_ILCRA,
74 BCR_ILCRB,
75 BCR_ILCRC,
76 BCR_ILCRD,
77 BCR_ILCRE,
78 BCR_ILCRF,
79 BCR_ILCRG,
80};
81
82static struct ipr_desc ipr_irq_desc = {
83 .ipr_offsets = ipr_offsets,
84 .nr_offsets = ARRAY_SIZE(ipr_offsets),
85
86 .ipr_data = ipr_irq_table,
87 .nr_irqs = ARRAY_SIZE(ipr_irq_table),
88 .chip = {
89 .name = "IPR-se770x",
90 },
91};
92
93/*
94 * Initialize IRQ setting
95 */
96void __init init_se_IRQ(void)
97{
98 /* Disable all interrupts */
99 ctrl_outw(0, BCR_ILCRA);
100 ctrl_outw(0, BCR_ILCRB);
101 ctrl_outw(0, BCR_ILCRC);
102 ctrl_outw(0, BCR_ILCRD);
103 ctrl_outw(0, BCR_ILCRE);
104 ctrl_outw(0, BCR_ILCRF);
105 ctrl_outw(0, BCR_ILCRG);
106
107 register_ipr_controller(&ipr_irq_desc);
108}
diff --git a/arch/sh/boards/mach-se/770x/setup.c b/arch/sh/boards/mach-se/770x/setup.c
new file mode 100644
index 000000000000..6c64d774da3a
--- /dev/null
+++ b/arch/sh/boards/mach-se/770x/setup.c
@@ -0,0 +1,222 @@
1/*
2 * linux/arch/sh/boards/se/770x/setup.c
3 *
4 * Copyright (C) 2000 Kazumoto Kojima
5 *
6 * Hitachi SolutionEngine Support.
7 *
8 */
9#include <linux/init.h>
10#include <linux/platform_device.h>
11#include <asm/machvec.h>
12#include <asm/se.h>
13#include <asm/io.h>
14#include <asm/smc37c93x.h>
15#include <asm/heartbeat.h>
16
17/*
18 * Configure the Super I/O chip
19 */
20static void __init smsc_config(int index, int data)
21{
22 outb_p(index, INDEX_PORT);
23 outb_p(data, DATA_PORT);
24}
25
26/* XXX: Another candidate for a more generic cchip machine vector */
27static void __init smsc_setup(char **cmdline_p)
28{
29 outb_p(CONFIG_ENTER, CONFIG_PORT);
30 outb_p(CONFIG_ENTER, CONFIG_PORT);
31
32 /* FDC */
33 smsc_config(CURRENT_LDN_INDEX, LDN_FDC);
34 smsc_config(ACTIVATE_INDEX, 0x01);
35 smsc_config(IRQ_SELECT_INDEX, 6); /* IRQ6 */
36
37 /* AUXIO (GPIO): to use IDE1 */
38 smsc_config(CURRENT_LDN_INDEX, LDN_AUXIO);
39 smsc_config(GPIO46_INDEX, 0x00); /* nIOROP */
40 smsc_config(GPIO47_INDEX, 0x00); /* nIOWOP */
41
42 /* COM1 */
43 smsc_config(CURRENT_LDN_INDEX, LDN_COM1);
44 smsc_config(ACTIVATE_INDEX, 0x01);
45 smsc_config(IO_BASE_HI_INDEX, 0x03);
46 smsc_config(IO_BASE_LO_INDEX, 0xf8);
47 smsc_config(IRQ_SELECT_INDEX, 4); /* IRQ4 */
48
49 /* COM2 */
50 smsc_config(CURRENT_LDN_INDEX, LDN_COM2);
51 smsc_config(ACTIVATE_INDEX, 0x01);
52 smsc_config(IO_BASE_HI_INDEX, 0x02);
53 smsc_config(IO_BASE_LO_INDEX, 0xf8);
54 smsc_config(IRQ_SELECT_INDEX, 3); /* IRQ3 */
55
56 /* RTC */
57 smsc_config(CURRENT_LDN_INDEX, LDN_RTC);
58 smsc_config(ACTIVATE_INDEX, 0x01);
59 smsc_config(IRQ_SELECT_INDEX, 8); /* IRQ8 */
60
61 /* XXX: PARPORT, KBD, and MOUSE will come here... */
62 outb_p(CONFIG_EXIT, CONFIG_PORT);
63}
64
65
66static struct resource cf_ide_resources[] = {
67 [0] = {
68 .start = PA_MRSHPC_IO + 0x1f0,
69 .end = PA_MRSHPC_IO + 0x1f0 + 8,
70 .flags = IORESOURCE_MEM,
71 },
72 [1] = {
73 .start = PA_MRSHPC_IO + 0x1f0 + 0x206,
74 .end = PA_MRSHPC_IO + 0x1f0 + 8 + 0x206 + 8,
75 .flags = IORESOURCE_MEM,
76 },
77 [2] = {
78 .start = IRQ_CFCARD,
79 .flags = IORESOURCE_IRQ,
80 },
81};
82
83static struct platform_device cf_ide_device = {
84 .name = "pata_platform",
85 .id = -1,
86 .num_resources = ARRAY_SIZE(cf_ide_resources),
87 .resource = cf_ide_resources,
88};
89
90static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
91
92static struct heartbeat_data heartbeat_data = {
93 .bit_pos = heartbeat_bit_pos,
94 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
95 .regsize = 16,
96};
97
98static struct resource heartbeat_resources[] = {
99 [0] = {
100 .start = PA_LED,
101 .end = PA_LED,
102 .flags = IORESOURCE_MEM,
103 },
104};
105
106static struct platform_device heartbeat_device = {
107 .name = "heartbeat",
108 .id = -1,
109 .dev = {
110 .platform_data = &heartbeat_data,
111 },
112 .num_resources = ARRAY_SIZE(heartbeat_resources),
113 .resource = heartbeat_resources,
114};
115
116#if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\
117 defined(CONFIG_CPU_SUBTYPE_SH7712)
118/* SH771X Ethernet driver */
119static struct resource sh_eth0_resources[] = {
120 [0] = {
121 .start = SH_ETH0_BASE,
122 .end = SH_ETH0_BASE + 0x1B8,
123 .flags = IORESOURCE_MEM,
124 },
125 [1] = {
126 .start = SH_ETH0_IRQ,
127 .end = SH_ETH0_IRQ,
128 .flags = IORESOURCE_IRQ,
129 },
130};
131
132static struct platform_device sh_eth0_device = {
133 .name = "sh-eth",
134 .id = 0,
135 .dev = {
136 .platform_data = PHY_ID,
137 },
138 .num_resources = ARRAY_SIZE(sh_eth0_resources),
139 .resource = sh_eth0_resources,
140};
141
142static struct resource sh_eth1_resources[] = {
143 [0] = {
144 .start = SH_ETH1_BASE,
145 .end = SH_ETH1_BASE + 0x1B8,
146 .flags = IORESOURCE_MEM,
147 },
148 [1] = {
149 .start = SH_ETH1_IRQ,
150 .end = SH_ETH1_IRQ,
151 .flags = IORESOURCE_IRQ,
152 },
153};
154
155static struct platform_device sh_eth1_device = {
156 .name = "sh-eth",
157 .id = 1,
158 .dev = {
159 .platform_data = PHY_ID,
160 },
161 .num_resources = ARRAY_SIZE(sh_eth1_resources),
162 .resource = sh_eth1_resources,
163};
164#endif
165
166static struct platform_device *se_devices[] __initdata = {
167 &heartbeat_device,
168 &cf_ide_device,
169#if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\
170 defined(CONFIG_CPU_SUBTYPE_SH7712)
171 &sh_eth0_device,
172 &sh_eth1_device,
173#endif
174};
175
176static int __init se_devices_setup(void)
177{
178 return platform_add_devices(se_devices, ARRAY_SIZE(se_devices));
179}
180device_initcall(se_devices_setup);
181
182/*
183 * The Machine Vector
184 */
185static struct sh_machine_vector mv_se __initmv = {
186 .mv_name = "SolutionEngine",
187 .mv_setup = smsc_setup,
188#if defined(CONFIG_CPU_SH4)
189 .mv_nr_irqs = 48,
190#elif defined(CONFIG_CPU_SUBTYPE_SH7708)
191 .mv_nr_irqs = 32,
192#elif defined(CONFIG_CPU_SUBTYPE_SH7709)
193 .mv_nr_irqs = 61,
194#elif defined(CONFIG_CPU_SUBTYPE_SH7705)
195 .mv_nr_irqs = 86,
196#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
197 .mv_nr_irqs = 104,
198#endif
199
200 .mv_inb = se_inb,
201 .mv_inw = se_inw,
202 .mv_inl = se_inl,
203 .mv_outb = se_outb,
204 .mv_outw = se_outw,
205 .mv_outl = se_outl,
206
207 .mv_inb_p = se_inb_p,
208 .mv_inw_p = se_inw,
209 .mv_inl_p = se_inl,
210 .mv_outb_p = se_outb_p,
211 .mv_outw_p = se_outw,
212 .mv_outl_p = se_outl,
213
214 .mv_insb = se_insb,
215 .mv_insw = se_insw,
216 .mv_insl = se_insl,
217 .mv_outsb = se_outsb,
218 .mv_outsw = se_outsw,
219 .mv_outsl = se_outsl,
220
221 .mv_init_irq = init_se_IRQ,
222};
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