diff options
author | Paul Mundt <lethal@linux-sh.org> | 2010-01-25 22:58:40 -0500 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2010-01-25 22:58:40 -0500 |
commit | 9d56dd3b083a3bec56e9da35ce07baca81030b03 (patch) | |
tree | a9df9d514fbc32defc1ca8a6d7c2795f15b8a128 /arch/sh/boards/mach-se/7206 | |
parent | a077e91690fb32a1453423b2cf1df3492fd30c3a (diff) |
sh: Mass ctrl_in/outX to __raw_read/writeX conversion.
The old ctrl in/out routines are non-portable and unsuitable for
cross-platform use. While drivers/sh has already been sanitized, there
is still quite a lot of code that is not. This converts the arch/sh/ bits
over, which permits us to flag the routines as deprecated whilst still
building with -Werror for the architecture code, and to ensure that
future users are not added.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/boards/mach-se/7206')
-rw-r--r-- | arch/sh/boards/mach-se/7206/io.c | 2 | ||||
-rw-r--r-- | arch/sh/boards/mach-se/7206/irq.c | 40 |
2 files changed, 21 insertions, 21 deletions
diff --git a/arch/sh/boards/mach-se/7206/io.c b/arch/sh/boards/mach-se/7206/io.c index 180455642a43..adadc77532ee 100644 --- a/arch/sh/boards/mach-se/7206/io.c +++ b/arch/sh/boards/mach-se/7206/io.c | |||
@@ -16,7 +16,7 @@ | |||
16 | 16 | ||
17 | static inline void delay(void) | 17 | static inline void delay(void) |
18 | { | 18 | { |
19 | ctrl_inw(0x20000000); /* P2 ROM Area */ | 19 | __raw_readw(0x20000000); /* P2 ROM Area */ |
20 | } | 20 | } |
21 | 21 | ||
22 | /* MS7750 requires special versions of in*, out* routines, since | 22 | /* MS7750 requires special versions of in*, out* routines, since |
diff --git a/arch/sh/boards/mach-se/7206/irq.c b/arch/sh/boards/mach-se/7206/irq.c index aef7f052851a..79be4bc59933 100644 --- a/arch/sh/boards/mach-se/7206/irq.c +++ b/arch/sh/boards/mach-se/7206/irq.c | |||
@@ -32,12 +32,12 @@ static void disable_se7206_irq(unsigned int irq) | |||
32 | unsigned short msk0,msk1; | 32 | unsigned short msk0,msk1; |
33 | 33 | ||
34 | /* Set the priority in IPR to 0 */ | 34 | /* Set the priority in IPR to 0 */ |
35 | val = ctrl_inw(INTC_IPR01); | 35 | val = __raw_readw(INTC_IPR01); |
36 | val &= mask; | 36 | val &= mask; |
37 | ctrl_outw(val, INTC_IPR01); | 37 | __raw_writew(val, INTC_IPR01); |
38 | /* FPGA mask set */ | 38 | /* FPGA mask set */ |
39 | msk0 = ctrl_inw(INTMSK0); | 39 | msk0 = __raw_readw(INTMSK0); |
40 | msk1 = ctrl_inw(INTMSK1); | 40 | msk1 = __raw_readw(INTMSK1); |
41 | 41 | ||
42 | switch (irq) { | 42 | switch (irq) { |
43 | case IRQ0_IRQ: | 43 | case IRQ0_IRQ: |
@@ -51,8 +51,8 @@ static void disable_se7206_irq(unsigned int irq) | |||
51 | msk1 |= 0x00ff; | 51 | msk1 |= 0x00ff; |
52 | break; | 52 | break; |
53 | } | 53 | } |
54 | ctrl_outw(msk0, INTMSK0); | 54 | __raw_writew(msk0, INTMSK0); |
55 | ctrl_outw(msk1, INTMSK1); | 55 | __raw_writew(msk1, INTMSK1); |
56 | } | 56 | } |
57 | 57 | ||
58 | static void enable_se7206_irq(unsigned int irq) | 58 | static void enable_se7206_irq(unsigned int irq) |
@@ -62,13 +62,13 @@ static void enable_se7206_irq(unsigned int irq) | |||
62 | unsigned short msk0,msk1; | 62 | unsigned short msk0,msk1; |
63 | 63 | ||
64 | /* Set priority in IPR back to original value */ | 64 | /* Set priority in IPR back to original value */ |
65 | val = ctrl_inw(INTC_IPR01); | 65 | val = __raw_readw(INTC_IPR01); |
66 | val |= value; | 66 | val |= value; |
67 | ctrl_outw(val, INTC_IPR01); | 67 | __raw_writew(val, INTC_IPR01); |
68 | 68 | ||
69 | /* FPGA mask reset */ | 69 | /* FPGA mask reset */ |
70 | msk0 = ctrl_inw(INTMSK0); | 70 | msk0 = __raw_readw(INTMSK0); |
71 | msk1 = ctrl_inw(INTMSK1); | 71 | msk1 = __raw_readw(INTMSK1); |
72 | 72 | ||
73 | switch (irq) { | 73 | switch (irq) { |
74 | case IRQ0_IRQ: | 74 | case IRQ0_IRQ: |
@@ -82,8 +82,8 @@ static void enable_se7206_irq(unsigned int irq) | |||
82 | msk1 &= ~0x00ff; | 82 | msk1 &= ~0x00ff; |
83 | break; | 83 | break; |
84 | } | 84 | } |
85 | ctrl_outw(msk0, INTMSK0); | 85 | __raw_writew(msk0, INTMSK0); |
86 | ctrl_outw(msk1, INTMSK1); | 86 | __raw_writew(msk1, INTMSK1); |
87 | } | 87 | } |
88 | 88 | ||
89 | static void eoi_se7206_irq(unsigned int irq) | 89 | static void eoi_se7206_irq(unsigned int irq) |
@@ -93,8 +93,8 @@ static void eoi_se7206_irq(unsigned int irq) | |||
93 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) | 93 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) |
94 | enable_se7206_irq(irq); | 94 | enable_se7206_irq(irq); |
95 | /* FPGA isr clear */ | 95 | /* FPGA isr clear */ |
96 | sts0 = ctrl_inw(INTSTS0); | 96 | sts0 = __raw_readw(INTSTS0); |
97 | sts1 = ctrl_inw(INTSTS1); | 97 | sts1 = __raw_readw(INTSTS1); |
98 | 98 | ||
99 | switch (irq) { | 99 | switch (irq) { |
100 | case IRQ0_IRQ: | 100 | case IRQ0_IRQ: |
@@ -108,8 +108,8 @@ static void eoi_se7206_irq(unsigned int irq) | |||
108 | sts1 &= ~0x00ff; | 108 | sts1 &= ~0x00ff; |
109 | break; | 109 | break; |
110 | } | 110 | } |
111 | ctrl_outw(sts0, INTSTS0); | 111 | __raw_writew(sts0, INTSTS0); |
112 | ctrl_outw(sts1, INTSTS1); | 112 | __raw_writew(sts1, INTSTS1); |
113 | } | 113 | } |
114 | 114 | ||
115 | static struct irq_chip se7206_irq_chip __read_mostly = { | 115 | static struct irq_chip se7206_irq_chip __read_mostly = { |
@@ -136,11 +136,11 @@ void __init init_se7206_IRQ(void) | |||
136 | make_se7206_irq(IRQ0_IRQ); /* SMC91C111 */ | 136 | make_se7206_irq(IRQ0_IRQ); /* SMC91C111 */ |
137 | make_se7206_irq(IRQ1_IRQ); /* ATA */ | 137 | make_se7206_irq(IRQ1_IRQ); /* ATA */ |
138 | make_se7206_irq(IRQ3_IRQ); /* SLOT / PCM */ | 138 | make_se7206_irq(IRQ3_IRQ); /* SLOT / PCM */ |
139 | ctrl_outw(inw(INTC_ICR1) | 0x000b ,INTC_ICR1 ) ; /* ICR1 */ | 139 | __raw_writew(inw(INTC_ICR1) | 0x000b ,INTC_ICR1 ) ; /* ICR1 */ |
140 | 140 | ||
141 | /* FPGA System register setup*/ | 141 | /* FPGA System register setup*/ |
142 | ctrl_outw(0x0000,INTSTS0); /* Clear INTSTS0 */ | 142 | __raw_writew(0x0000,INTSTS0); /* Clear INTSTS0 */ |
143 | ctrl_outw(0x0000,INTSTS1); /* Clear INTSTS1 */ | 143 | __raw_writew(0x0000,INTSTS1); /* Clear INTSTS1 */ |
144 | /* IRQ0=LAN, IRQ1=ATA, IRQ3=SLT,PCM */ | 144 | /* IRQ0=LAN, IRQ1=ATA, IRQ3=SLT,PCM */ |
145 | ctrl_outw(0x0001,INTSEL); | 145 | __raw_writew(0x0001,INTSEL); |
146 | } | 146 | } |