diff options
author | Magnus Damm <damm@opensource.se> | 2009-10-30 00:23:42 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2009-10-30 01:33:43 -0400 |
commit | 53528928d1260747c294b63218d9886c74df4c31 (patch) | |
tree | f3479483229b518bb6516cf758f348c1745018cd /arch/sh/boards/mach-ap325rxa/setup.c | |
parent | 13fa551b5eb1752c6974a81ef19f369220972cf2 (diff) |
sh: Move ap325rxa board code into separate directory
Move the AP325RXA board code from a single board file
to a separate directory. This to make it easy to add
support for sdram sleep mode code.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/boards/mach-ap325rxa/setup.c')
-rw-r--r-- | arch/sh/boards/mach-ap325rxa/setup.c | 610 |
1 files changed, 610 insertions, 0 deletions
diff --git a/arch/sh/boards/mach-ap325rxa/setup.c b/arch/sh/boards/mach-ap325rxa/setup.c new file mode 100644 index 000000000000..b95deee35e0f --- /dev/null +++ b/arch/sh/boards/mach-ap325rxa/setup.c | |||
@@ -0,0 +1,610 @@ | |||
1 | /* | ||
2 | * Renesas - AP-325RXA | ||
3 | * (Compatible with Algo System ., LTD. - AP-320A) | ||
4 | * | ||
5 | * Copyright (C) 2008 Renesas Solutions Corp. | ||
6 | * Author : Yusuke Goda <goda.yuske@renesas.com> | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General Public | ||
9 | * License. See the file "COPYING" in the main directory of this archive | ||
10 | * for more details. | ||
11 | */ | ||
12 | |||
13 | #include <linux/init.h> | ||
14 | #include <linux/device.h> | ||
15 | #include <linux/interrupt.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/mtd/physmap.h> | ||
18 | #include <linux/mtd/sh_flctl.h> | ||
19 | #include <linux/delay.h> | ||
20 | #include <linux/i2c.h> | ||
21 | #include <linux/smsc911x.h> | ||
22 | #include <linux/gpio.h> | ||
23 | #include <media/ov772x.h> | ||
24 | #include <media/soc_camera.h> | ||
25 | #include <media/soc_camera_platform.h> | ||
26 | #include <media/sh_mobile_ceu.h> | ||
27 | #include <video/sh_mobile_lcdc.h> | ||
28 | #include <asm/io.h> | ||
29 | #include <asm/clock.h> | ||
30 | #include <cpu/sh7723.h> | ||
31 | |||
32 | static struct smsc911x_platform_config smsc911x_config = { | ||
33 | .phy_interface = PHY_INTERFACE_MODE_MII, | ||
34 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | ||
35 | .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, | ||
36 | .flags = SMSC911X_USE_32BIT, | ||
37 | }; | ||
38 | |||
39 | static struct resource smsc9118_resources[] = { | ||
40 | [0] = { | ||
41 | .start = 0xb6080000, | ||
42 | .end = 0xb60fffff, | ||
43 | .flags = IORESOURCE_MEM, | ||
44 | }, | ||
45 | [1] = { | ||
46 | .start = 35, | ||
47 | .end = 35, | ||
48 | .flags = IORESOURCE_IRQ, | ||
49 | } | ||
50 | }; | ||
51 | |||
52 | static struct platform_device smsc9118_device = { | ||
53 | .name = "smsc911x", | ||
54 | .id = -1, | ||
55 | .num_resources = ARRAY_SIZE(smsc9118_resources), | ||
56 | .resource = smsc9118_resources, | ||
57 | .dev = { | ||
58 | .platform_data = &smsc911x_config, | ||
59 | }, | ||
60 | }; | ||
61 | |||
62 | /* | ||
63 | * AP320 and AP325RXA has CPLD data in NOR Flash(0xA80000-0xABFFFF). | ||
64 | * If this area erased, this board can not boot. | ||
65 | */ | ||
66 | static struct mtd_partition ap325rxa_nor_flash_partitions[] = { | ||
67 | { | ||
68 | .name = "uboot", | ||
69 | .offset = 0, | ||
70 | .size = (1 * 1024 * 1024), | ||
71 | .mask_flags = MTD_WRITEABLE, /* Read-only */ | ||
72 | }, { | ||
73 | .name = "kernel", | ||
74 | .offset = MTDPART_OFS_APPEND, | ||
75 | .size = (2 * 1024 * 1024), | ||
76 | }, { | ||
77 | .name = "free-area0", | ||
78 | .offset = MTDPART_OFS_APPEND, | ||
79 | .size = ((7 * 1024 * 1024) + (512 * 1024)), | ||
80 | }, { | ||
81 | .name = "CPLD-Data", | ||
82 | .offset = MTDPART_OFS_APPEND, | ||
83 | .mask_flags = MTD_WRITEABLE, /* Read-only */ | ||
84 | .size = (1024 * 128 * 2), | ||
85 | }, { | ||
86 | .name = "free-area1", | ||
87 | .offset = MTDPART_OFS_APPEND, | ||
88 | .size = MTDPART_SIZ_FULL, | ||
89 | }, | ||
90 | }; | ||
91 | |||
92 | static struct physmap_flash_data ap325rxa_nor_flash_data = { | ||
93 | .width = 2, | ||
94 | .parts = ap325rxa_nor_flash_partitions, | ||
95 | .nr_parts = ARRAY_SIZE(ap325rxa_nor_flash_partitions), | ||
96 | }; | ||
97 | |||
98 | static struct resource ap325rxa_nor_flash_resources[] = { | ||
99 | [0] = { | ||
100 | .name = "NOR Flash", | ||
101 | .start = 0x00000000, | ||
102 | .end = 0x00ffffff, | ||
103 | .flags = IORESOURCE_MEM, | ||
104 | } | ||
105 | }; | ||
106 | |||
107 | static struct platform_device ap325rxa_nor_flash_device = { | ||
108 | .name = "physmap-flash", | ||
109 | .resource = ap325rxa_nor_flash_resources, | ||
110 | .num_resources = ARRAY_SIZE(ap325rxa_nor_flash_resources), | ||
111 | .dev = { | ||
112 | .platform_data = &ap325rxa_nor_flash_data, | ||
113 | }, | ||
114 | }; | ||
115 | |||
116 | static struct mtd_partition nand_partition_info[] = { | ||
117 | { | ||
118 | .name = "nand_data", | ||
119 | .offset = 0, | ||
120 | .size = MTDPART_SIZ_FULL, | ||
121 | }, | ||
122 | }; | ||
123 | |||
124 | static struct resource nand_flash_resources[] = { | ||
125 | [0] = { | ||
126 | .start = 0xa4530000, | ||
127 | .end = 0xa45300ff, | ||
128 | .flags = IORESOURCE_MEM, | ||
129 | } | ||
130 | }; | ||
131 | |||
132 | static struct sh_flctl_platform_data nand_flash_data = { | ||
133 | .parts = nand_partition_info, | ||
134 | .nr_parts = ARRAY_SIZE(nand_partition_info), | ||
135 | .flcmncr_val = FCKSEL_E | TYPESEL_SET | NANWF_E, | ||
136 | .has_hwecc = 1, | ||
137 | }; | ||
138 | |||
139 | static struct platform_device nand_flash_device = { | ||
140 | .name = "sh_flctl", | ||
141 | .resource = nand_flash_resources, | ||
142 | .num_resources = ARRAY_SIZE(nand_flash_resources), | ||
143 | .dev = { | ||
144 | .platform_data = &nand_flash_data, | ||
145 | }, | ||
146 | }; | ||
147 | |||
148 | #define FPGA_LCDREG 0xB4100180 | ||
149 | #define FPGA_BKLREG 0xB4100212 | ||
150 | #define FPGA_LCDREG_VAL 0x0018 | ||
151 | #define PORT_MSELCRB 0xA4050182 | ||
152 | #define PORT_HIZCRC 0xA405015C | ||
153 | #define PORT_DRVCRA 0xA405018A | ||
154 | #define PORT_DRVCRB 0xA405018C | ||
155 | |||
156 | static void ap320_wvga_power_on(void *board_data) | ||
157 | { | ||
158 | msleep(100); | ||
159 | |||
160 | /* ASD AP-320/325 LCD ON */ | ||
161 | ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG); | ||
162 | |||
163 | /* backlight */ | ||
164 | gpio_set_value(GPIO_PTS3, 0); | ||
165 | ctrl_outw(0x100, FPGA_BKLREG); | ||
166 | } | ||
167 | |||
168 | static void ap320_wvga_power_off(void *board_data) | ||
169 | { | ||
170 | /* backlight */ | ||
171 | ctrl_outw(0, FPGA_BKLREG); | ||
172 | gpio_set_value(GPIO_PTS3, 1); | ||
173 | |||
174 | /* ASD AP-320/325 LCD OFF */ | ||
175 | ctrl_outw(0, FPGA_LCDREG); | ||
176 | } | ||
177 | |||
178 | static struct sh_mobile_lcdc_info lcdc_info = { | ||
179 | .clock_source = LCDC_CLK_EXTERNAL, | ||
180 | .ch[0] = { | ||
181 | .chan = LCDC_CHAN_MAINLCD, | ||
182 | .bpp = 16, | ||
183 | .interface_type = RGB18, | ||
184 | .clock_divider = 1, | ||
185 | .lcd_cfg = { | ||
186 | .name = "LB070WV1", | ||
187 | .xres = 800, | ||
188 | .yres = 480, | ||
189 | .left_margin = 32, | ||
190 | .right_margin = 160, | ||
191 | .hsync_len = 8, | ||
192 | .upper_margin = 63, | ||
193 | .lower_margin = 80, | ||
194 | .vsync_len = 1, | ||
195 | .sync = 0, /* hsync and vsync are active low */ | ||
196 | }, | ||
197 | .lcd_size_cfg = { /* 7.0 inch */ | ||
198 | .width = 152, | ||
199 | .height = 91, | ||
200 | }, | ||
201 | .board_cfg = { | ||
202 | .display_on = ap320_wvga_power_on, | ||
203 | .display_off = ap320_wvga_power_off, | ||
204 | }, | ||
205 | } | ||
206 | }; | ||
207 | |||
208 | static struct resource lcdc_resources[] = { | ||
209 | [0] = { | ||
210 | .name = "LCDC", | ||
211 | .start = 0xfe940000, /* P4-only space */ | ||
212 | .end = 0xfe942fff, | ||
213 | .flags = IORESOURCE_MEM, | ||
214 | }, | ||
215 | [1] = { | ||
216 | .start = 28, | ||
217 | .flags = IORESOURCE_IRQ, | ||
218 | }, | ||
219 | }; | ||
220 | |||
221 | static struct platform_device lcdc_device = { | ||
222 | .name = "sh_mobile_lcdc_fb", | ||
223 | .num_resources = ARRAY_SIZE(lcdc_resources), | ||
224 | .resource = lcdc_resources, | ||
225 | .dev = { | ||
226 | .platform_data = &lcdc_info, | ||
227 | }, | ||
228 | .archdata = { | ||
229 | .hwblk_id = HWBLK_LCDC, | ||
230 | }, | ||
231 | }; | ||
232 | |||
233 | static void camera_power(int val) | ||
234 | { | ||
235 | gpio_set_value(GPIO_PTZ5, val); /* RST_CAM/RSTB */ | ||
236 | mdelay(10); | ||
237 | } | ||
238 | |||
239 | #ifdef CONFIG_I2C | ||
240 | /* support for the old ncm03j camera */ | ||
241 | static unsigned char camera_ncm03j_magic[] = | ||
242 | { | ||
243 | 0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8, | ||
244 | 0x1D, 0x00, 0x1E, 0x8A, 0x21, 0x00, 0x33, 0x36, | ||
245 | 0x36, 0x60, 0x37, 0x08, 0x3B, 0x31, 0x44, 0x0F, | ||
246 | 0x46, 0xF0, 0x4B, 0x28, 0x4C, 0x21, 0x4D, 0x55, | ||
247 | 0x4E, 0x1B, 0x4F, 0xC7, 0x50, 0xFC, 0x51, 0x12, | ||
248 | 0x58, 0x02, 0x66, 0xC0, 0x67, 0x46, 0x6B, 0xA0, | ||
249 | 0x6C, 0x34, 0x7E, 0x25, 0x7F, 0x25, 0x8D, 0x0F, | ||
250 | 0x92, 0x40, 0x93, 0x04, 0x94, 0x26, 0x95, 0x0A, | ||
251 | 0x99, 0x03, 0x9A, 0xF0, 0x9B, 0x14, 0x9D, 0x7A, | ||
252 | 0xC5, 0x02, 0xD6, 0x07, 0x59, 0x00, 0x5A, 0x1A, | ||
253 | 0x5B, 0x2A, 0x5C, 0x37, 0x5D, 0x42, 0x5E, 0x56, | ||
254 | 0xC8, 0x00, 0xC9, 0x1A, 0xCA, 0x2A, 0xCB, 0x37, | ||
255 | 0xCC, 0x42, 0xCD, 0x56, 0xCE, 0x00, 0xCF, 0x1A, | ||
256 | 0xD0, 0x2A, 0xD1, 0x37, 0xD2, 0x42, 0xD3, 0x56, | ||
257 | 0x5F, 0x68, 0x60, 0x87, 0x61, 0xA3, 0x62, 0xBC, | ||
258 | 0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F, | ||
259 | }; | ||
260 | |||
261 | static int camera_probe(void) | ||
262 | { | ||
263 | struct i2c_adapter *a = i2c_get_adapter(0); | ||
264 | struct i2c_msg msg; | ||
265 | int ret; | ||
266 | |||
267 | if (!a) | ||
268 | return -ENODEV; | ||
269 | |||
270 | camera_power(1); | ||
271 | msg.addr = 0x6e; | ||
272 | msg.buf = camera_ncm03j_magic; | ||
273 | msg.len = 2; | ||
274 | msg.flags = 0; | ||
275 | ret = i2c_transfer(a, &msg, 1); | ||
276 | camera_power(0); | ||
277 | |||
278 | return ret; | ||
279 | } | ||
280 | |||
281 | static int camera_set_capture(struct soc_camera_platform_info *info, | ||
282 | int enable) | ||
283 | { | ||
284 | struct i2c_adapter *a = i2c_get_adapter(0); | ||
285 | struct i2c_msg msg; | ||
286 | int ret = 0; | ||
287 | int i; | ||
288 | |||
289 | camera_power(0); | ||
290 | if (!enable) | ||
291 | return 0; /* no disable for now */ | ||
292 | |||
293 | camera_power(1); | ||
294 | for (i = 0; i < ARRAY_SIZE(camera_ncm03j_magic); i += 2) { | ||
295 | u_int8_t buf[8]; | ||
296 | |||
297 | msg.addr = 0x6e; | ||
298 | msg.buf = buf; | ||
299 | msg.len = 2; | ||
300 | msg.flags = 0; | ||
301 | |||
302 | buf[0] = camera_ncm03j_magic[i]; | ||
303 | buf[1] = camera_ncm03j_magic[i + 1]; | ||
304 | |||
305 | ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1); | ||
306 | } | ||
307 | |||
308 | return ret; | ||
309 | } | ||
310 | |||
311 | static int ap325rxa_camera_add(struct soc_camera_link *icl, struct device *dev); | ||
312 | static void ap325rxa_camera_del(struct soc_camera_link *icl); | ||
313 | |||
314 | static struct soc_camera_platform_info camera_info = { | ||
315 | .format_name = "UYVY", | ||
316 | .format_depth = 16, | ||
317 | .format = { | ||
318 | .pixelformat = V4L2_PIX_FMT_UYVY, | ||
319 | .colorspace = V4L2_COLORSPACE_SMPTE170M, | ||
320 | .width = 640, | ||
321 | .height = 480, | ||
322 | }, | ||
323 | .bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH | | ||
324 | SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8, | ||
325 | .set_capture = camera_set_capture, | ||
326 | .link = { | ||
327 | .bus_id = 0, | ||
328 | .add_device = ap325rxa_camera_add, | ||
329 | .del_device = ap325rxa_camera_del, | ||
330 | .module_name = "soc_camera_platform", | ||
331 | }, | ||
332 | }; | ||
333 | |||
334 | static void dummy_release(struct device *dev) | ||
335 | { | ||
336 | } | ||
337 | |||
338 | static struct platform_device camera_device = { | ||
339 | .name = "soc_camera_platform", | ||
340 | .dev = { | ||
341 | .platform_data = &camera_info, | ||
342 | .release = dummy_release, | ||
343 | }, | ||
344 | }; | ||
345 | |||
346 | static int ap325rxa_camera_add(struct soc_camera_link *icl, | ||
347 | struct device *dev) | ||
348 | { | ||
349 | if (icl != &camera_info.link || camera_probe() <= 0) | ||
350 | return -ENODEV; | ||
351 | |||
352 | camera_info.dev = dev; | ||
353 | |||
354 | return platform_device_register(&camera_device); | ||
355 | } | ||
356 | |||
357 | static void ap325rxa_camera_del(struct soc_camera_link *icl) | ||
358 | { | ||
359 | if (icl != &camera_info.link) | ||
360 | return; | ||
361 | |||
362 | platform_device_unregister(&camera_device); | ||
363 | memset(&camera_device.dev.kobj, 0, | ||
364 | sizeof(camera_device.dev.kobj)); | ||
365 | } | ||
366 | #endif /* CONFIG_I2C */ | ||
367 | |||
368 | static int ov7725_power(struct device *dev, int mode) | ||
369 | { | ||
370 | camera_power(0); | ||
371 | if (mode) | ||
372 | camera_power(1); | ||
373 | |||
374 | return 0; | ||
375 | } | ||
376 | |||
377 | static struct sh_mobile_ceu_info sh_mobile_ceu_info = { | ||
378 | .flags = SH_CEU_FLAG_USE_8BIT_BUS, | ||
379 | }; | ||
380 | |||
381 | static struct resource ceu_resources[] = { | ||
382 | [0] = { | ||
383 | .name = "CEU", | ||
384 | .start = 0xfe910000, | ||
385 | .end = 0xfe91009f, | ||
386 | .flags = IORESOURCE_MEM, | ||
387 | }, | ||
388 | [1] = { | ||
389 | .start = 52, | ||
390 | .flags = IORESOURCE_IRQ, | ||
391 | }, | ||
392 | [2] = { | ||
393 | /* place holder for contiguous memory */ | ||
394 | }, | ||
395 | }; | ||
396 | |||
397 | static struct platform_device ceu_device = { | ||
398 | .name = "sh_mobile_ceu", | ||
399 | .id = 0, /* "ceu0" clock */ | ||
400 | .num_resources = ARRAY_SIZE(ceu_resources), | ||
401 | .resource = ceu_resources, | ||
402 | .dev = { | ||
403 | .platform_data = &sh_mobile_ceu_info, | ||
404 | }, | ||
405 | .archdata = { | ||
406 | .hwblk_id = HWBLK_CEU, | ||
407 | }, | ||
408 | }; | ||
409 | |||
410 | static struct resource sdhi0_cn3_resources[] = { | ||
411 | [0] = { | ||
412 | .name = "SDHI0", | ||
413 | .start = 0x04ce0000, | ||
414 | .end = 0x04ce01ff, | ||
415 | .flags = IORESOURCE_MEM, | ||
416 | }, | ||
417 | [1] = { | ||
418 | .start = 101, | ||
419 | .flags = IORESOURCE_IRQ, | ||
420 | }, | ||
421 | }; | ||
422 | |||
423 | static struct platform_device sdhi0_cn3_device = { | ||
424 | .name = "sh_mobile_sdhi", | ||
425 | .num_resources = ARRAY_SIZE(sdhi0_cn3_resources), | ||
426 | .resource = sdhi0_cn3_resources, | ||
427 | .archdata = { | ||
428 | .hwblk_id = HWBLK_SDHI0, | ||
429 | }, | ||
430 | }; | ||
431 | |||
432 | static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = { | ||
433 | { | ||
434 | I2C_BOARD_INFO("pcf8563", 0x51), | ||
435 | }, | ||
436 | }; | ||
437 | |||
438 | static struct i2c_board_info ap325rxa_i2c_camera[] = { | ||
439 | { | ||
440 | I2C_BOARD_INFO("ov772x", 0x21), | ||
441 | }, | ||
442 | }; | ||
443 | |||
444 | static struct ov772x_camera_info ov7725_info = { | ||
445 | .buswidth = SOCAM_DATAWIDTH_8, | ||
446 | .flags = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP, | ||
447 | .edgectrl = OV772X_AUTO_EDGECTRL(0xf, 0), | ||
448 | .link = { | ||
449 | .bus_id = 0, | ||
450 | .power = ov7725_power, | ||
451 | .board_info = &ap325rxa_i2c_camera[0], | ||
452 | .i2c_adapter_id = 0, | ||
453 | .module_name = "ov772x", | ||
454 | }, | ||
455 | }; | ||
456 | |||
457 | static struct platform_device ap325rxa_camera[] = { | ||
458 | { | ||
459 | .name = "soc-camera-pdrv", | ||
460 | .id = 0, | ||
461 | .dev = { | ||
462 | .platform_data = &ov7725_info.link, | ||
463 | }, | ||
464 | }, { | ||
465 | .name = "soc-camera-pdrv", | ||
466 | .id = 1, | ||
467 | .dev = { | ||
468 | .platform_data = &camera_info.link, | ||
469 | }, | ||
470 | }, | ||
471 | }; | ||
472 | |||
473 | static struct platform_device *ap325rxa_devices[] __initdata = { | ||
474 | &smsc9118_device, | ||
475 | &ap325rxa_nor_flash_device, | ||
476 | &lcdc_device, | ||
477 | &ceu_device, | ||
478 | &nand_flash_device, | ||
479 | &sdhi0_cn3_device, | ||
480 | &ap325rxa_camera[0], | ||
481 | &ap325rxa_camera[1], | ||
482 | }; | ||
483 | |||
484 | static int __init ap325rxa_devices_setup(void) | ||
485 | { | ||
486 | /* LD3 and LD4 LEDs */ | ||
487 | gpio_request(GPIO_PTX5, NULL); /* RUN */ | ||
488 | gpio_direction_output(GPIO_PTX5, 1); | ||
489 | gpio_export(GPIO_PTX5, 0); | ||
490 | |||
491 | gpio_request(GPIO_PTX4, NULL); /* INDICATOR */ | ||
492 | gpio_direction_output(GPIO_PTX4, 0); | ||
493 | gpio_export(GPIO_PTX4, 0); | ||
494 | |||
495 | /* SW1 input */ | ||
496 | gpio_request(GPIO_PTF7, NULL); /* MODE */ | ||
497 | gpio_direction_input(GPIO_PTF7); | ||
498 | gpio_export(GPIO_PTF7, 0); | ||
499 | |||
500 | /* LCDC */ | ||
501 | gpio_request(GPIO_FN_LCDD15, NULL); | ||
502 | gpio_request(GPIO_FN_LCDD14, NULL); | ||
503 | gpio_request(GPIO_FN_LCDD13, NULL); | ||
504 | gpio_request(GPIO_FN_LCDD12, NULL); | ||
505 | gpio_request(GPIO_FN_LCDD11, NULL); | ||
506 | gpio_request(GPIO_FN_LCDD10, NULL); | ||
507 | gpio_request(GPIO_FN_LCDD9, NULL); | ||
508 | gpio_request(GPIO_FN_LCDD8, NULL); | ||
509 | gpio_request(GPIO_FN_LCDD7, NULL); | ||
510 | gpio_request(GPIO_FN_LCDD6, NULL); | ||
511 | gpio_request(GPIO_FN_LCDD5, NULL); | ||
512 | gpio_request(GPIO_FN_LCDD4, NULL); | ||
513 | gpio_request(GPIO_FN_LCDD3, NULL); | ||
514 | gpio_request(GPIO_FN_LCDD2, NULL); | ||
515 | gpio_request(GPIO_FN_LCDD1, NULL); | ||
516 | gpio_request(GPIO_FN_LCDD0, NULL); | ||
517 | gpio_request(GPIO_FN_LCDLCLK_PTR, NULL); | ||
518 | gpio_request(GPIO_FN_LCDDCK, NULL); | ||
519 | gpio_request(GPIO_FN_LCDVEPWC, NULL); | ||
520 | gpio_request(GPIO_FN_LCDVCPWC, NULL); | ||
521 | gpio_request(GPIO_FN_LCDVSYN, NULL); | ||
522 | gpio_request(GPIO_FN_LCDHSYN, NULL); | ||
523 | gpio_request(GPIO_FN_LCDDISP, NULL); | ||
524 | gpio_request(GPIO_FN_LCDDON, NULL); | ||
525 | |||
526 | /* LCD backlight */ | ||
527 | gpio_request(GPIO_PTS3, NULL); | ||
528 | gpio_direction_output(GPIO_PTS3, 1); | ||
529 | |||
530 | /* CEU */ | ||
531 | gpio_request(GPIO_FN_VIO_CLK2, NULL); | ||
532 | gpio_request(GPIO_FN_VIO_VD2, NULL); | ||
533 | gpio_request(GPIO_FN_VIO_HD2, NULL); | ||
534 | gpio_request(GPIO_FN_VIO_FLD, NULL); | ||
535 | gpio_request(GPIO_FN_VIO_CKO, NULL); | ||
536 | gpio_request(GPIO_FN_VIO_D15, NULL); | ||
537 | gpio_request(GPIO_FN_VIO_D14, NULL); | ||
538 | gpio_request(GPIO_FN_VIO_D13, NULL); | ||
539 | gpio_request(GPIO_FN_VIO_D12, NULL); | ||
540 | gpio_request(GPIO_FN_VIO_D11, NULL); | ||
541 | gpio_request(GPIO_FN_VIO_D10, NULL); | ||
542 | gpio_request(GPIO_FN_VIO_D9, NULL); | ||
543 | gpio_request(GPIO_FN_VIO_D8, NULL); | ||
544 | |||
545 | gpio_request(GPIO_PTZ7, NULL); | ||
546 | gpio_direction_output(GPIO_PTZ7, 0); /* OE_CAM */ | ||
547 | gpio_request(GPIO_PTZ6, NULL); | ||
548 | gpio_direction_output(GPIO_PTZ6, 0); /* STBY_CAM */ | ||
549 | gpio_request(GPIO_PTZ5, NULL); | ||
550 | gpio_direction_output(GPIO_PTZ5, 0); /* RST_CAM */ | ||
551 | gpio_request(GPIO_PTZ4, NULL); | ||
552 | gpio_direction_output(GPIO_PTZ4, 0); /* SADDR */ | ||
553 | |||
554 | ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB); | ||
555 | |||
556 | /* FLCTL */ | ||
557 | gpio_request(GPIO_FN_FCE, NULL); | ||
558 | gpio_request(GPIO_FN_NAF7, NULL); | ||
559 | gpio_request(GPIO_FN_NAF6, NULL); | ||
560 | gpio_request(GPIO_FN_NAF5, NULL); | ||
561 | gpio_request(GPIO_FN_NAF4, NULL); | ||
562 | gpio_request(GPIO_FN_NAF3, NULL); | ||
563 | gpio_request(GPIO_FN_NAF2, NULL); | ||
564 | gpio_request(GPIO_FN_NAF1, NULL); | ||
565 | gpio_request(GPIO_FN_NAF0, NULL); | ||
566 | gpio_request(GPIO_FN_FCDE, NULL); | ||
567 | gpio_request(GPIO_FN_FOE, NULL); | ||
568 | gpio_request(GPIO_FN_FSC, NULL); | ||
569 | gpio_request(GPIO_FN_FWE, NULL); | ||
570 | gpio_request(GPIO_FN_FRB, NULL); | ||
571 | |||
572 | ctrl_outw(0, PORT_HIZCRC); | ||
573 | ctrl_outw(0xFFFF, PORT_DRVCRA); | ||
574 | ctrl_outw(0xFFFF, PORT_DRVCRB); | ||
575 | |||
576 | platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20); | ||
577 | |||
578 | /* SDHI0 */ | ||
579 | gpio_request(GPIO_FN_SDHI0CD_PTD, NULL); | ||
580 | gpio_request(GPIO_FN_SDHI0WP_PTD, NULL); | ||
581 | gpio_request(GPIO_FN_SDHI0D3_PTD, NULL); | ||
582 | gpio_request(GPIO_FN_SDHI0D2_PTD, NULL); | ||
583 | gpio_request(GPIO_FN_SDHI0D1_PTD, NULL); | ||
584 | gpio_request(GPIO_FN_SDHI0D0_PTD, NULL); | ||
585 | gpio_request(GPIO_FN_SDHI0CMD_PTD, NULL); | ||
586 | gpio_request(GPIO_FN_SDHI0CLK_PTD, NULL); | ||
587 | |||
588 | i2c_register_board_info(0, ap325rxa_i2c_devices, | ||
589 | ARRAY_SIZE(ap325rxa_i2c_devices)); | ||
590 | |||
591 | return platform_add_devices(ap325rxa_devices, | ||
592 | ARRAY_SIZE(ap325rxa_devices)); | ||
593 | } | ||
594 | arch_initcall(ap325rxa_devices_setup); | ||
595 | |||
596 | /* Return the board specific boot mode pin configuration */ | ||
597 | static int ap325rxa_mode_pins(void) | ||
598 | { | ||
599 | /* MD0=0, MD1=0, MD2=0: Clock Mode 0 | ||
600 | * MD3=0: 16-bit Area0 Bus Width | ||
601 | * MD5=1: Little Endian | ||
602 | * TSTMD=1, MD8=1: Test Mode Disabled | ||
603 | */ | ||
604 | return MODE_PIN5 | MODE_PIN8; | ||
605 | } | ||
606 | |||
607 | static struct sh_machine_vector mv_ap325rxa __initmv = { | ||
608 | .mv_name = "AP-325RXA", | ||
609 | .mv_mode_pins = ap325rxa_mode_pins, | ||
610 | }; | ||