sh: sh7724 clock framework rewrite V3

This patch contains V3 of the sh7724 clock framework
rewrite. The new code makes use of the recently merged
div4, div6 and mstp32 helper code. Both extal and fll are
supported as input clocks to the pll. The div6 clocks are
fed through a divide-by-3 block.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

1 files changed, 1 insertions, 1 deletions

diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index d13390b81aa5..7b564bddfb53 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -516,7 +516,7 @@ config SH_CLK_CPG
 
 config SH_CLK_CPG_LEGACY
         depends on SH_CLK_CPG
-        def_bool y if !CPU_SUBTYPE_SH7785 && !CPU_SUBTYPE_SH7723
+        def_bool y if !CPU_SUBTYPE_SH7785 && !CPU_SUBTYPE_SH7723 && !CPU_SUBTYPE_SH7724
 
 config SH_CLK_MD
         int "CPU Mode Pin Setting"