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authorRussell King <rmk+kernel@arm.linux.org.uk>2009-12-18 11:40:18 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-02-20 11:41:46 -0500
commit4b3073e1c53a256275f1079c0fbfbe85883d9275 (patch)
treea0fa98cb75edbbc58c43bbe38ac4c6da0913ae6d /arch/score/include
parented42acaef1a9d51631a31b55e9ed52d400430492 (diff)
MM: Pass a PTE pointer to update_mmu_cache() rather than the PTE itself
On VIVT ARM, when we have multiple shared mappings of the same file in the same MM, we need to ensure that we have coherency across all copies. We do this via make_coherent() by making the pages uncacheable. This used to work fine, until we allowed highmem with highpte - we now have a page table which is mapped as required, and is not available for modification via update_mmu_cache(). Ralf Beache suggested getting rid of the PTE value passed to update_mmu_cache(): On MIPS update_mmu_cache() calls __update_tlb() which walks pagetables to construct a pointer to the pte again. Passing a pte_t * is much more elegant. Maybe we might even replace the pte argument with the pte_t? Ben Herrenschmidt would also like the pte pointer for PowerPC: Passing the ptep in there is exactly what I want. I want that -instead- of the PTE value, because I have issue on some ppc cases, for I$/D$ coherency, where set_pte_at() may decide to mask out the _PAGE_EXEC. So, pass in the mapped page table pointer into update_mmu_cache(), and remove the PTE value, updating all implementations and call sites to suit. Includes a fix from Stephen Rothwell: sparc: fix fallout from update_mmu_cache API change Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/score/include')
-rw-r--r--arch/score/include/asm/pgtable.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/score/include/asm/pgtable.h b/arch/score/include/asm/pgtable.h
index 674934b40170..ccf38f06c57d 100644
--- a/arch/score/include/asm/pgtable.h
+++ b/arch/score/include/asm/pgtable.h
@@ -272,8 +272,9 @@ extern void __update_cache(struct vm_area_struct *vma,
272 unsigned long address, pte_t pte); 272 unsigned long address, pte_t pte);
273 273
274static inline void update_mmu_cache(struct vm_area_struct *vma, 274static inline void update_mmu_cache(struct vm_area_struct *vma,
275 unsigned long address, pte_t pte) 275 unsigned long address, pte_t *ptep)
276{ 276{
277 pte_t pte = *ptep;
277 __update_tlb(vma, address, pte); 278 __update_tlb(vma, address, pte);
278 __update_cache(vma, address, pte); 279 __update_cache(vma, address, pte);
279} 280}