aboutsummaryrefslogtreecommitdiffstats
path: root/arch/s390
diff options
context:
space:
mode:
authorMartin Schwidefsky <schwidefsky@de.ibm.com>2009-03-26 10:24:44 -0400
committerMartin Schwidefsky <schwidefsky@de.ibm.com>2009-03-26 10:24:27 -0400
commit866ba28418d30122d863c50182a202741f4dcf3e (patch)
tree93320f93c1bed0bd21b495b56ef539625cb9df73 /arch/s390
parentda292bbe1f620221b08c4b589424f370168d642b (diff)
[S390] cleanup lowcore.h
The lowcore.h header has quite a lot of whitespace damage and a rather wild collection of entries. Remove all that whitespace and tidy up the order of the lowcore fields. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'arch/s390')
-rw-r--r--arch/s390/include/asm/lowcore.h652
-rw-r--r--arch/s390/kernel/head.S2
2 files changed, 331 insertions, 323 deletions
diff --git a/arch/s390/include/asm/lowcore.h b/arch/s390/include/asm/lowcore.h
index 5b18035c1dc7..b349f1c7fdfa 100644
--- a/arch/s390/include/asm/lowcore.h
+++ b/arch/s390/include/asm/lowcore.h
@@ -11,125 +11,118 @@
11#ifndef _ASM_S390_LOWCORE_H 11#ifndef _ASM_S390_LOWCORE_H
12#define _ASM_S390_LOWCORE_H 12#define _ASM_S390_LOWCORE_H
13 13
14#ifndef __s390x__ 14#define __LC_IPL_PARMBLOCK_PTR 0x0014
15#define __LC_EXT_OLD_PSW 0x018 15#define __LC_EXT_PARAMS 0x0080
16#define __LC_SVC_OLD_PSW 0x020 16#define __LC_CPU_ADDRESS 0x0084
17#define __LC_PGM_OLD_PSW 0x028 17#define __LC_EXT_INT_CODE 0x0086
18#define __LC_MCK_OLD_PSW 0x030
19#define __LC_IO_OLD_PSW 0x038
20#define __LC_EXT_NEW_PSW 0x058
21#define __LC_SVC_NEW_PSW 0x060
22#define __LC_PGM_NEW_PSW 0x068
23#define __LC_MCK_NEW_PSW 0x070
24#define __LC_IO_NEW_PSW 0x078
25#else /* !__s390x__ */
26#define __LC_EXT_OLD_PSW 0x0130
27#define __LC_SVC_OLD_PSW 0x0140
28#define __LC_PGM_OLD_PSW 0x0150
29#define __LC_MCK_OLD_PSW 0x0160
30#define __LC_IO_OLD_PSW 0x0170
31#define __LC_EXT_NEW_PSW 0x01b0
32#define __LC_SVC_NEW_PSW 0x01c0
33#define __LC_PGM_NEW_PSW 0x01d0
34#define __LC_MCK_NEW_PSW 0x01e0
35#define __LC_IO_NEW_PSW 0x01f0
36#endif /* !__s390x__ */
37
38#define __LC_IPL_PARMBLOCK_PTR 0x014
39#define __LC_EXT_PARAMS 0x080
40#define __LC_CPU_ADDRESS 0x084
41#define __LC_EXT_INT_CODE 0x086
42
43#define __LC_SVC_ILC 0x088
44#define __LC_SVC_INT_CODE 0x08A
45#define __LC_PGM_ILC 0x08C
46#define __LC_PGM_INT_CODE 0x08E
47 18
48#define __LC_PER_ATMID 0x096 19#define __LC_SVC_ILC 0x0088
49#define __LC_PER_ADDRESS 0x098 20#define __LC_SVC_INT_CODE 0x008a
50#define __LC_PER_ACCESS_ID 0x0A1 21#define __LC_PGM_ILC 0x008c
51#define __LC_AR_MODE_ID 0x0A3 22#define __LC_PGM_INT_CODE 0x008e
52 23
53#define __LC_SUBCHANNEL_ID 0x0B8 24#define __LC_PER_ATMID 0x0096
54#define __LC_SUBCHANNEL_NR 0x0BA 25#define __LC_PER_ADDRESS 0x0098
55#define __LC_IO_INT_PARM 0x0BC 26#define __LC_PER_ACCESS_ID 0x00a1
56#define __LC_IO_INT_WORD 0x0C0 27#define __LC_AR_MODE_ID 0x00a3
57#define __LC_MCCK_CODE 0x0E8
58 28
59#define __LC_LAST_BREAK 0x110 29#define __LC_SUBCHANNEL_ID 0x00b8
30#define __LC_SUBCHANNEL_NR 0x00ba
31#define __LC_IO_INT_PARM 0x00bc
32#define __LC_IO_INT_WORD 0x00c0
33#define __LC_MCCK_CODE 0x00e8
60 34
61#define __LC_RETURN_PSW 0x200 35#define __LC_DUMP_REIPL 0x0e00
62
63#define __LC_SAVE_AREA 0xC00
64 36
65#ifndef __s390x__ 37#ifndef __s390x__
66#define __LC_IRB 0x208 38#define __LC_EXT_OLD_PSW 0x0018
67#define __LC_SYNC_ENTER_TIMER 0x248 39#define __LC_SVC_OLD_PSW 0x0020
68#define __LC_ASYNC_ENTER_TIMER 0x250 40#define __LC_PGM_OLD_PSW 0x0028
69#define __LC_EXIT_TIMER 0x258 41#define __LC_MCK_OLD_PSW 0x0030
70#define __LC_USER_TIMER 0x260 42#define __LC_IO_OLD_PSW 0x0038
71#define __LC_SYSTEM_TIMER 0x268 43#define __LC_EXT_NEW_PSW 0x0058
72#define __LC_STEAL_TIMER 0x270 44#define __LC_SVC_NEW_PSW 0x0060
73#define __LC_LAST_UPDATE_TIMER 0x278 45#define __LC_PGM_NEW_PSW 0x0068
74#define __LC_LAST_UPDATE_CLOCK 0x280 46#define __LC_MCK_NEW_PSW 0x0070
75#define __LC_RETURN_MCCK_PSW 0x288 47#define __LC_IO_NEW_PSW 0x0078
76#define __LC_KERNEL_STACK 0xC40 48#define __LC_SAVE_AREA 0x0200
77#define __LC_THREAD_INFO 0xC44 49#define __LC_RETURN_PSW 0x0240
78#define __LC_ASYNC_STACK 0xC48 50#define __LC_RETURN_MCCK_PSW 0x0248
79#define __LC_KERNEL_ASCE 0xC4C 51#define __LC_SYNC_ENTER_TIMER 0x0250
80#define __LC_USER_ASCE 0xC50 52#define __LC_ASYNC_ENTER_TIMER 0x0258
81#define __LC_PANIC_STACK 0xC54 53#define __LC_EXIT_TIMER 0x0260
82#define __LC_CPUID 0xC60 54#define __LC_USER_TIMER 0x0268
83#define __LC_CURRENT 0xC90 55#define __LC_SYSTEM_TIMER 0x0270
84#define __LC_INT_CLOCK 0xC98 56#define __LC_STEAL_TIMER 0x0278
57#define __LC_LAST_UPDATE_TIMER 0x0280
58#define __LC_LAST_UPDATE_CLOCK 0x0288
59#define __LC_CURRENT 0x0290
60#define __LC_THREAD_INFO 0x0294
61#define __LC_KERNEL_STACK 0x0298
62#define __LC_ASYNC_STACK 0x029c
63#define __LC_PANIC_STACK 0x02a0
64#define __LC_KERNEL_ASCE 0x02a4
65#define __LC_USER_ASCE 0x02a8
66#define __LC_USER_EXEC_ASCE 0x02ac
67#define __LC_CPUID 0x02b0
68#define __LC_INT_CLOCK 0x02c8
69#define __LC_IRB 0x0300
70#define __LC_PFAULT_INTPARM 0x0080
71#define __LC_CPU_TIMER_SAVE_AREA 0x00d8
72#define __LC_CLOCK_COMP_SAVE_AREA 0x00e0
73#define __LC_PSW_SAVE_AREA 0x0100
74#define __LC_PREFIX_SAVE_AREA 0x0108
75#define __LC_AREGS_SAVE_AREA 0x0120
76#define __LC_FPREGS_SAVE_AREA 0x0160
77#define __LC_GPREGS_SAVE_AREA 0x0180
78#define __LC_CREGS_SAVE_AREA 0x01c0
85#else /* __s390x__ */ 79#else /* __s390x__ */
86#define __LC_IRB 0x210 80#define __LC_LAST_BREAK 0x0110
87#define __LC_SYNC_ENTER_TIMER 0x250 81#define __LC_EXT_OLD_PSW 0x0130
88#define __LC_ASYNC_ENTER_TIMER 0x258 82#define __LC_SVC_OLD_PSW 0x0140
89#define __LC_EXIT_TIMER 0x260 83#define __LC_PGM_OLD_PSW 0x0150
90#define __LC_USER_TIMER 0x268 84#define __LC_MCK_OLD_PSW 0x0160
91#define __LC_SYSTEM_TIMER 0x270 85#define __LC_IO_OLD_PSW 0x0170
92#define __LC_STEAL_TIMER 0x278 86#define __LC_EXT_NEW_PSW 0x01b0
93#define __LC_LAST_UPDATE_TIMER 0x280 87#define __LC_SVC_NEW_PSW 0x01c0
94#define __LC_LAST_UPDATE_CLOCK 0x288 88#define __LC_PGM_NEW_PSW 0x01d0
95#define __LC_RETURN_MCCK_PSW 0x290 89#define __LC_MCK_NEW_PSW 0x01e0
96#define __LC_KERNEL_STACK 0xD40 90#define __LC_IO_NEW_PSW 0x01f0
97#define __LC_THREAD_INFO 0xD48 91#define __LC_SAVE_AREA 0x0200
98#define __LC_ASYNC_STACK 0xD50 92#define __LC_RETURN_PSW 0x0280
99#define __LC_KERNEL_ASCE 0xD58 93#define __LC_RETURN_MCCK_PSW 0x0290
100#define __LC_USER_ASCE 0xD60 94#define __LC_SYNC_ENTER_TIMER 0x02a0
101#define __LC_PANIC_STACK 0xD68 95#define __LC_ASYNC_ENTER_TIMER 0x02a8
102#define __LC_CPUID 0xD80 96#define __LC_EXIT_TIMER 0x02b0
103#define __LC_CURRENT 0xDD8 97#define __LC_USER_TIMER 0x02b8
104#define __LC_INT_CLOCK 0xDE8 98#define __LC_SYSTEM_TIMER 0x02c0
105#define __LC_VDSO_PER_CPU 0xE38 99#define __LC_STEAL_TIMER 0x02c8
106#endif /* __s390x__ */ 100#define __LC_LAST_UPDATE_TIMER 0x02d0
107 101#define __LC_LAST_UPDATE_CLOCK 0x02d8
108#define __LC_PASTE 0xE40 102#define __LC_CURRENT 0x02e0
109 103#define __LC_THREAD_INFO 0x02e8
110#define __LC_DUMP_REIPL 0xE00 104#define __LC_KERNEL_STACK 0x02f0
111#ifndef __s390x__ 105#define __LC_ASYNC_STACK 0x02f8
112#define __LC_PFAULT_INTPARM 0x080 106#define __LC_PANIC_STACK 0x0300
113#define __LC_CPU_TIMER_SAVE_AREA 0x0D8 107#define __LC_KERNEL_ASCE 0x0308
114#define __LC_CLOCK_COMP_SAVE_AREA 0x0E0 108#define __LC_USER_ASCE 0x0310
115#define __LC_PSW_SAVE_AREA 0x100 109#define __LC_USER_EXEC_ASCE 0x0318
116#define __LC_PREFIX_SAVE_AREA 0x108 110#define __LC_CPUID 0x0320
117#define __LC_AREGS_SAVE_AREA 0x120 111#define __LC_INT_CLOCK 0x0340
118#define __LC_FPREGS_SAVE_AREA 0x160 112#define __LC_VDSO_PER_CPU 0x0350
119#define __LC_GPREGS_SAVE_AREA 0x180 113#define __LC_IRB 0x0380
120#define __LC_CREGS_SAVE_AREA 0x1C0 114#define __LC_PASTE 0x03c0
121#else /* __s390x__ */ 115#define __LC_PFAULT_INTPARM 0x11b8
122#define __LC_PFAULT_INTPARM 0x11B8
123#define __LC_FPREGS_SAVE_AREA 0x1200 116#define __LC_FPREGS_SAVE_AREA 0x1200
124#define __LC_GPREGS_SAVE_AREA 0x1280 117#define __LC_GPREGS_SAVE_AREA 0x1280
125#define __LC_PSW_SAVE_AREA 0x1300 118#define __LC_PSW_SAVE_AREA 0x1300
126#define __LC_PREFIX_SAVE_AREA 0x1318 119#define __LC_PREFIX_SAVE_AREA 0x1318
127#define __LC_FP_CREG_SAVE_AREA 0x131C 120#define __LC_FP_CREG_SAVE_AREA 0x131c
128#define __LC_TODREG_SAVE_AREA 0x1324 121#define __LC_TODREG_SAVE_AREA 0x1324
129#define __LC_CPU_TIMER_SAVE_AREA 0x1328 122#define __LC_CPU_TIMER_SAVE_AREA 0x1328
130#define __LC_CLOCK_COMP_SAVE_AREA 0x1331 123#define __LC_CLOCK_COMP_SAVE_AREA 0x1331
131#define __LC_AREGS_SAVE_AREA 0x1340 124#define __LC_AREGS_SAVE_AREA 0x1340
132#define __LC_CREGS_SAVE_AREA 0x1380 125#define __LC_CREGS_SAVE_AREA 0x1380
133#endif /* __s390x__ */ 126#endif /* __s390x__ */
134 127
135#ifndef __ASSEMBLY__ 128#ifndef __ASSEMBLY__
@@ -194,227 +187,240 @@ union save_area {
194struct _lowcore 187struct _lowcore
195{ 188{
196#ifndef __s390x__ 189#ifndef __s390x__
197 /* prefix area: defined by architecture */ 190 /* 0x0000 - 0x01ff: defined by architecture */
198 psw_t restart_psw; /* 0x000 */ 191 psw_t restart_psw; /* 0x0000 */
199 __u32 ccw2[4]; /* 0x008 */ 192 __u32 ccw2[4]; /* 0x0008 */
200 psw_t external_old_psw; /* 0x018 */ 193 psw_t external_old_psw; /* 0x0018 */
201 psw_t svc_old_psw; /* 0x020 */ 194 psw_t svc_old_psw; /* 0x0020 */
202 psw_t program_old_psw; /* 0x028 */ 195 psw_t program_old_psw; /* 0x0028 */
203 psw_t mcck_old_psw; /* 0x030 */ 196 psw_t mcck_old_psw; /* 0x0030 */
204 psw_t io_old_psw; /* 0x038 */ 197 psw_t io_old_psw; /* 0x0038 */
205 __u8 pad1[0x58-0x40]; /* 0x040 */ 198 __u8 pad_0x0040[0x0058-0x0040]; /* 0x0040 */
206 psw_t external_new_psw; /* 0x058 */ 199 psw_t external_new_psw; /* 0x0058 */
207 psw_t svc_new_psw; /* 0x060 */ 200 psw_t svc_new_psw; /* 0x0060 */
208 psw_t program_new_psw; /* 0x068 */ 201 psw_t program_new_psw; /* 0x0068 */
209 psw_t mcck_new_psw; /* 0x070 */ 202 psw_t mcck_new_psw; /* 0x0070 */
210 psw_t io_new_psw; /* 0x078 */ 203 psw_t io_new_psw; /* 0x0078 */
211 __u32 ext_params; /* 0x080 */ 204 __u32 ext_params; /* 0x0080 */
212 __u16 cpu_addr; /* 0x084 */ 205 __u16 cpu_addr; /* 0x0084 */
213 __u16 ext_int_code; /* 0x086 */ 206 __u16 ext_int_code; /* 0x0086 */
214 __u16 svc_ilc; /* 0x088 */ 207 __u16 svc_ilc; /* 0x0088 */
215 __u16 svc_code; /* 0x08a */ 208 __u16 svc_code; /* 0x008a */
216 __u16 pgm_ilc; /* 0x08c */ 209 __u16 pgm_ilc; /* 0x008c */
217 __u16 pgm_code; /* 0x08e */ 210 __u16 pgm_code; /* 0x008e */
218 __u32 trans_exc_code; /* 0x090 */ 211 __u32 trans_exc_code; /* 0x0090 */
219 __u16 mon_class_num; /* 0x094 */ 212 __u16 mon_class_num; /* 0x0094 */
220 __u16 per_perc_atmid; /* 0x096 */ 213 __u16 per_perc_atmid; /* 0x0096 */
221 __u32 per_address; /* 0x098 */ 214 __u32 per_address; /* 0x0098 */
222 __u32 monitor_code; /* 0x09c */ 215 __u32 monitor_code; /* 0x009c */
223 __u8 exc_access_id; /* 0x0a0 */ 216 __u8 exc_access_id; /* 0x00a0 */
224 __u8 per_access_id; /* 0x0a1 */ 217 __u8 per_access_id; /* 0x00a1 */
225 __u8 pad2[0xB8-0xA2]; /* 0x0a2 */ 218 __u8 pad_0x00a2[0x00b8-0x00a2]; /* 0x00a2 */
226 __u16 subchannel_id; /* 0x0b8 */ 219 __u16 subchannel_id; /* 0x00b8 */
227 __u16 subchannel_nr; /* 0x0ba */ 220 __u16 subchannel_nr; /* 0x00ba */
228 __u32 io_int_parm; /* 0x0bc */ 221 __u32 io_int_parm; /* 0x00bc */
229 __u32 io_int_word; /* 0x0c0 */ 222 __u32 io_int_word; /* 0x00c0 */
230 __u8 pad3[0xc8-0xc4]; /* 0x0c4 */ 223 __u8 pad_0x00c4[0x00c8-0x00c4]; /* 0x00c4 */
231 __u32 stfl_fac_list; /* 0x0c8 */ 224 __u32 stfl_fac_list; /* 0x00c8 */
232 __u8 pad4[0xd4-0xcc]; /* 0x0cc */ 225 __u8 pad_0x00cc[0x00d4-0x00cc]; /* 0x00cc */
233 __u32 extended_save_area_addr; /* 0x0d4 */ 226 __u32 extended_save_area_addr; /* 0x00d4 */
234 __u32 cpu_timer_save_area[2]; /* 0x0d8 */ 227 __u32 cpu_timer_save_area[2]; /* 0x00d8 */
235 __u32 clock_comp_save_area[2]; /* 0x0e0 */ 228 __u32 clock_comp_save_area[2]; /* 0x00e0 */
236 __u32 mcck_interruption_code[2]; /* 0x0e8 */ 229 __u32 mcck_interruption_code[2]; /* 0x00e8 */
237 __u8 pad5[0xf4-0xf0]; /* 0x0f0 */ 230 __u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */
238 __u32 external_damage_code; /* 0x0f4 */ 231 __u32 external_damage_code; /* 0x00f4 */
239 __u32 failing_storage_address; /* 0x0f8 */ 232 __u32 failing_storage_address; /* 0x00f8 */
240 __u8 pad6[0x100-0xfc]; /* 0x0fc */ 233 __u8 pad_0x00fc[0x0100-0x00fc]; /* 0x00fc */
241 __u32 st_status_fixed_logout[4];/* 0x100 */ 234 __u32 st_status_fixed_logout[4]; /* 0x0100 */
242 __u8 pad7[0x120-0x110]; /* 0x110 */ 235 __u8 pad_0x0110[0x0120-0x0110]; /* 0x0110 */
243 __u32 access_regs_save_area[16];/* 0x120 */ 236
244 __u32 floating_pt_save_area[8]; /* 0x160 */ 237 /* CPU register save area: defined by architecture */
245 __u32 gpregs_save_area[16]; /* 0x180 */ 238 __u32 access_regs_save_area[16]; /* 0x0120 */
246 __u32 cregs_save_area[16]; /* 0x1c0 */ 239 __u32 floating_pt_save_area[8]; /* 0x0160 */
247 240 __u32 gpregs_save_area[16]; /* 0x0180 */
248 psw_t return_psw; /* 0x200 */ 241 __u32 cregs_save_area[16]; /* 0x01c0 */
249 __u8 irb[64]; /* 0x208 */ 242
250 __u64 sync_enter_timer; /* 0x248 */ 243 /* Return psws. */
251 __u64 async_enter_timer; /* 0x250 */ 244 __u32 save_area[16]; /* 0x0200 */
252 __u64 exit_timer; /* 0x258 */ 245 psw_t return_psw; /* 0x0240 */
253 __u64 user_timer; /* 0x260 */ 246 psw_t return_mcck_psw; /* 0x0248 */
254 __u64 system_timer; /* 0x268 */ 247
255 __u64 steal_timer; /* 0x270 */ 248 /* CPU time accounting values */
256 __u64 last_update_timer; /* 0x278 */ 249 __u64 sync_enter_timer; /* 0x0250 */
257 __u64 last_update_clock; /* 0x280 */ 250 __u64 async_enter_timer; /* 0x0258 */
258 psw_t return_mcck_psw; /* 0x288 */ 251 __u64 exit_timer; /* 0x0260 */
259 __u8 pad8[0xc00-0x290]; /* 0x290 */ 252 __u64 user_timer; /* 0x0268 */
260 253 __u64 system_timer; /* 0x0270 */
261 /* System info area */ 254 __u64 steal_timer; /* 0x0278 */
262 __u32 save_area[16]; /* 0xc00 */ 255 __u64 last_update_timer; /* 0x0280 */
263 __u32 kernel_stack; /* 0xc40 */ 256 __u64 last_update_clock; /* 0x0288 */
264 __u32 thread_info; /* 0xc44 */ 257
265 __u32 async_stack; /* 0xc48 */ 258 /* Current process. */
266 __u32 kernel_asce; /* 0xc4c */ 259 __u32 current_task; /* 0x0290 */
267 __u32 user_asce; /* 0xc50 */ 260 __u32 thread_info; /* 0x0294 */
268 __u32 panic_stack; /* 0xc54 */ 261 __u32 kernel_stack; /* 0x0298 */
269 __u32 user_exec_asce; /* 0xc58 */ 262
270 __u8 pad10[0xc60-0xc5c]; /* 0xc5c */ 263 /* Interrupt and panic stack. */
271 /* entry.S sensitive area start */ 264 __u32 async_stack; /* 0x029c */
272 cpuid_t cpu_id; /* 0xc60 */ 265 __u32 panic_stack; /* 0x02a0 */
273 __u32 cpu_nr; /* 0xc68 */ 266
274 __u8 pad_0xc6c[0xc80-0xc6c]; /* 0xc6c */ 267 /* Address space pointer. */
275 /* entry.S sensitive area end */ 268 __u32 kernel_asce; /* 0x02a4 */
276 269 __u32 user_asce; /* 0x02a8 */
277 /* SMP info area: defined by DJB */ 270 __u32 user_exec_asce; /* 0x02ac */
278 __u64 clock_comparator; /* 0xc80 */ 271
279 __u32 ext_call_fast; /* 0xc88 */ 272 /* SMP info area */
280 __u32 percpu_offset; /* 0xc8c */ 273 cpuid_t cpu_id; /* 0x02b0 */
281 __u32 current_task; /* 0xc90 */ 274 __u32 cpu_nr; /* 0x02b8 */
282 __u32 softirq_pending; /* 0xc94 */ 275 __u32 softirq_pending; /* 0x02bc */
283 __u64 int_clock; /* 0xc98 */ 276 __u32 percpu_offset; /* 0x02c0 */
284 __u8 pad11[0xe00-0xca0]; /* 0xca0 */ 277 __u32 ext_call_fast; /* 0x02c4 */
285 278 __u64 int_clock; /* 0x02c8 */
286 /* 0xe00 contains the address of the IPL Parameter */ 279 __u64 clock_comparator; /* 0x02d0 */
287 /* Information block. Dump tools need IPIB for IPL */ 280 __u8 pad_0x02d8[0x0300-0x02d8]; /* 0x02d8 */
288 /* after dump. */ 281
289 __u32 ipib; /* 0xe00 */ 282 /* Interrupt response block */
290 __u32 ipib_checksum; /* 0xe04 */ 283 __u8 irb[64]; /* 0x0300 */
291 284
292 /* Align to the top 1k of prefix area */ 285 __u8 pad_0x0400[0x0e00-0x0400]; /* 0x0400 */
293 __u8 pad12[0x1000-0xe08]; /* 0xe08 */ 286
287 /*
288 * 0xe00 contains the address of the IPL Parameter Information
289 * block. Dump tools need IPIB for IPL after dump.
290 * Note: do not change the position of any fields in 0x0e00-0x0f00
291 */
292 __u32 ipib; /* 0x0e00 */
293 __u32 ipib_checksum; /* 0x0e04 */
294
295 /* Align to the top 1k of prefix area */
296 __u8 pad_0x0e08[0x1000-0x0e08]; /* 0x0e08 */
294#else /* !__s390x__ */ 297#else /* !__s390x__ */
295 /* prefix area: defined by architecture */ 298 /* 0x0000 - 0x01ff: defined by architecture */
296 __u32 ccw1[2]; /* 0x000 */ 299 __u32 ccw1[2]; /* 0x0000 */
297 __u32 ccw2[4]; /* 0x008 */ 300 __u32 ccw2[4]; /* 0x0008 */
298 __u8 pad1[0x80-0x18]; /* 0x018 */ 301 __u8 pad_0x0018[0x0080-0x0018]; /* 0x0018 */
299 __u32 ext_params; /* 0x080 */ 302 __u32 ext_params; /* 0x0080 */
300 __u16 cpu_addr; /* 0x084 */ 303 __u16 cpu_addr; /* 0x0084 */
301 __u16 ext_int_code; /* 0x086 */ 304 __u16 ext_int_code; /* 0x0086 */
302 __u16 svc_ilc; /* 0x088 */ 305 __u16 svc_ilc; /* 0x0088 */
303 __u16 svc_code; /* 0x08a */ 306 __u16 svc_code; /* 0x008a */
304 __u16 pgm_ilc; /* 0x08c */ 307 __u16 pgm_ilc; /* 0x008c */
305 __u16 pgm_code; /* 0x08e */ 308 __u16 pgm_code; /* 0x008e */
306 __u32 data_exc_code; /* 0x090 */ 309 __u32 data_exc_code; /* 0x0090 */
307 __u16 mon_class_num; /* 0x094 */ 310 __u16 mon_class_num; /* 0x0094 */
308 __u16 per_perc_atmid; /* 0x096 */ 311 __u16 per_perc_atmid; /* 0x0096 */
309 addr_t per_address; /* 0x098 */ 312 addr_t per_address; /* 0x0098 */
310 __u8 exc_access_id; /* 0x0a0 */ 313 __u8 exc_access_id; /* 0x00a0 */
311 __u8 per_access_id; /* 0x0a1 */ 314 __u8 per_access_id; /* 0x00a1 */
312 __u8 op_access_id; /* 0x0a2 */ 315 __u8 op_access_id; /* 0x00a2 */
313 __u8 ar_access_id; /* 0x0a3 */ 316 __u8 ar_access_id; /* 0x00a3 */
314 __u8 pad2[0xA8-0xA4]; /* 0x0a4 */ 317 __u8 pad_0x00a4[0x00a8-0x00a4]; /* 0x00a4 */
315 addr_t trans_exc_code; /* 0x0a8 */ 318 addr_t trans_exc_code; /* 0x00a8 */
316 addr_t monitor_code; /* 0x0b0 */ 319 addr_t monitor_code; /* 0x00b0 */
317 __u16 subchannel_id; /* 0x0b8 */ 320 __u16 subchannel_id; /* 0x00b8 */
318 __u16 subchannel_nr; /* 0x0ba */ 321 __u16 subchannel_nr; /* 0x00ba */
319 __u32 io_int_parm; /* 0x0bc */ 322 __u32 io_int_parm; /* 0x00bc */
320 __u32 io_int_word; /* 0x0c0 */ 323 __u32 io_int_word; /* 0x00c0 */
321 __u8 pad3[0xc8-0xc4]; /* 0x0c4 */ 324 __u8 pad_0x00c4[0x00c8-0x00c4]; /* 0x00c4 */
322 __u32 stfl_fac_list; /* 0x0c8 */ 325 __u32 stfl_fac_list; /* 0x00c8 */
323 __u8 pad4[0xe8-0xcc]; /* 0x0cc */ 326 __u8 pad_0x00cc[0x00e8-0x00cc]; /* 0x00cc */
324 __u32 mcck_interruption_code[2]; /* 0x0e8 */ 327 __u32 mcck_interruption_code[2]; /* 0x00e8 */
325 __u8 pad5[0xf4-0xf0]; /* 0x0f0 */ 328 __u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */
326 __u32 external_damage_code; /* 0x0f4 */ 329 __u32 external_damage_code; /* 0x00f4 */
327 addr_t failing_storage_address; /* 0x0f8 */ 330 addr_t failing_storage_address; /* 0x00f8 */
328 __u8 pad6[0x120-0x100]; /* 0x100 */ 331 __u8 pad_0x0100[0x0120-0x0100]; /* 0x0100 */
329 psw_t restart_old_psw; /* 0x120 */ 332 psw_t restart_old_psw; /* 0x0120 */
330 psw_t external_old_psw; /* 0x130 */ 333 psw_t external_old_psw; /* 0x0130 */
331 psw_t svc_old_psw; /* 0x140 */ 334 psw_t svc_old_psw; /* 0x0140 */
332 psw_t program_old_psw; /* 0x150 */ 335 psw_t program_old_psw; /* 0x0150 */
333 psw_t mcck_old_psw; /* 0x160 */ 336 psw_t mcck_old_psw; /* 0x0160 */
334 psw_t io_old_psw; /* 0x170 */ 337 psw_t io_old_psw; /* 0x0170 */
335 __u8 pad7[0x1a0-0x180]; /* 0x180 */ 338 __u8 pad_0x0180[0x01a0-0x0180]; /* 0x0180 */
336 psw_t restart_psw; /* 0x1a0 */ 339 psw_t restart_psw; /* 0x01a0 */
337 psw_t external_new_psw; /* 0x1b0 */ 340 psw_t external_new_psw; /* 0x01b0 */
338 psw_t svc_new_psw; /* 0x1c0 */ 341 psw_t svc_new_psw; /* 0x01c0 */
339 psw_t program_new_psw; /* 0x1d0 */ 342 psw_t program_new_psw; /* 0x01d0 */
340 psw_t mcck_new_psw; /* 0x1e0 */ 343 psw_t mcck_new_psw; /* 0x01e0 */
341 psw_t io_new_psw; /* 0x1f0 */ 344 psw_t io_new_psw; /* 0x01f0 */
342 psw_t return_psw; /* 0x200 */ 345
343 __u8 irb[64]; /* 0x210 */ 346 /* Entry/exit save area & return psws. */
344 __u64 sync_enter_timer; /* 0x250 */ 347 __u64 save_area[16]; /* 0x0200 */
345 __u64 async_enter_timer; /* 0x258 */ 348 psw_t return_psw; /* 0x0280 */
346 __u64 exit_timer; /* 0x260 */ 349 psw_t return_mcck_psw; /* 0x0290 */
347 __u64 user_timer; /* 0x268 */ 350
348 __u64 system_timer; /* 0x270 */ 351 /* CPU accounting and timing values. */
349 __u64 steal_timer; /* 0x278 */ 352 __u64 sync_enter_timer; /* 0x02a0 */
350 __u64 last_update_timer; /* 0x280 */ 353 __u64 async_enter_timer; /* 0x02a8 */
351 __u64 last_update_clock; /* 0x288 */ 354 __u64 exit_timer; /* 0x02b0 */
352 psw_t return_mcck_psw; /* 0x290 */ 355 __u64 user_timer; /* 0x02b8 */
353 __u8 pad8[0xc00-0x2a0]; /* 0x2a0 */ 356 __u64 system_timer; /* 0x02c0 */
354 /* System info area */ 357 __u64 steal_timer; /* 0x02c8 */
355 __u64 save_area[16]; /* 0xc00 */ 358 __u64 last_update_timer; /* 0x02d0 */
356 __u8 pad9[0xd40-0xc80]; /* 0xc80 */ 359 __u64 last_update_clock; /* 0x02d8 */
357 __u64 kernel_stack; /* 0xd40 */ 360
358 __u64 thread_info; /* 0xd48 */ 361 /* Current process. */
359 __u64 async_stack; /* 0xd50 */ 362 __u64 current_task; /* 0x02e0 */
360 __u64 kernel_asce; /* 0xd58 */ 363 __u64 thread_info; /* 0x02e8 */
361 __u64 user_asce; /* 0xd60 */ 364 __u64 kernel_stack; /* 0x02f0 */
362 __u64 panic_stack; /* 0xd68 */ 365
363 __u64 user_exec_asce; /* 0xd70 */ 366 /* Interrupt and panic stack. */
364 __u8 pad10[0xd80-0xd78]; /* 0xd78 */ 367 __u64 async_stack; /* 0x02f8 */
365 /* entry.S sensitive area start */ 368 __u64 panic_stack; /* 0x0300 */
366 cpuid_t cpu_id; /* 0xd80 */ 369
367 __u32 cpu_nr; /* 0xd88 */ 370 /* Address space pointer. */
368 __u8 pad_0xd8c[0xdc0-0xd8c]; /* 0xd8c */ 371 __u64 kernel_asce; /* 0x0308 */
369 /* entry.S sensitive area end */ 372 __u64 user_asce; /* 0x0310 */
370 373 __u64 user_exec_asce; /* 0x0318 */
371 /* SMP info area: defined by DJB */ 374
372 __u64 clock_comparator; /* 0xdc0 */ 375 /* SMP info area */
373 __u64 ext_call_fast; /* 0xdc8 */ 376 cpuid_t cpu_id; /* 0x0320 */
374 __u64 percpu_offset; /* 0xdd0 */ 377 __u32 cpu_nr; /* 0x0328 */
375 __u64 current_task; /* 0xdd8 */ 378 __u32 softirq_pending; /* 0x032c */
376 __u32 softirq_pending; /* 0xde0 */ 379 __u64 percpu_offset; /* 0x0330 */
377 __u32 pad_0x0de4; /* 0xde4 */ 380 __u64 ext_call_fast; /* 0x0338 */
378 __u64 int_clock; /* 0xde8 */ 381 __u64 int_clock; /* 0x0340 */
379 __u8 pad12[0xe00-0xdf0]; /* 0xdf0 */ 382 __u64 clock_comparator; /* 0x0348 */
380 383 __u64 vdso_per_cpu_data; /* 0x0350 */
381 /* 0xe00 contains the address of the IPL Parameter */ 384 __u8 pad_0x0358[0x0380-0x0358]; /* 0x0358 */
382 /* Information block. Dump tools need IPIB for IPL */ 385
383 /* after dump. */ 386 /* Interrupt response block. */
384 __u64 ipib; /* 0xe00 */ 387 __u8 irb[64]; /* 0x0380 */
385 __u32 ipib_checksum; /* 0xe08 */
386 388
387 /* Per cpu primary space access list */ 389 /* Per cpu primary space access list */
388 __u8 pad_0xe0c[0xe38-0xe0c]; /* 0xe0c */ 390 __u32 paste[16]; /* 0x03c0 */
389 __u64 vdso_per_cpu_data; /* 0xe38 */ 391
390 __u32 paste[16]; /* 0xe40 */ 392 __u8 pad_0x0400[0x0e00-0x0400]; /* 0x0400 */
391 393
392 __u8 pad13[0x11b8-0xe80]; /* 0xe80 */ 394 /*
393 395 * 0xe00 contains the address of the IPL Parameter Information
394 /* 64 bit extparam used for pfault, diag 250 etc */ 396 * block. Dump tools need IPIB for IPL after dump.
395 __u64 ext_params2; /* 0x11B8 */ 397 * Note: do not change the position of any fields in 0x0e00-0x0f00
396 398 */
397 __u8 pad14[0x1200-0x11C0]; /* 0x11C0 */ 399 __u64 ipib; /* 0x0e00 */
398 400 __u32 ipib_checksum; /* 0x0e08 */
399 /* System info area */ 401 __u8 pad_0x0e0c[0x11b8-0x0e0c]; /* 0x0e0c */
400 402
401 __u64 floating_pt_save_area[16]; /* 0x1200 */ 403 /* 64 bit extparam used for pfault/diag 250: defined by architecture */
402 __u64 gpregs_save_area[16]; /* 0x1280 */ 404 __u64 ext_params2; /* 0x11B8 */
403 __u32 st_status_fixed_logout[4]; /* 0x1300 */ 405 __u8 pad_0x11c0[0x1200-0x11C0]; /* 0x11C0 */
404 __u8 pad15[0x1318-0x1310]; /* 0x1310 */ 406
405 __u32 prefixreg_save_area; /* 0x1318 */ 407 /* CPU register save area: defined by architecture */
406 __u32 fpt_creg_save_area; /* 0x131c */ 408 __u64 floating_pt_save_area[16]; /* 0x1200 */
407 __u8 pad16[0x1324-0x1320]; /* 0x1320 */ 409 __u64 gpregs_save_area[16]; /* 0x1280 */
408 __u32 tod_progreg_save_area; /* 0x1324 */ 410 __u32 st_status_fixed_logout[4]; /* 0x1300 */
409 __u32 cpu_timer_save_area[2]; /* 0x1328 */ 411 __u8 pad_0x1310[0x1318-0x1310]; /* 0x1310 */
410 __u32 clock_comp_save_area[2]; /* 0x1330 */ 412 __u32 prefixreg_save_area; /* 0x1318 */
411 __u8 pad17[0x1340-0x1338]; /* 0x1338 */ 413 __u32 fpt_creg_save_area; /* 0x131c */
412 __u32 access_regs_save_area[16]; /* 0x1340 */ 414 __u8 pad_0x1320[0x1324-0x1320]; /* 0x1320 */
413 __u64 cregs_save_area[16]; /* 0x1380 */ 415 __u32 tod_progreg_save_area; /* 0x1324 */
416 __u32 cpu_timer_save_area[2]; /* 0x1328 */
417 __u32 clock_comp_save_area[2]; /* 0x1330 */
418 __u8 pad_0x1338[0x1340-0x1338]; /* 0x1338 */
419 __u32 access_regs_save_area[16]; /* 0x1340 */
420 __u64 cregs_save_area[16]; /* 0x1380 */
414 421
415 /* align to the top of the prefix area */ 422 /* align to the top of the prefix area */
416 423 __u8 pad_0x1400[0x2000-0x1400]; /* 0x1400 */
417 __u8 pad18[0x2000-0x1400]; /* 0x1400 */
418#endif /* !__s390x__ */ 424#endif /* !__s390x__ */
419} __attribute__((packed)); /* End structure*/ 425} __attribute__((packed)); /* End structure*/
420 426
diff --git a/arch/s390/kernel/head.S b/arch/s390/kernel/head.S
index ec7e35f6055b..1046c2c9f8d1 100644
--- a/arch/s390/kernel/head.S
+++ b/arch/s390/kernel/head.S
@@ -469,6 +469,8 @@ start:
469 .org 0x10000 469 .org 0x10000
470startup:basr %r13,0 # get base 470startup:basr %r13,0 # get base
471.LPG0: 471.LPG0:
472 xc 0x200(256),0x200 # partially clear lowcore
473 xc 0x300(256),0x300
472 474
473#ifndef CONFIG_MARCH_G5 475#ifndef CONFIG_MARCH_G5
474 # check processor version against MARCH_{G5,Z900,Z990,Z9_109,Z10} 476 # check processor version against MARCH_{G5,Z900,Z990,Z9_109,Z10}
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-24 03:25:54 -0400