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authorMartin Schwidefsky <schwidefsky@de.ibm.com>2011-07-24 04:48:28 -0400
committerMartin Schwidefsky <schwidefsky@de.ibm.com>2011-07-24 04:48:22 -0400
commit5beab99100335936f4d845f9ae2f0e25796f2584 (patch)
tree001c61d9a2250caf3081aea8ab19590fb8fe6f1b /arch/s390
parent89c9b66b104549a8698e412bf6f4140c1d0786fb (diff)
[S390] iucv cr0 enablement bit
Do not set the cr0 enablement bit for iucv by default in head[31|64].S, move the enablement to iucv_init in the iucv base layer. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'arch/s390')
-rw-r--r--arch/s390/kernel/head31.S2
-rw-r--r--arch/s390/kernel/head64.S2
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/s390/kernel/head31.S b/arch/s390/kernel/head31.S
index dd0d1e272be9..f21954b44dc1 100644
--- a/arch/s390/kernel/head31.S
+++ b/arch/s390/kernel/head31.S
@@ -45,7 +45,7 @@ ENTRY(startup_continue)
45 # virtual and never return ... 45 # virtual and never return ...
46 .align 8 46 .align 8
47.Lentry:.long 0x00080000,0x80000000 + _stext 47.Lentry:.long 0x00080000,0x80000000 + _stext
48.Lctl: .long 0x04b50002 # cr0: various things 48.Lctl: .long 0x04b50000 # cr0: various things
49 .long 0 # cr1: primary space segment table 49 .long 0 # cr1: primary space segment table
50 .long .Lduct # cr2: dispatchable unit control table 50 .long .Lduct # cr2: dispatchable unit control table
51 .long 0 # cr3: instruction authorization 51 .long 0 # cr3: instruction authorization
diff --git a/arch/s390/kernel/head64.S b/arch/s390/kernel/head64.S
index 188602898c17..b6d30135e2ec 100644
--- a/arch/s390/kernel/head64.S
+++ b/arch/s390/kernel/head64.S
@@ -46,7 +46,7 @@ ENTRY(startup_continue)
46 .align 16 46 .align 16
47.LPG1: 47.LPG1:
48.Lentry:.quad 0x0000000180000000,_stext 48.Lentry:.quad 0x0000000180000000,_stext
49.Lctl: .quad 0x04350002 # cr0: various things 49.Lctl: .quad 0x04350000 # cr0: various things
50 .quad 0 # cr1: primary space segment table 50 .quad 0 # cr1: primary space segment table
51 .quad .Lduct # cr2: dispatchable unit control table 51 .quad .Lduct # cr2: dispatchable unit control table
52 .quad 0 # cr3: instruction authorization 52 .quad 0 # cr3: instruction authorization