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authorAndré Goddard Rosa <andre.goddard@gmail.com>2009-11-14 10:09:05 -0500
committerJiri Kosina <jkosina@suse.cz>2009-12-04 09:39:55 -0500
commitaf901ca181d92aac3a7dc265144a9081a86d8f39 (patch)
tree380054af22521144fbe1364c3bcd55ad24c9bde4 /arch/s390/math-emu/math.c
parent972b94ffb90ea6d20c589d9a47215df103388ddd (diff)
tree-wide: fix assorted typos all over the place
That is "success", "unknown", "through", "performance", "[re|un]mapping" , "access", "default", "reasonable", "[con]currently", "temperature" , "channel", "[un]used", "application", "example","hierarchy", "therefore" , "[over|under]flow", "contiguous", "threshold", "enough" and others. Signed-off-by: André Goddard Rosa <andre.goddard@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Diffstat (limited to 'arch/s390/math-emu/math.c')
-rw-r--r--arch/s390/math-emu/math.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/s390/math-emu/math.c b/arch/s390/math-emu/math.c
index 3ee78ccb617d..cd4e9c168dd7 100644
--- a/arch/s390/math-emu/math.c
+++ b/arch/s390/math-emu/math.c
@@ -2088,7 +2088,7 @@ int math_emu_ldr(__u8 *opcode) {
2088 __u16 opc = *((__u16 *) opcode); 2088 __u16 opc = *((__u16 *) opcode);
2089 2089
2090 if ((opc & 0x90) == 0) { /* test if rx in {0,2,4,6} */ 2090 if ((opc & 0x90) == 0) { /* test if rx in {0,2,4,6} */
2091 /* we got an exception therfore ry can't be in {0,2,4,6} */ 2091 /* we got an exception therefore ry can't be in {0,2,4,6} */
2092 asm volatile( /* load rx from fp_regs.fprs[ry] */ 2092 asm volatile( /* load rx from fp_regs.fprs[ry] */
2093 " bras 1,0f\n" 2093 " bras 1,0f\n"
2094 " ld 0,0(%1)\n" 2094 " ld 0,0(%1)\n"
@@ -2118,7 +2118,7 @@ int math_emu_ler(__u8 *opcode) {
2118 __u16 opc = *((__u16 *) opcode); 2118 __u16 opc = *((__u16 *) opcode);
2119 2119
2120 if ((opc & 0x90) == 0) { /* test if rx in {0,2,4,6} */ 2120 if ((opc & 0x90) == 0) { /* test if rx in {0,2,4,6} */
2121 /* we got an exception therfore ry can't be in {0,2,4,6} */ 2121 /* we got an exception therefore ry can't be in {0,2,4,6} */
2122 asm volatile( /* load rx from fp_regs.fprs[ry] */ 2122 asm volatile( /* load rx from fp_regs.fprs[ry] */
2123 " bras 1,0f\n" 2123 " bras 1,0f\n"
2124 " le 0,0(%1)\n" 2124 " le 0,0(%1)\n"