diff options
author | Dave Airlie <airlied@redhat.com> | 2010-12-21 18:48:54 -0500 |
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committer | Dave Airlie <airlied@redhat.com> | 2010-12-21 18:48:54 -0500 |
commit | ae09f09e94d755ed45c58b695675636c0ec53f9e (patch) | |
tree | 77cb9bac7d81f5b1250b8638a007e10c17b600af /arch/s390/lib/delay.c | |
parent | 1d99e5c57255d188773fb437391df24fe8faf575 (diff) | |
parent | 5909a77ac62cc042f94bd262016cf468a2f96022 (diff) |
Merge remote branch 'intel/drm-intel-next' of /ssd/git/drm-next into drm-core-next
* 'intel/drm-intel-next' of /ssd/git/drm-next: (771 commits)
drm/i915: Undo "Uncouple render/power ctx before suspending"
drm/i915: Allow the application to choose the constant addressing mode
drm/i915: dynamic render p-state support for Sandy Bridge
drm/i915: Enable EI mode for RCx decision making on Sandybridge
drm/i915/sdvo: Border and stall select became test bits in gen5
drm/i915: Add Guess-o-matic for pageflip timestamping.
drm/i915: Add support for precise vblank timestamping (v2)
drm/i915: Add frame buffer compression on Sandybridge
drm/i915: Add self-refresh support on Sandybridge
drm/i915: Wait for vblank before unpinning old fb
Revert "drm/i915: Avoid using PIPE_CONTROL on Ironlake"
drm/i915: Pass clock limits down to PLL matcher
drm/i915: Poll for seqno completion if IRQ is disabled
drm/i915/ringbuffer: Make IRQ refcnting atomic
agp/intel: Fix missed cached memory flags setting in i965_write_entry()
drm/i915/sdvo: Only use the SDVO pin if it is in the valid range
drm/i915: Enable RC6 autodownclocking on Sandybridge
drm/i915: Terminate the FORCE WAKE after we have finished reading
drm/i915/gtt: Clear the cachelines upon resume
drm/i915: Restore GTT mapping first upon resume
...
Diffstat (limited to 'arch/s390/lib/delay.c')
-rw-r--r-- | arch/s390/lib/delay.c | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/arch/s390/lib/delay.c b/arch/s390/lib/delay.c index 752b362bf651..7c37ec359ec2 100644 --- a/arch/s390/lib/delay.c +++ b/arch/s390/lib/delay.c | |||
@@ -29,17 +29,21 @@ static void __udelay_disabled(unsigned long long usecs) | |||
29 | { | 29 | { |
30 | unsigned long mask, cr0, cr0_saved; | 30 | unsigned long mask, cr0, cr0_saved; |
31 | u64 clock_saved; | 31 | u64 clock_saved; |
32 | u64 end; | ||
32 | 33 | ||
34 | mask = psw_kernel_bits | PSW_MASK_WAIT | PSW_MASK_EXT; | ||
35 | end = get_clock() + (usecs << 12); | ||
33 | clock_saved = local_tick_disable(); | 36 | clock_saved = local_tick_disable(); |
34 | set_clock_comparator(get_clock() + (usecs << 12)); | ||
35 | __ctl_store(cr0_saved, 0, 0); | 37 | __ctl_store(cr0_saved, 0, 0); |
36 | cr0 = (cr0_saved & 0xffff00e0) | 0x00000800; | 38 | cr0 = (cr0_saved & 0xffff00e0) | 0x00000800; |
37 | __ctl_load(cr0 , 0, 0); | 39 | __ctl_load(cr0 , 0, 0); |
38 | mask = psw_kernel_bits | PSW_MASK_WAIT | PSW_MASK_EXT; | ||
39 | lockdep_off(); | 40 | lockdep_off(); |
40 | trace_hardirqs_on(); | 41 | do { |
41 | __load_psw_mask(mask); | 42 | set_clock_comparator(end); |
42 | local_irq_disable(); | 43 | trace_hardirqs_on(); |
44 | __load_psw_mask(mask); | ||
45 | local_irq_disable(); | ||
46 | } while (get_clock() < end); | ||
43 | lockdep_on(); | 47 | lockdep_on(); |
44 | __ctl_load(cr0_saved, 0, 0); | 48 | __ctl_load(cr0_saved, 0, 0); |
45 | local_tick_enable(clock_saved); | 49 | local_tick_enable(clock_saved); |