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authorMartin Schwidefsky <schwidefsky@de.ibm.com>2010-02-26 16:37:53 -0500
committerMartin Schwidefsky <sky@mschwide.boeblingen.de.ibm.com>2010-02-26 16:37:33 -0500
commit1844c9bc0b2fed3023551c1affe033ab38e90b9a (patch)
treeb9aca066ec58a0b211a4931032b74093fdb6ff49 /arch/s390/kernel/head64.S
parent73bfa5f2f71efcdcaad8d18cbed96b9d7ed86948 (diff)
[S390] add support for compressed kernels
Add the "bzImage" compile target and the necessary code to generate compressed kernel images. The old style uncompressed "image" target is preserved, a simple make will build them both. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'arch/s390/kernel/head64.S')
-rw-r--r--arch/s390/kernel/head64.S24
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/s390/kernel/head64.S b/arch/s390/kernel/head64.S
index 5419aabf8a66..39580e768658 100644
--- a/arch/s390/kernel/head64.S
+++ b/arch/s390/kernel/head64.S
@@ -1,7 +1,7 @@
1/* 1/*
2 * arch/s390/kernel/head64.S 2 * arch/s390/kernel/head64.S
3 * 3 *
4 * Copyright (C) IBM Corp. 1999,2006 4 * Copyright (C) IBM Corp. 1999,2010
5 * 5 *
6 * Author(s): Hartmut Penner <hp@de.ibm.com> 6 * Author(s): Hartmut Penner <hp@de.ibm.com>
7 * Martin Schwidefsky <schwidefsky@de.ibm.com> 7 * Martin Schwidefsky <schwidefsky@de.ibm.com>
@@ -10,18 +10,17 @@
10 * 10 *
11 */ 11 */
12 12
13 .org 0x11000 13#include <linux/init.h>
14#include <asm/asm-offsets.h>
15#include <asm/thread_info.h>
16#include <asm/page.h>
14 17
18__HEAD
19 .globl startup_continue
15startup_continue: 20startup_continue:
16 basr %r13,0 # get base 21 larl %r1,sched_clock_base_cc
17.LPG1: sll %r13,1 # remove high order bit 22 mvc 0(8,%r1),__LC_LAST_UPDATE_CLOCK
18 srl %r13,1 23 larl %r13,.LPG1 # get base
19 mvi __LC_AR_MODE_ID,1 # set esame flag
20 slr %r0,%r0 # set cpuid to zero
21 lhi %r1,2 # mode 2 = esame (dump)
22 sigp %r1,%r0,0x12 # switch to esame mode
23 sam64 # switch to 64 bit mode
24 llgfr %r13,%r13 # clear high-order half of base reg
25 lmh %r0,%r15,.Lzero64-.LPG1(%r13) # clear high-order half 24 lmh %r0,%r15,.Lzero64-.LPG1(%r13) # clear high-order half
26 lctlg %c0,%c15,.Lctl-.LPG1(%r13) # load control registers 25 lctlg %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
27 lg %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area 26 lg %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area
@@ -46,6 +45,7 @@ startup_continue:
46 lpswe .Lentry-.LPG1(13) # jump to _stext in primary-space, 45 lpswe .Lentry-.LPG1(13) # jump to _stext in primary-space,
47 # virtual and never return ... 46 # virtual and never return ...
48 .align 16 47 .align 16
48.LPG1:
49.Lentry:.quad 0x0000000180000000,_stext 49.Lentry:.quad 0x0000000180000000,_stext
50.Lctl: .quad 0x04350002 # cr0: various things 50.Lctl: .quad 0x04350002 # cr0: various things
51 .quad 0 # cr1: primary space segment table 51 .quad 0 # cr1: primary space segment table
@@ -78,9 +78,9 @@ startup_continue:
78 .long 0x80000000,0,0,0 # invalid access-list entries 78 .long 0x80000000,0,0,0 # invalid access-list entries
79 .endr 79 .endr
80 80
81 .org 0x12000
82 .globl _ehead 81 .globl _ehead
83_ehead: 82_ehead:
83
84#ifdef CONFIG_SHARED_KERNEL 84#ifdef CONFIG_SHARED_KERNEL
85 .org 0x100000 85 .org 0x100000
86#endif 86#endif