diff options
author | Martin Schwidefsky <schwidefsky@de.ibm.com> | 2008-12-25 07:39:19 -0500 |
---|---|---|
committer | Martin Schwidefsky <schwidefsky@de.ibm.com> | 2008-12-25 07:39:12 -0500 |
commit | e37f50e1811d68170e4d58a087cf634b2bf1cef9 (patch) | |
tree | 49296845bd5e651ca7ec70f1dedca6db8deedb66 /arch/s390/kernel/head31.S | |
parent | b3b59d3339c907b1dec3ce19f62b2a7f120d142d (diff) |
[S390] Add processor type march=z10 and a processor type safety check.
This patch adds the code generation option for IBM System z10 and
adds a check in head[31,64].S to prevents the execution of a kernel
compiled for a new processor type on an old machine.
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'arch/s390/kernel/head31.S')
-rw-r--r-- | arch/s390/kernel/head31.S | 27 |
1 files changed, 3 insertions, 24 deletions
diff --git a/arch/s390/kernel/head31.S b/arch/s390/kernel/head31.S index a816e2de32b9..7add8454773b 100644 --- a/arch/s390/kernel/head31.S +++ b/arch/s390/kernel/head31.S | |||
@@ -10,34 +10,13 @@ | |||
10 | * | 10 | * |
11 | */ | 11 | */ |
12 | 12 | ||
13 | # | ||
14 | # startup-code at 0x10000, running in absolute addressing mode | ||
15 | # this is called either by the ipl loader or directly by PSW restart | ||
16 | # or linload or SALIPL | ||
17 | # | ||
18 | .org 0x10000 | ||
19 | startup:basr %r13,0 # get base | ||
20 | .LPG0: l %r13,0f-.LPG0(%r13) | ||
21 | b 0(%r13) | ||
22 | 0: .long startup_continue | ||
23 | |||
24 | # | ||
25 | # params at 10400 (setup.h) | ||
26 | # | ||
27 | .org PARMAREA | ||
28 | .long 0,0 # IPL_DEVICE | ||
29 | .long 0,0 # INITRD_START | ||
30 | .long 0,0 # INITRD_SIZE | ||
31 | |||
32 | .org COMMAND_LINE | ||
33 | .byte "root=/dev/ram0 ro" | ||
34 | .byte 0 | ||
35 | |||
36 | .org 0x11000 | 13 | .org 0x11000 |
37 | 14 | ||
38 | startup_continue: | 15 | startup_continue: |
39 | basr %r13,0 # get base | 16 | basr %r13,0 # get base |
40 | .LPG1: mvi __LC_AR_MODE_ID,0 # set ESA flag (mode 0) | 17 | .LPG1: |
18 | |||
19 | mvi __LC_AR_MODE_ID,0 # set ESA flag (mode 0) | ||
41 | lctl %c0,%c15,.Lctl-.LPG1(%r13) # load control registers | 20 | lctl %c0,%c15,.Lctl-.LPG1(%r13) # load control registers |
42 | l %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area | 21 | l %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area |
43 | # move IPL device to lowcore | 22 | # move IPL device to lowcore |