diff options
author | Martin Schwidefsky <schwidefsky@de.ibm.com> | 2008-12-31 09:11:42 -0500 |
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committer | Martin Schwidefsky <schwidefsky@de.ibm.com> | 2008-12-31 09:11:49 -0500 |
commit | c742b31c03f37c5c499178f09f57381aa6c70131 (patch) | |
tree | db0e95b8299d997fcb1264126bc8efe10d0ddd51 /arch/s390/kernel/entry64.S | |
parent | 9cfb9b3c3a7361c793c031e9c3583b177ac5debd (diff) |
[PATCH] fast vdso implementation for CLOCK_THREAD_CPUTIME_ID
The extract cpu time instruction (ectg) instruction allows the user
process to get the current thread cputime without calling into the
kernel. The code that uses the instruction needs to switch to the
access registers mode to get access to the per-cpu info page that
contains the two base values that are needed to calculate the current
cputime from the CPU timer with the ectg instruction.
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'arch/s390/kernel/entry64.S')
-rw-r--r-- | arch/s390/kernel/entry64.S | 45 |
1 files changed, 24 insertions, 21 deletions
diff --git a/arch/s390/kernel/entry64.S b/arch/s390/kernel/entry64.S index ae83c195171c..c6fbde13971a 100644 --- a/arch/s390/kernel/entry64.S +++ b/arch/s390/kernel/entry64.S | |||
@@ -177,8 +177,11 @@ _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \ | |||
177 | .if !\sync | 177 | .if !\sync |
178 | ni \psworg+1,0xfd # clear wait state bit | 178 | ni \psworg+1,0xfd # clear wait state bit |
179 | .endif | 179 | .endif |
180 | lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user | 180 | lg %r14,__LC_VDSO_PER_CPU |
181 | lmg %r0,%r13,SP_R0(%r15) # load gprs 0-13 of user | ||
181 | stpt __LC_EXIT_TIMER | 182 | stpt __LC_EXIT_TIMER |
183 | mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER | ||
184 | lmg %r14,%r15,SP_R14(%r15) # load grps 14-15 of user | ||
182 | lpswe \psworg # back to caller | 185 | lpswe \psworg # back to caller |
183 | .endm | 186 | .endm |
184 | 187 | ||
@@ -980,23 +983,23 @@ cleanup_sysc_return: | |||
980 | 983 | ||
981 | cleanup_sysc_leave: | 984 | cleanup_sysc_leave: |
982 | clc 8(8,%r12),BASED(cleanup_sysc_leave_insn) | 985 | clc 8(8,%r12),BASED(cleanup_sysc_leave_insn) |
983 | je 2f | 986 | je 3f |
984 | mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER | ||
985 | clc 8(8,%r12),BASED(cleanup_sysc_leave_insn+8) | 987 | clc 8(8,%r12),BASED(cleanup_sysc_leave_insn+8) |
986 | je 2f | 988 | jhe 0f |
987 | mvc __LC_RETURN_PSW(16),SP_PSW(%r15) | 989 | mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER |
990 | 0: mvc __LC_RETURN_PSW(16),SP_PSW(%r15) | ||
988 | cghi %r12,__LC_MCK_OLD_PSW | 991 | cghi %r12,__LC_MCK_OLD_PSW |
989 | jne 0f | 992 | jne 1f |
990 | mvc __LC_SAVE_AREA+64(32),SP_R12(%r15) | 993 | mvc __LC_SAVE_AREA+64(32),SP_R12(%r15) |
991 | j 1f | 994 | j 2f |
992 | 0: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15) | 995 | 1: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15) |
993 | 1: lmg %r0,%r11,SP_R0(%r15) | 996 | 2: lmg %r0,%r11,SP_R0(%r15) |
994 | lg %r15,SP_R15(%r15) | 997 | lg %r15,SP_R15(%r15) |
995 | 2: la %r12,__LC_RETURN_PSW | 998 | 3: la %r12,__LC_RETURN_PSW |
996 | br %r14 | 999 | br %r14 |
997 | cleanup_sysc_leave_insn: | 1000 | cleanup_sysc_leave_insn: |
998 | .quad sysc_done - 4 | 1001 | .quad sysc_done - 4 |
999 | .quad sysc_done - 8 | 1002 | .quad sysc_done - 16 |
1000 | 1003 | ||
1001 | cleanup_io_return: | 1004 | cleanup_io_return: |
1002 | mvc __LC_RETURN_PSW(8),0(%r12) | 1005 | mvc __LC_RETURN_PSW(8),0(%r12) |
@@ -1006,23 +1009,23 @@ cleanup_io_return: | |||
1006 | 1009 | ||
1007 | cleanup_io_leave: | 1010 | cleanup_io_leave: |
1008 | clc 8(8,%r12),BASED(cleanup_io_leave_insn) | 1011 | clc 8(8,%r12),BASED(cleanup_io_leave_insn) |
1009 | je 2f | 1012 | je 3f |
1010 | mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER | ||
1011 | clc 8(8,%r12),BASED(cleanup_io_leave_insn+8) | 1013 | clc 8(8,%r12),BASED(cleanup_io_leave_insn+8) |
1012 | je 2f | 1014 | jhe 0f |
1013 | mvc __LC_RETURN_PSW(16),SP_PSW(%r15) | 1015 | mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER |
1016 | 0: mvc __LC_RETURN_PSW(16),SP_PSW(%r15) | ||
1014 | cghi %r12,__LC_MCK_OLD_PSW | 1017 | cghi %r12,__LC_MCK_OLD_PSW |
1015 | jne 0f | 1018 | jne 1f |
1016 | mvc __LC_SAVE_AREA+64(32),SP_R12(%r15) | 1019 | mvc __LC_SAVE_AREA+64(32),SP_R12(%r15) |
1017 | j 1f | 1020 | j 2f |
1018 | 0: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15) | 1021 | 1: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15) |
1019 | 1: lmg %r0,%r11,SP_R0(%r15) | 1022 | 2: lmg %r0,%r11,SP_R0(%r15) |
1020 | lg %r15,SP_R15(%r15) | 1023 | lg %r15,SP_R15(%r15) |
1021 | 2: la %r12,__LC_RETURN_PSW | 1024 | 3: la %r12,__LC_RETURN_PSW |
1022 | br %r14 | 1025 | br %r14 |
1023 | cleanup_io_leave_insn: | 1026 | cleanup_io_leave_insn: |
1024 | .quad io_done - 4 | 1027 | .quad io_done - 4 |
1025 | .quad io_done - 8 | 1028 | .quad io_done - 16 |
1026 | 1029 | ||
1027 | /* | 1030 | /* |
1028 | * Integer constants | 1031 | * Integer constants |