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authorKumar Gala <galak@freescale.com>2005-09-03 18:55:34 -0400
committerLinus Torvalds <torvalds@evo.osdl.org>2005-09-05 03:05:56 -0400
commit8e8fff09756bdb799154d034c63033192d6f8f89 (patch)
treedb3dcdb7f7a98d983c117a0ad80941fad90df318 /arch/ppc
parenta2f40ccd294d14e5aca464c1913e8e0d8de35fca (diff)
[PATCH] ppc32: Add ppc_sys descriptions for PowerQUICC II devices
Added ppc_sys device and system definitions for PowerQUICC II devices. This will allow drivers for PQ2 to be proper platform device drivers. Which can be shared on PQ3 processors with the same peripherals. Signed-off-by: Matt McClintock <msm@freescale.com> Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/ppc')
-rw-r--r--arch/ppc/kernel/setup.c8
-rw-r--r--arch/ppc/syslib/Makefile3
-rw-r--r--arch/ppc/syslib/pq2_devices.c389
-rw-r--r--arch/ppc/syslib/pq2_sys.c200
4 files changed, 597 insertions, 3 deletions
diff --git a/arch/ppc/kernel/setup.c b/arch/ppc/kernel/setup.c
index cf74a744e375..9c44588f0afb 100644
--- a/arch/ppc/kernel/setup.c
+++ b/arch/ppc/kernel/setup.c
@@ -41,7 +41,11 @@
41#include <asm/xmon.h> 41#include <asm/xmon.h>
42#include <asm/ocp.h> 42#include <asm/ocp.h>
43 43
44#if defined(CONFIG_85xx) || defined(CONFIG_83xx) || defined(CONFIG_MPC10X_BRIDGE) 44#define USES_PPC_SYS (defined(CONFIG_85xx) || defined(CONFIG_83xx) || \
45 defined(CONFIG_MPC10X_BRIDGE) || defined(CONFIG_8260) || \
46 defined(CONFIG_PPC_MPC52xx))
47
48#if USES_PPC_SYS
45#include <asm/ppc_sys.h> 49#include <asm/ppc_sys.h>
46#endif 50#endif
47 51
@@ -241,7 +245,7 @@ int show_cpuinfo(struct seq_file *m, void *v)
241 seq_printf(m, "bogomips\t: %lu.%02lu\n", 245 seq_printf(m, "bogomips\t: %lu.%02lu\n",
242 lpj / (500000/HZ), (lpj / (5000/HZ)) % 100); 246 lpj / (500000/HZ), (lpj / (5000/HZ)) % 100);
243 247
244#if defined(CONFIG_85xx) || defined(CONFIG_83xx) || defined(CONFIG_MPC10X_BRIDGE) 248#if USES_PPC_SYS
245 if (cur_ppc_sys_spec->ppc_sys_name) 249 if (cur_ppc_sys_spec->ppc_sys_name)
246 seq_printf(m, "chipset\t\t: %s\n", 250 seq_printf(m, "chipset\t\t: %s\n",
247 cur_ppc_sys_spec->ppc_sys_name); 251 cur_ppc_sys_spec->ppc_sys_name);
diff --git a/arch/ppc/syslib/Makefile b/arch/ppc/syslib/Makefile
index 400a5d38a1b2..8b9b226005d1 100644
--- a/arch/ppc/syslib/Makefile
+++ b/arch/ppc/syslib/Makefile
@@ -73,7 +73,8 @@ obj-$(CONFIG_SANDPOINT) += i8259.o pci_auto.o todc_time.o
73obj-$(CONFIG_SBC82xx) += todc_time.o 73obj-$(CONFIG_SBC82xx) += todc_time.o
74obj-$(CONFIG_SPRUCE) += cpc700_pic.o indirect_pci.o pci_auto.o \ 74obj-$(CONFIG_SPRUCE) += cpc700_pic.o indirect_pci.o pci_auto.o \
75 todc_time.o 75 todc_time.o
76obj-$(CONFIG_8260) += m8260_setup.o 76obj-$(CONFIG_8260) += m8260_setup.o pq2_devices.o pq2_sys.o \
77 ppc_sys.o
77obj-$(CONFIG_PCI_8260) += m82xx_pci.o indirect_pci.o pci_auto.o 78obj-$(CONFIG_PCI_8260) += m82xx_pci.o indirect_pci.o pci_auto.o
78obj-$(CONFIG_8260_PCI9) += m8260_pci_erratum9.o 79obj-$(CONFIG_8260_PCI9) += m8260_pci_erratum9.o
79obj-$(CONFIG_CPM2) += cpm2_common.o cpm2_pic.o 80obj-$(CONFIG_CPM2) += cpm2_common.o cpm2_pic.o
diff --git a/arch/ppc/syslib/pq2_devices.c b/arch/ppc/syslib/pq2_devices.c
new file mode 100644
index 000000000000..1d3869768f96
--- /dev/null
+++ b/arch/ppc/syslib/pq2_devices.c
@@ -0,0 +1,389 @@
1/*
2 * arch/ppc/syslib/pq2_devices.c
3 *
4 * PQ2 Device descriptions
5 *
6 * Maintainer: Kumar Gala <kumar.gala@freescale.com>
7 *
8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of any
10 * kind, whether express or implied.
11 */
12
13
14#include <linux/init.h>
15#include <linux/module.h>
16#include <linux/device.h>
17#include <linux/ioport.h>
18#include <asm/cpm2.h>
19#include <asm/irq.h>
20#include <asm/ppc_sys.h>
21
22struct platform_device ppc_sys_platform_devices[] = {
23 [MPC82xx_CPM_FCC1] = {
24 .name = "fsl-cpm-fcc",
25 .id = 1,
26 .num_resources = 3,
27 .resource = (struct resource[]) {
28 {
29 .name = "fcc_regs",
30 .start = 0x11300,
31 .end = 0x1131f,
32 .flags = IORESOURCE_MEM,
33 },
34 {
35 .name = "fcc_pram",
36 .start = 0x8400,
37 .end = 0x84ff,
38 .flags = IORESOURCE_MEM,
39 },
40 {
41 .start = SIU_INT_FCC1,
42 .end = SIU_INT_FCC1,
43 .flags = IORESOURCE_IRQ,
44 },
45 },
46 },
47 [MPC82xx_CPM_FCC2] = {
48 .name = "fsl-cpm-fcc",
49 .id = 2,
50 .num_resources = 3,
51 .resource = (struct resource[]) {
52 {
53 .name = "fcc_regs",
54 .start = 0x11320,
55 .end = 0x1133f,
56 .flags = IORESOURCE_MEM,
57 },
58 {
59 .name = "fcc_pram",
60 .start = 0x8500,
61 .end = 0x85ff,
62 .flags = IORESOURCE_MEM,
63 },
64 {
65 .start = SIU_INT_FCC2,
66 .end = SIU_INT_FCC2,
67 .flags = IORESOURCE_IRQ,
68 },
69 },
70 },
71 [MPC82xx_CPM_FCC3] = {
72 .name = "fsl-cpm-fcc",
73 .id = 3,
74 .num_resources = 3,
75 .resource = (struct resource[]) {
76 {
77 .name = "fcc_regs",
78 .start = 0x11340,
79 .end = 0x1135f,
80 .flags = IORESOURCE_MEM,
81 },
82 {
83 .name = "fcc_pram",
84 .start = 0x8600,
85 .end = 0x86ff,
86 .flags = IORESOURCE_MEM,
87 },
88 {
89 .start = SIU_INT_FCC3,
90 .end = SIU_INT_FCC3,
91 .flags = IORESOURCE_IRQ,
92 },
93 },
94 },
95 [MPC82xx_CPM_I2C] = {
96 .name = "fsl-cpm-i2c",
97 .id = 1,
98 .num_resources = 3,
99 .resource = (struct resource[]) {
100 {
101 .name = "i2c_mem",
102 .start = 0x11860,
103 .end = 0x118BF,
104 .flags = IORESOURCE_MEM,
105 },
106 {
107 .name = "i2c_pram",
108 .start = 0x8afc,
109 .end = 0x8afd,
110 .flags = IORESOURCE_MEM,
111 },
112 {
113 .start = SIU_INT_I2C,
114 .end = SIU_INT_I2C,
115 .flags = IORESOURCE_IRQ,
116 },
117 },
118 },
119 [MPC82xx_CPM_SCC1] = {
120 .name = "fsl-cpm-scc",
121 .id = 1,
122 .num_resources = 3,
123 .resource = (struct resource[]) {
124 {
125 .name = "scc_mem",
126 .start = 0x11A00,
127 .end = 0x11A1F,
128 .flags = IORESOURCE_MEM,
129 },
130 {
131 .name = "scc_pram",
132 .start = 0x8000,
133 .end = 0x80ff,
134 .flags = IORESOURCE_MEM,
135 },
136 {
137 .start = SIU_INT_SCC1,
138 .end = SIU_INT_SCC1,
139 .flags = IORESOURCE_IRQ,
140 },
141 },
142 },
143 [MPC82xx_CPM_SCC2] = {
144 .name = "fsl-cpm-scc",
145 .id = 2,
146 .num_resources = 3,
147 .resource = (struct resource[]) {
148 {
149 .name = "scc_mem",
150 .start = 0x11A20,
151 .end = 0x11A3F,
152 .flags = IORESOURCE_MEM,
153 },
154 {
155 .name = "scc_pram",
156 .start = 0x8100,
157 .end = 0x81ff,
158 .flags = IORESOURCE_MEM,
159 },
160 {
161 .start = SIU_INT_SCC2,
162 .end = SIU_INT_SCC2,
163 .flags = IORESOURCE_IRQ,
164 },
165 },
166 },
167 [MPC82xx_CPM_SCC3] = {
168 .name = "fsl-cpm-scc",
169 .id = 3,
170 .num_resources = 3,
171 .resource = (struct resource[]) {
172 {
173 .name = "scc_mem",
174 .start = 0x11A40,
175 .end = 0x11A5F,
176 .flags = IORESOURCE_MEM,
177 },
178 {
179 .name = "scc_pram",
180 .start = 0x8200,
181 .end = 0x82ff,
182 .flags = IORESOURCE_MEM,
183 },
184 {
185 .start = SIU_INT_SCC3,
186 .end = SIU_INT_SCC3,
187 .flags = IORESOURCE_IRQ,
188 },
189 },
190 },
191 [MPC82xx_CPM_SCC4] = {
192 .name = "fsl-cpm-scc",
193 .id = 4,
194 .num_resources = 3,
195 .resource = (struct resource[]) {
196 {
197 .name = "scc_mem",
198 .start = 0x11A60,
199 .end = 0x11A7F,
200 .flags = IORESOURCE_MEM,
201 },
202 {
203 .name = "scc_pram",
204 .start = 0x8300,
205 .end = 0x83ff,
206 .flags = IORESOURCE_MEM,
207 },
208 {
209 .start = SIU_INT_SCC4,
210 .end = SIU_INT_SCC4,
211 .flags = IORESOURCE_IRQ,
212 },
213 },
214 },
215 [MPC82xx_CPM_SPI] = {
216 .name = "fsl-cpm-spi",
217 .id = 1,
218 .num_resources = 3,
219 .resource = (struct resource[]) {
220 {
221 .name = "spi_mem",
222 .start = 0x11AA0,
223 .end = 0x11AFF,
224 .flags = IORESOURCE_MEM,
225 },
226 {
227 .name = "spi_pram",
228 .start = 0x89fc,
229 .end = 0x89fd,
230 .flags = IORESOURCE_MEM,
231 },
232 {
233 .start = SIU_INT_SPI,
234 .end = SIU_INT_SPI,
235 .flags = IORESOURCE_IRQ,
236 },
237 },
238 },
239 [MPC82xx_CPM_MCC1] = {
240 .name = "fsl-cpm-mcc",
241 .id = 1,
242 .num_resources = 3,
243 .resource = (struct resource[]) {
244 {
245 .name = "mcc_mem",
246 .start = 0x11B30,
247 .end = 0x11B3F,
248 .flags = IORESOURCE_MEM,
249 },
250 {
251 .name = "mcc_pram",
252 .start = 0x8700,
253 .end = 0x877f,
254 .flags = IORESOURCE_MEM,
255 },
256 {
257 .start = SIU_INT_MCC1,
258 .end = SIU_INT_MCC1,
259 .flags = IORESOURCE_IRQ,
260 },
261 },
262 },
263 [MPC82xx_CPM_MCC2] = {
264 .name = "fsl-cpm-mcc",
265 .id = 2,
266 .num_resources = 3,
267 .resource = (struct resource[]) {
268 {
269 .name = "mcc_mem",
270 .start = 0x11B50,
271 .end = 0x11B5F,
272 .flags = IORESOURCE_MEM,
273 },
274 {
275 .name = "mcc_pram",
276 .start = 0x8800,
277 .end = 0x887f,
278 .flags = IORESOURCE_MEM,
279 },
280 {
281 .start = SIU_INT_MCC2,
282 .end = SIU_INT_MCC2,
283 .flags = IORESOURCE_IRQ,
284 },
285 },
286 },
287 [MPC82xx_CPM_SMC1] = {
288 .name = "fsl-cpm-smc",
289 .id = 1,
290 .num_resources = 3,
291 .resource = (struct resource[]) {
292 {
293 .name = "smc_mem",
294 .start = 0x11A80,
295 .end = 0x11A8F,
296 .flags = IORESOURCE_MEM,
297 },
298 {
299 .name = "smc_pram",
300 .start = 0x87fc,
301 .end = 0x87fd,
302 .flags = IORESOURCE_MEM,
303 },
304 {
305 .start = SIU_INT_SMC1,
306 .end = SIU_INT_SMC1,
307 .flags = IORESOURCE_IRQ,
308 },
309 },
310 },
311 [MPC82xx_CPM_SMC2] = {
312 .name = "fsl-cpm-smc",
313 .id = 2,
314 .num_resources = 3,
315 .resource = (struct resource[]) {
316 {
317 .name = "smc_mem",
318 .start = 0x11A90,
319 .end = 0x11A9F,
320 .flags = IORESOURCE_MEM,
321 },
322 {
323 .name = "smc_pram",
324 .start = 0x88fc,
325 .end = 0x88fd,
326 .flags = IORESOURCE_MEM,
327 },
328 {
329 .start = SIU_INT_SMC2,
330 .end = SIU_INT_SMC2,
331 .flags = IORESOURCE_IRQ,
332 },
333 },
334 },
335 [MPC82xx_CPM_USB] = {
336 .name = "fsl-cpm-usb",
337 .id = 1,
338 .num_resources = 3,
339 .resource = (struct resource[]) {
340 {
341 .name = "usb_mem",
342 .start = 0x11b60,
343 .end = 0x11b78,
344 .flags = IORESOURCE_MEM,
345 },
346 {
347 .name = "usb_pram",
348 .start = 0x8b00,
349 .end = 0x8bff,
350 .flags = IORESOURCE_MEM,
351 },
352 {
353 .start = SIU_INT_USB,
354 .end = SIU_INT_USB,
355 .flags = IORESOURCE_IRQ,
356 },
357
358 },
359 },
360 [MPC82xx_SEC1] = {
361 .name = "fsl-sec",
362 .id = 1,
363 .num_resources = 1,
364 .resource = (struct resource[]) {
365 {
366 .name = "sec_mem",
367 .start = 0x40000,
368 .end = 0x52fff,
369 .flags = IORESOURCE_MEM,
370 },
371 },
372 },
373};
374
375static int __init mach_mpc82xx_fixup(struct platform_device *pdev)
376{
377 ppc_sys_fixup_mem_resource(pdev, CPM_MAP_ADDR);
378 return 0;
379}
380
381static int __init mach_mpc82xx_init(void)
382{
383 if (ppc_md.progress)
384 ppc_md.progress("mach_mpc82xx_init:enter", 0);
385 ppc_sys_device_fixup = mach_mpc82xx_fixup;
386 return 0;
387}
388
389postcore_initcall(mach_mpc82xx_init);
diff --git a/arch/ppc/syslib/pq2_sys.c b/arch/ppc/syslib/pq2_sys.c
new file mode 100644
index 000000000000..7b6c9ebdb9e3
--- /dev/null
+++ b/arch/ppc/syslib/pq2_sys.c
@@ -0,0 +1,200 @@
1/*
2 * arch/ppc/syslib/pq2_devices.c
3 *
4 * PQ2 System descriptions
5 *
6 * Maintainer: Kumar Gala <kumar.gala@freescale.com>
7 *
8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of any
10 * kind, whether express or implied.
11 */
12
13#include <linux/init.h>
14#include <linux/module.h>
15#include <linux/device.h>
16
17#include <asm/ppc_sys.h>
18
19struct ppc_sys_spec *cur_ppc_sys_spec;
20struct ppc_sys_spec ppc_sys_specs[] = {
21 /* below is a list of the 8260 family of processors */
22 {
23 .ppc_sys_name = "8250",
24 .mask = 0x0000ff00,
25 .value = 0x00000000,
26 .num_devices = 12,
27 .device_list = (enum ppc_sys_devices[])
28 {
29 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
30 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
31 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
32 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
33 }
34 },
35 {
36 .ppc_sys_name = "8255",
37 .mask = 0x0000ff00,
38 .value = 0x00000000,
39 .num_devices = 11,
40 .device_list = (enum ppc_sys_devices[])
41 {
42 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
43 MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SCC4,
44 MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2,
45 MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
46 }
47 },
48 {
49 .ppc_sys_name = "8260",
50 .mask = 0x0000ff00,
51 .value = 0x00000000,
52 .num_devices = 12,
53 .device_list = (enum ppc_sys_devices[])
54 {
55 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
56 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
57 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
58 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
59 }
60 },
61 {
62 .ppc_sys_name = "8264",
63 .mask = 0x0000ff00,
64 .value = 0x00000000,
65 .num_devices = 12,
66 .device_list = (enum ppc_sys_devices[])
67 {
68 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
69 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
70 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
71 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
72 }
73 },
74 {
75 .ppc_sys_name = "8265",
76 .mask = 0x0000ff00,
77 .value = 0x00000000,
78 .num_devices = 12,
79 .device_list = (enum ppc_sys_devices[])
80 {
81 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
82 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
83 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
84 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
85 }
86 },
87 {
88 .ppc_sys_name = "8266",
89 .mask = 0x0000ff00,
90 .value = 0x00000000,
91 .num_devices = 12,
92 .device_list = (enum ppc_sys_devices[])
93 {
94 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
95 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
96 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
97 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
98 }
99 },
100 /* below is a list of the 8272 family of processors */
101 {
102 .ppc_sys_name = "8247",
103 .mask = 0x0000ff00,
104 .value = 0x00000d00,
105 .num_devices = 10,
106 .device_list = (enum ppc_sys_devices[])
107 {
108 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
109 MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1,
110 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
111 MPC82xx_CPM_USB,
112 },
113 },
114 {
115 .ppc_sys_name = "8248",
116 .mask = 0x0000ff00,
117 .value = 0x00000c00,
118 .num_devices = 11,
119 .device_list = (enum ppc_sys_devices[])
120 {
121 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
122 MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1,
123 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
124 MPC82xx_CPM_USB, MPC82xx_SEC1,
125 },
126 },
127 {
128 .ppc_sys_name = "8271",
129 .mask = 0x0000ff00,
130 .value = 0x00000d00,
131 .num_devices = 10,
132 .device_list = (enum ppc_sys_devices[])
133 {
134 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
135 MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1,
136 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
137 MPC82xx_CPM_USB,
138 },
139 },
140 {
141 .ppc_sys_name = "8272",
142 .mask = 0x0000ff00,
143 .value = 0x00000c00,
144 .num_devices = 11,
145 .device_list = (enum ppc_sys_devices[])
146 {
147 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
148 MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1,
149 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
150 MPC82xx_CPM_USB, MPC82xx_SEC1,
151 },
152 },
153 /* below is a list of the 8280 family of processors */
154 {
155 .ppc_sys_name = "8270",
156 .mask = 0x0000ff00,
157 .value = 0x00000a00,
158 .num_devices = 12,
159 .device_list = (enum ppc_sys_devices[])
160 {
161 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
162 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
163 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
164 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
165 },
166 },
167 {
168 .ppc_sys_name = "8275",
169 .mask = 0x0000ff00,
170 .value = 0x00000a00,
171 .num_devices = 12,
172 .device_list = (enum ppc_sys_devices[])
173 {
174 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
175 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
176 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
177 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
178 },
179 },
180 {
181 .ppc_sys_name = "8280",
182 .mask = 0x0000ff00,
183 .value = 0x00000a00,
184 .num_devices = 13,
185 .device_list = (enum ppc_sys_devices[])
186 {
187 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
188 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
189 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_MCC2,
190 MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI,
191 MPC82xx_CPM_I2C,
192 },
193 },
194 {
195 /* default match */
196 .ppc_sys_name = "",
197 .mask = 0x00000000,
198 .value = 0x00000000,
199 },
200};
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-22 04:09:57 -0500